CN104518697A - Current limit control method and current limit control device of three-level inverter - Google Patents

Current limit control method and current limit control device of three-level inverter Download PDF

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Publication number
CN104518697A
CN104518697A CN201310464233.2A CN201310464233A CN104518697A CN 104518697 A CN104518697 A CN 104518697A CN 201310464233 A CN201310464233 A CN 201310464233A CN 104518697 A CN104518697 A CN 104518697A
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current
auxiliary
switches
main
auxiliary switches
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CN104518697B (en
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张龙云
周原
陈鹏
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Vertiv Tech Co Ltd
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Emerson Network Power Co Ltd
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H7/00Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
    • H02H7/10Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
    • H02H7/12Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers
    • H02H7/122Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers for inverters, i.e. dc/ac converters
    • H02H7/1227Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers for inverters, i.e. dc/ac converters responsive to abnormalities in the output circuit, e.g. short circuit
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/4803Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode with means for reducing DC component from AC output voltage

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

The invention discloses a current limit control method and a current limit control device of a three-level inverter. The current limit control device comprises a current limit control unit, an auxiliary switching tube switch-on unit and a main switching tube switch-on unit. The current limit control method includes: S1, when currents outputted by a bridge leg are larger than or equal to a current limit threshold value, switching off two main switching tubes and then switching off two auxiliary switching tubes; S2, when the currents outputted by the bridge leg are decreased to be smaller than the current limit threshold value, enabling the two auxiliary switching tubes to act according to normal switching logic; S3, when the currents outputted by the bridge leg are decreased to be smaller than the current limit threshold value and effective edges of PWM (pulse-width modulation) signals of the main switching tubes or auxiliary switching tubes are reached, enabling the two main switching tubes to act according to the normal switching logic. By the current limit control method and the current limit control device, time for mutual energy infusion and mutual charging of positive and negative buses is shortened, overvoltage of the unilateral bus is avoided, frequent actions of the main switching tubes are avoided, the switching tubes are protected, and output voltage waveforms are improved.

Description

A kind of Current limited Control method and apparatus of three-level inverter
Technical field
The present invention relates to electronic technology field, more particularly, relate to a kind of Current limited Control method and apparatus of three-level inverter.
Background technology
Inverter is the important component part in uninterrupted power supply (Uninterruptible Power System, UPS), and whether what its reliability directly determined that UPS runs stablizes.Current limiting technique is a kind of very important resist technology of inverter, and it when the heavy duty of inverter impact or output short-circuit, can be protected power switch component, improve the impact resistance of inverter effectively.Existing current limiting technique is generally detect inductive current (flowing through the electric current of power switch component); by the inductive current that detects compared with the threshold value of setting; and a current-limiting protection signal is produced when inductive current exceedes the threshold value of setting; close power switch component by hardware or software, reach the effect of protection power switch component.Time below the threshold value that inductive current drops to setting, select proper moment conducting power switch element, make power switch component according to normal switching logic action, thus make inverter continue output voltage.
Two general level circuits, closedown and conducting power switch element do not need sequential, directly can realize with hardware circuit, three-level inverter then generally needs to close and conducting power switch element according to certain sequential, therefore, comparatively flexible and convenient by the rate switch element of software simulating closedown and conducting three-level inverter.
As shown in Figure 1, in typical I type three-level topology structure, comprise four switching tubes (for IGBT), be namely positioned at main switch Q1 and the auxiliary switch Q2 of brachium pontis, and be positioned at main switch Q4 and the auxiliary switch Q3 of lower brachium pontis, or claim outer tube Q1, Q4 and interior pipe Q2, Q3.Time current limliting is blocked, should first close main switch Q1 and Q4, after it reliably blocks, then block auxiliary switch Q2 and Q3.When inductive current I drops to below current protection threshold value, current limit signal disappears, after treating that current limit signal disappears, select start deblocking logic suitable opportunity, namely first conducting two auxiliary switch Q2 and Q3 a period of time is forced, after setting up midpoint potential Deng the reliable conducting of auxiliary switch Q2 and Q3, after auxiliary switch (as the Q3) a period of time of closing unnecessary normal open again, control Q2 and Q3 is according to normal switching logic action, and then conducting main switch Q1 and Q4, control main switch Q1 and Q4 according to normal switching logic action, thus end current limliting process enters a normal ripple logic.
Suitable opportunity mentioned here refers to, when current limit signal disappears time, is get started deblocking logic, or waits for that the effective of PWM starts deblocking logic along when arriving.In general, after wave limiting refers to that current limit signal disappears, wait for that the effective of PWM starts deblocking logic along when arriving.And for MOSFET or the enough IGBT of switching speed, also can not wait effective edge of PWM, once confirm that current limit signal disappears, and just enters deblocking logic, this current-limiting mode is called non-wave limiting mode.
The comparison of above-mentioned two kinds of current-limiting modes:
(1) mode of wave limiting, in a switch periods, only can carry out a Current limited Control to main switch Q1, Q4 and auxiliary switch Q2, Q3, switching tube heat waste is little, but when four switching tubes all close, electric current is through positive and negative busbar afterflow, brachium pontis output voltage is positive/negative busbar voltage, inductive current descending slope is large, and of long duration, output voltage waveforms is poor;
(2) mode of non-wave limiting, switching tube within a PWM cycle can switch repeatedly, switching tube heat waste is high, but owing to not needing to wait for the effective edge of PWM, as long as inductive current I is lower than threshold value with regard to deblocking switching tube, so inductive current I is short for fall time, output voltage waveforms is good;
(3) mode of wave limiting, under some operating modes such as output short-circuit or impact heavy duty, when Current limited Control enters the state that four switching tubes all close, work in the positive half cycle of output voltage for circuit band resistive year (i.e. electric current and voltage same-phase), electric current is from N line successively outputting inductance L after derided capacitors C2, sustained diode 4, sustained diode 3.That is, when normally sending out ripple before, positive bus-bar can to negative busbar afterflow to negative busbar charging (when circuit working is in output voltage negative half period to the energy of induction charging, situation is contrary), in this just can cause (bearing) power frequency period, positive bus-bar continues to export energy (or contrary) toward negative busbar, thus cause monolateral busbar voltage too high, thus increase the risk damaging switching tube.But not under the mode of wave limiting, may occur repeatedly the state that four switching tubes seal entirely in a PWM ripple near current-limiting points, the phenomenon that larger inductive current makes positive and negative busbar fill with mutually is more serious.
Visible, in existing current limiting technique, the mode of wave limiting has the defect that output voltage waveforms difference and positive and negative busbar energy are filled with mutually; Although the mode of non-wave limiting has good output voltage waveforms, positive and negative busbar energy is filled with mutually may be more serious, having a big risk of monolateral bus generation overvoltage, thus increase the risk damaging switching tube.
Summary of the invention
The present invention is directed to the above-mentioned defect of prior art, provide a kind of Current limited Control method and apparatus of three-level inverter, can export the voltage with better waveform, reduce the phenomenon that positive and negative busbar energy is filled with mutually, switch tube is protected effectively.
The technical scheme that the present invention solves the employing of its technical problem is: a kind of Current limited Control method providing three-level inverter, three-level inverter at least comprises the brachium pontis of four switching tubes formations of connecting successively, described four switching tubes comprise two main switches and two auxiliary switches, and Current limited Control method comprises the following steps:
S1, when brachium pontis export electric current be greater than or equal to current limit threshold time, the over-current signal received comes into force, and first turns off described two main switches, then turns off described two auxiliary switches;
S2, when the electric current that brachium pontis exports drops to lower than described current limit threshold, the over-current signal that receives lost efficacy, and made described two auxiliary switches according to normal switching logic action;
S3, the over-current signal inefficacy received, and the pwm signal of described two main switches or described two auxiliary switches is effective in when arriving, and makes described two main switches according to normal switching logic action.
Preferably, step S2 comprises following sub-step:
S21, when the electric current that brachium pontis exports drops to lower than described current limit threshold, the over-current signal that receives lost efficacy, and forced two auxiliary switches described in conducting;
S22, after the first delay time, of turning off in described two auxiliary switches does not need the auxiliary switch of normal open;
S23, after the second delay time, control described two auxiliary switches according to normal switching logic action.
Preferably, step S2 also comprises following sub-step:
Whether the over-current signal that S24, judgement receive comes into force, if then turn off described two auxiliary switches.
Preferably, step S3 comprises following sub-step:
S31, the over-current signal inefficacy received, and the pwm signal of described two main switches or described two auxiliary switches is effective in when arriving, judge after end first delay time, whether to be greater than or equal to very first time interval to the current time interval from described two auxiliary switches, if then perform sub-step S33, then perform sub-step S32 if not;
S32, wait for that the next one of the pwm signal of described two main switches or described two auxiliary switches effectively performs sub-step S33 after arriving;
S33, control described two main switches according to normal switching logic action.
Preferably, the described very first time is spaced apart auxiliary switch and turns off the Dead Time that main switch opens.
There is provided a kind of current limiting control apparatus of three-level inverter, three-level inverter at least comprises the brachium pontis of four switching tubes formations of connecting successively, and described four switching tubes comprise two main switches and two auxiliary switches, and described current limiting control apparatus comprises:
Current limited Control unit, when the electric current for exporting at brachium pontis is greater than or equal to current limit threshold, the over-current signal of reception comes into force, and first turns off described two main switches, then turns off described two auxiliary switches;
Auxiliary switch opens unit, and when the electric current for exporting at brachium pontis drops to lower than described current limit threshold, the over-current signal received lost efficacy, and made described two auxiliary switches according to normal switching logic action;
Main switch opens unit, and for losing efficacy at the over-current signal received, and the pwm signal of described two main switches or described two auxiliary switches is effective in when arriving, and makes described two main switches according to normal switching logic action.
Preferably, described auxiliary switch unlatching unit comprises:
Force conduction module, the electric current for exporting at brachium pontis drops to lower than described current limit threshold, when the over-current signal received lost efficacy, forces two auxiliary switches described in conducting;
Turn off module, for after two auxiliary switches described in pressure conducting, through the first delay time, of turning off in described two auxiliary switches does not need the auxiliary switch of normal open;
Logic control module, after not needing the auxiliary switch of normal open, through the second delay time, controls described two auxiliary switches according to normal switching logic action in described two auxiliary switches of shutoff.
Preferably, described auxiliary switch unlatching unit also comprises:
Current limit control module, for judging whether the over-current signal received comes into force, and when over-current signal comes into force, turns off described two auxiliary switches.
Preferably, described main switch unlatching unit comprises:
Judge module, for losing efficacy at the over-current signal received, and the pwm signal of described two main switches or described two auxiliary switches is effective in when arriving, and judges whether be greater than or equal to very first time interval to the current time interval from described two auxiliary switches after end first delay time;
Time delay module, for when described two auxiliary switches are less than very first time interval to the current time interval after end first delay time, wait for that the next one of the pwm signal of described two main switches or described two auxiliary switches is effectively along arriving;
Main switch opening module, for when whether described two auxiliary switches are greater than or equal to very first time interval to the current time interval after end first delay time, controls described two main switches according to normal switching logic action.
Preferably, the described very first time is spaced apart auxiliary switch and turns off the Dead Time that main switch opens.
The Current limited Control method and apparatus of three-level inverter of the present invention has following beneficial effect: after carrying out Current limited Control and have turned off four switching tubes, when the electric current flowing through switching tube drop to be less than cut-off current threshold value time, without the need to waiting for the effective in arriving of pwm signal, make auxiliary switch according to normal switching logic action, when not exiting current limliting logic, positive bus-bar is no longer no longer charged to positive bus-bar to negative busbar charging or negative busbar, thus prevent monolateral bus overvoltage, thus protection switch pipe, and there is good output waveform; In addition, after auxiliary switch is according to normal switching logic action, wait until main switch or auxiliary switch pwm signal effective along arrive, just control main switch according to normal switching logic action, complete deblocking logic, avoid the action of main switch too frequency.The advantage that this kind controls, makes main switch and auxiliary switch can discriminating selector part, and main switch can the low device of distinguishing Selection radio auxiliary switch switching frequency.
Accompanying drawing explanation
Fig. 1 is the brachium pontis output circuit of I type three-level inverter;
Fig. 2 is the structural representation of the Current limited Control system of existing three-level inverter;
Fig. 3 is the flow chart of Current limited Control method first embodiment of three-level inverter of the present invention;
Fig. 4 is brachium pontis output circuit band in Fig. 1 normal current passage when working in the positive half cycle of output voltage for resistive year;
Fig. 5 is brachium pontis output circuit in Fig. 1 current channel when being in Current limited Control;
Fig. 6 is the control logic schematic diagram in Current limited Control method first embodiment of the present invention;
Fig. 7 is the control logic schematic diagram in Current limited Control method second embodiment of the present invention;
Fig. 8 is the functional block diagram of current limiting control apparatus first embodiment of the present invention.
Embodiment
Below in conjunction with drawings and Examples the present invention will be further explained illustrate, to be with resistive year.
See Fig. 1, three-level inverter at least comprises the brachium pontis of four switching tubes formations of connecting successively, and four switching tubes are respectively the main switch Q1 and auxiliary switch Q2 that are positioned at brachium pontis, and are positioned at main switch Q4 and the auxiliary switch Q3 of lower brachium pontis.See Fig. 2, in the Current limited Control system of three-level inverter, send out ripple control unit is in positive half cycle or negative half period direction signal (Dir) for exporting current voltage, and the complementary and pwm signal in band dead band of two-way is to PWM control unit, the pwm signal of the i.e. pwm signal of main switch---PWM1, and auxiliary switch---PWM2.PWM control unit is according to a direction signal Dir of ripple control unit output and two-way complementation and the pwm signal in band dead band generates four road pwm signal---PWM_Q1, PWM_Q2, PWM_Q3 and the PWM_Q4 changed according to certain logic, and four switching tubes Q1, Q2, Q3 and Q4 above-mentioned four road pwm signals being outputted to respectively in three-level inverter one phase, to drive four switching tubes according to switching logic action.Current detecting unit is for detecting inductive current I, i.e. the electric current of brachium pontis output, is also the electric current flowing through switching tube, and outputs to overcurrent judging unit after the electric current I flowing through switching tube is converted to voltage.Overcurrent judging unit by the magnitude of voltage that receives compared with limit voltage threshold value (corresponding with cut-off current threshold value), if the magnitude of voltage received is greater than or equal to limit voltage threshold value, then the over-current signal exporting PWM control unit is come into force (over-current signal exporting PWM control unit is become high level from low level), if when the magnitude of voltage received is less than limit voltage threshold value, the over-current signal exporting PWM control unit lost efficacy (output low level).Whether PWM control unit comes into force according to the over-current signal received judges whether to carry out Current limited Control.
Fig. 3 is the flow chart of Current limited Control method first embodiment of three-level inverter of the present invention, and as shown in Figure 3, in the present embodiment, Current limited Control method comprises the following steps:
S1, when brachium pontis export electric current be greater than or equal to current limit threshold time, the over-current signal received comes into force, first turn off two main switches, then turn off two auxiliary switches;
S2, when the electric current that brachium pontis exports drops to lower than described current limit threshold, the over-current signal that receives lost efficacy, and made two auxiliary switches according to normal switching logic action;
S3, the over-current signal inefficacy received, and the pwm signal of two main switches or two auxiliary switches is effective in when arriving, and makes two main switches according to normal switching logic action.
If current circuit working is in the positive half cycle of output voltage, then the operating state of four switching tubes is: Q2 normal open, and Q4 is normally closed, the complementary conducting of Q1 and Q3.Suppose that electric current is the direction of being flowed out from bus toward load again, and to define this current direction be forward, namely as shown in Figure 1, the flow direction of inductive current I is forward.
When Q1 conducting, time Q3 turns off, inductive current I rises, inductance L storage power, and now the voltage of brachium pontis output point A is positive bus-bar output voltage, and now current circuit is in Fig. 4 shown in solid line.When Q1 turns off, when Q3 conducting, inductive current I is via Q2 afterflow, and it is N point current potential that brachium pontis exports A point voltage, and be 0, current circuit now as shown in phantom in figure 4.
In the step S1 of the present embodiment; see Fig. 6; in the t1 moment; inductive current I exceedes the cut-off current threshold value of setting, and PWM control unit receives over-current signal OCP and comes into force, and enters current-limiting protection logic; PWM control unit turns off main switch Q1 and Q4; through the switching dead time of main switch and auxiliary switch, Q1 and Q4 be reliable turn-off, and PWM control unit turns off auxiliary switch Q2 and Q3 in the t2 moment.
After four switching tubes are all in off state, inductive current I can via negative busbar and sustained diode 4 and D3 afterflow, as shown in broken line in fig. 5, now the voltage of brachium pontis output point A is the output voltage of negative busbar to current circuit now, and inductance afterflow is charged to negative busbar.
In the positive half cycle of a power frequency period, continue repeat this process can cause the t1 moment before positive bus-bar to the energy (four switching tubes all turn off) after the t2 moment that inductance fills be charged to negative busbar go (namely positive bus-bar continue toward negative busbar filling energy), this can cause the voltage of negative busbar to raise, and power frequency period is larger, the number of times that this process repeats is more, and the energy that positive bus-bar is filled with to negative busbar is more.Crossed after positive half cycle enters negative half period, just turned around and become negative busbar and fill with energy to positive bus-bar, the most serious situation is etc. less than entering negative half period, and negative busbar, with regard to overvoltage, causes switching tube to damage because of overvoltage.For three-phase output system, three-phase can not work in positive half cycle simultaneously, so the output working in positive half cycle is positive bus-bar filling negative busbar mutually, the output working in negative half period is that negative busbar fills with positive bus-bar mutually, now on the whole, the danger of the monolateral overvoltage of busbar voltage is lower; But for the inverter of single-phase output, in a power frequency period, positive bus-bar continues to fill with the phenomenon of energy comparatively seriously to negative busbar, and this may cause serious consequence, as overvoltage etc. is carried in impact rectification.
In existing wave limiting mode, drop to after lower than cut-off current threshold value at inductive current I, need to wait for the effective in when arriving of pwm signal (namely can be PWM1, also can be PWM2), just start deblocking logic.To work in positive half cycle, at PWM ripple effectively before arrival, four pipes are all close, and inductance afterflow always to negative busbar charging, if the duration is longer, easily can cause negative busbar overvoltage voltage, damage switching tube.
Continue to fill with mutually to reduce energy between positive and negative busbar, in the step S2 of the present embodiment, after four switching tubes all turn off, inductive current I must decline, and in the t3 moment, inductive current I drops to lower than cut-off current threshold value, over-current signal OCP lost efficacy, PWM control unit, without the need to waiting for the effective in arriving of the pwm signal of switching tube, directly being opened two auxiliary switch Q2 and Q3, being made two auxiliary switch Q2 and Q3 according to normal switching logic action.Like this, current circuit becomes the dotted line in Fig. 4 from the dotted line Fig. 5, although do not exit current limliting logic, positive bus-bar no longer fills with energy to negative busbar, thus prevents negative busbar overvoltage, protection switch pipe.
See Fig. 6, the step S2 of the present embodiment specifically comprises following sub-step: S21, in the t3 moment, flow through the electric current of switching tube, i.e. inductive current I, drop to lower than cut-off current threshold value, the over-current signal OCP that PWM control unit receives lost efficacy, and PWM control unit forces conducting two auxiliary switch Q2 and Q3 until the t4 moment; After S22, t4 moment, turn off the auxiliary switch of a unnecessary normal open in two auxiliary switches until the t5 moment, such as, turn off and open very much or normally closed that auxiliary switch Q3; After S23, t5 moment, control two auxiliary switches according to normal switching logic action.
On the other hand, under normal circumstances, inductance L afterflow occurs in Q3 conduction period, and the pressure drop of inductance L is the voltage of output filter capacitor C3.And when four switching tubes all turn off, when bridge arm voltage is the output voltage of negative busbar, the pressure drop of inductance L adds the pressure drop of a negative busbar, inductive current can fall fast.After inductive current I is lower than cut-off current threshold values, will prepare to enter deblocking logic.For existing wave limiting mode, need to wait for PWM effectively along just starting deblocking, if this is effectively along less than, then continuation blockade four switching tubes.Visible, this will cause inductive current I to fall seriously, causes output voltage waveforms very poor.The most serious situation is effectively along when coming, inductive current I does not also complete confirmation lower than cut-off current threshold value or lower than threshold value, this can cause in the next PWM cycle, four pipe complete shut-downs, in such cases, inductive current I even can drop near zero from peak value, makes output voltage waveforms very poor.
Unlike this, in the step S2 of the first embodiment of the present invention, after inductive current I is lower than cut-off current threshold values, deblocking logic will be entered at once, without the need to waiting for that the effective edge of pwm signal (specifically the pwm signal of auxiliary switch) arrives, conducting at once two is auxiliary opens switching tube Q2 and Q3, one of them is turned off after the first delay time, again after the second delay time, control two and auxiliary open switching tube Q2 and Q3 according to normal switch logical action, wherein, t3-t4 can be described as the first delay time, and t4-t5 can be described as the second delay time.Now, the some position that A point exports is N line 0 current potential, and the current potential of the negative busbar exported when entirely sealing than four switching tubes is high, and inductance L pressure drop is little, thus makes the voltage waveform of output also better.
Visible; in first embodiment of Current limited Control method of the present invention; compared with the mode of existing wave limiting; it can reduce positive bus-bar and fill with time of energy to negative busbar or negative busbar fills with the time of energy to positive bus-bar; substantially reduce the risk of monolateral bus overvoltage, thus protection switch pipe effectively.
For existing non-wave limiting mode, although there is no the problem of the output waveform difference of wave limiting, but because it is without the need to waiting for pwm signal effectively along arriving, just can complete deblocking logic, inductive current I is caused to rise very soon after main switch Q1 conducting, may again exceed cut-off current threshold value, enter current limliting envelope ripple logic again, step like this repeats, can cause sealing ripple repeatedly in the PWM cycle, and the action of switching tube is too frequent, increase causing the loss of switching tube, increase the risk that switching tube crosses cause thermal damage, action frequently in addition, the energy that inductance fills remains high always, inductive current is near current-limiting points, the energy filled negative busbar also can be a lot, still can fill with high negative busbar very soon.
In Current limited Control method first embodiment of the present invention, in order to reduce the action of switch tube, reduce the risk that switching tube damages because of overheated, and prevent inductance from storing too much unnecessary energy, in the step S3 of the present embodiment, when the over-current signal OCP that receives lost efficacy, needed to wait until pwm signal effective in when arriving of main switch or auxiliary switch pipe, just control two main switches according to normal switching logic action, thus complete deblocking logic.
In the present embodiment, step S3 comprises following sub-step: S31, when the over-current signal OCP that receives lost efficacy, Deng until the t6 moment, arrive in effective edge of the pwm signal of auxiliary switch, judge whether be greater than or equal to very first time interval from the time interval of the moment t4 to current time t6 of two auxiliary switch Q2 and Q3 after end first delay time, the very first time is spaced apart auxiliary switch and turns off the Dead Time that main switch opens, and itself and the second delay time can be the same time.If then perform sub-step S33, then perform sub-step S32 if not; S32, wait for that the next one of the pwm signal of primary/secondary switching tube effectively performs sub-step S33 after arriving; S33, control two main switches are according to normal switching logic action.In the present embodiment, the t6 moment arrives, and what just in time need conducting is auxiliary pipe, so two supervisors also should not open according to normal logic.
In the first embodiment of Current limited Control method of the present invention, main switch Q1 and Q4 be have employed to the mode of wave limiting, make after unlatching auxiliary switch Q2 and Q3, inductive current I can not rise rapidly, main switch Q1 and Q4 frequent movement in the cycle that it also avoid a PWM, reduce the risk that it crosses cause thermal damage.
Consider when actual band carries, such as when the bypass short circuit of UPS or inverter export have other to have a source machine time, the current potential of inductance L output filter capacitor C3 is lower than N point 0 current potential, or under the II/IV quadrant that perception is carried, capacitive is carried, electric current and voltage I has different polarity.Meeting under these operating modes, after shutoff four switching tubes, during conducting auxiliary switch Q2 and Q3, inductive current I likely can rise, and may again exceed cut-off current threshold value.In the second embodiment of Current limited Control method of the present invention, the region of this embodiment and Current limited Control method first embodiment of the present invention is, step S2 comprises following sub-step:
S21, when the electric current that brachium pontis exports drops to lower than described current limit threshold, the over-current signal that receives lost efficacy, and forced conducting two auxiliary switches;
S22, after the first delay time, of turning off in two auxiliary switch Q2 and Q3 does not need the auxiliary switch of normal open;
S23, after the second delay time, control two auxiliary switch Q2 and Q3 according to normal switching logic action;
Whether the over-current signal that S24, judgement receive comes into force, if then turn off two auxiliary switches.
Sub-step S24 performs after sub-step S21, then do not limit with the execution sequence of sub-step S22 and sub-step S23, after two auxiliary switch Q2 and Q3 being forced conducting in sub-step S21, whether lasting judgement receives over-current signal OCP and comes into force, if then turn off two auxiliary switches immediately, then perform subsequent sub-step if not.
Such as, as shown in Figure 7, when invertor operation is to the t7 moment, inductive current I is greater than or equal to cut-off current threshold value, now over-current signal OCP comes into force, PWM control unit turns off main switch Q1 and Q4, and after the conducting Dead Time of main switch and auxiliary switch, reach the t8 moment, PWM control unit turns off auxiliary switch Q2 and Q3.Subsequently, inductive current I declines, until the t9 moment, inductive current I is reduced to lower than cut-off current threshold value, now in sub-step S21, forces conducting two auxiliary switch Q2 and Q3.During conducting two auxiliary switch Q2 and Q3 are forced in maintenance (this period may be less than or equal to the first delay time), inductive current I rises, when arriving t10 moment, inductive current I exceedes cut-off current threshold value again, OCP comes into force, in sub-step S24, now judge that OCP comes into force, then turn off two auxiliary switch Q2 and Q3 immediately.Afterwards, reach the t11 moment, OCP lost efficacy, return and perform sub-step S21, force conducting two auxiliary switch Q2 and Q3, if OCP not revival afterwards, then perform sub-step S22, after the last conducting two auxiliary switch Q2 and Q3, experience the first delay time, when arriving t12 moment, one of turning off in two auxiliary switches does not need the auxiliary switch of normal open, such as Q3, then through the second delay time, control two auxiliary switch Q2 and Q3 according to normal switching logic action.When arriving t13 moment more backward, spent the second delay time and the first interval time, without overcurrent OCP signal, and effective edge of PWM is come (being the effective edge of PWM of supervisor in the present embodiment), normal switch is responsible for, and process is subsequently identical with Current limited Control method first embodiment of the present invention.In execution to after sub-step S22 or sub-step S23, judge that situation that OCP comes into force by that analogy.
In the present embodiment when OCP comes into force again, because main switch Q1 and Q4 is also not open-minded, auxiliary switch Q2 and Q3 can be turned off immediately, which save in general non-wave limiting mode and wait for supervisor's turn-off time, the rising peak of inductive current I can be reduced.
Fig. 8 is the functional block diagram of current limiting control apparatus 800 first embodiment of three-level inverter of the present invention, and as shown in Figure 8, in the present embodiment, current limiting control apparatus 800 comprises:
Current limited Control unit 810, when the electric current for exporting at brachium pontis is greater than or equal to current limit threshold, the over-current signal of reception comes into force, and first turns off two main switches, then turns off two auxiliary switches;
Auxiliary switch opens unit 820, and when the electric current for exporting at brachium pontis drops to lower than described current limit threshold, the over-current signal received lost efficacy, and made two auxiliary switches according to normal switching logic action;
Main switch opens unit 830, and for losing efficacy at the over-current signal received, and the pwm signal of two main switches or two auxiliary switches is effective in when arriving, and makes two main switches according to normal switching logic action.
In the present embodiment, auxiliary switch unlatching unit 820 comprises:
Force conduction module 821, when the electric current for exporting at brachium pontis drops to lower than described current limit threshold, the over-current signal received lost efficacy, and forced conducting two auxiliary switches;
Turn off module 822, for after pressure conducting two auxiliary switches, through the first delay time, of turning off in two auxiliary switches does not need the auxiliary switch of normal open;
Logic control module 823, after an auxiliary switch in shutoff two auxiliary switches, through the second delay time, controls two auxiliary switches according to normal switching logic action; And
Current limit control module 824, for judging whether the over-current signal received comes into force, and when over-current signal comes into force, turns off two auxiliary switches.
In the present embodiment, main switch unlatching unit 830 comprises:
Judge module 831, for losing efficacy at the over-current signal received, and the pwm signal of main switch or auxiliary switch is effective in when arriving, and judges whether be greater than or equal to very first time interval to the current time interval from two auxiliary switches after end first delay time;
Time delay module 832, for when two auxiliary switches are less than very first time interval according to normal switching logic action to the current time interval, waits for that the next one of the pwm signal of switching tube is effectively along arriving;
Main switch opening module 833, for when whether two auxiliary switches are greater than or equal to very first time interval to the current time interval after end first delay time, control two main switches according to normal switching logic action, wherein, the very first time is spaced apart the conducting Dead Time of main switch and auxiliary switch, can be identical with the second delay time.
In the present embodiment; see Fig. 6; in the t1 moment; inductive current I exceedes the cut-off current threshold value of setting, and Current limited Control unit 810 receives over-current signal OCP and comes into force, and enters current-limiting protection logic; Current limited Control unit 810 turns off main switch Q1 and Q4; through the conducting Dead Time of main switch and auxiliary switch, Q1 and Q4 be reliable turn-off, and Current limited Control unit 810 turns off auxiliary switch Q2 and Q3 in the t2 moment.
After four switching tubes all turn off by Current limited Control unit 810, inductive current I must decline, in the t3 moment, inductive current I drops to lower than cut-off current threshold value, over-current signal OCP lost efficacy, auxiliary switch opens unit 820 without the need to waiting for the effective in arriving of the pwm signal of auxiliary switch, directly opens two auxiliary switch Q2 and Q3, makes two auxiliary switch Q2 and Q3 according to normal switching logic action.Like this, current circuit becomes the dotted line in Fig. 4 from the dotted line Fig. 5, although do not exit current limliting logic, positive bus-bar no longer fills with energy to negative busbar, thus prevents negative busbar overvoltage, protection switch pipe, and good output waveform.
In the present embodiment, see Fig. 7, the t9 moment, the electric current flowing through switching tube drops to lower than cut-off current threshold value, and the over-current signal OCP forcing conduction module 821 to receive lost efficacy, and forces conduction module 821 to force conducting two auxiliary switch Q2 and Q3.If when reaching t10 moment subsequently, current limit control module 824 judges that over-current signal OCP comes into force again, then turn off two auxiliary switch Q2 and Q3 immediately.Until the t11 moment, OCP becomes invalid, forces conduction module 821 to force conducting two auxiliary switch Q2 and Q3.If afterwards, OCP is revival not, when arriving t12 moment (the first delay time) from the t11 moment, turns off the auxiliary switch that module 822 one of turning off in two auxiliary switches does not need normal open, such as Q3.From the t12 moment after the second delay time, Logic control module 823 controls two auxiliary switch Q2 and Q3 according to normal switching logic action.
The control logic that in Fig. 6, t4 the is later control logic later with t12 in Fig. 7 is identical, be described with the control logic in Fig. 6 below, arrive after t5 through the second delay time after t 4, two auxiliary switch Q2 and Q3 are according to normal switching logic action, until t6 moment PWM1's is effective in arriving, now, judge module 831 judges after end first delay time, whether to be greater than or equal to very first time interval to the current time interval from two auxiliary switch Q2 and Q3, the very first time is spaced apart the conducting Dead Time of main switch and auxiliary switch, if then enable main switch opening module 833 controls two main switches according to normal switching logic action, then enable time delay module 832 waits for that the next one of the pwm signal of main switch effectively controls two main switches according to normal switching logic action along the rear enable main switch opening module 833 that arrives if not.
The foregoing is only the preferred embodiments of the present invention, be not limited to the present invention, for a person skilled in the art, the present invention can have various modifications and variations.Above for I type three level output inverter for single phase, technical scheme of the present invention is equally applicable to the single-phase output of T-shaped level and heterogeneous output inverter.Within the spirit and principles in the present invention all, any amendment done, equivalent replacement, improvement etc., all should be included within right of the present invention.

Claims (10)

1. a Current limited Control method for three-level inverter, three-level inverter at least comprises the brachium pontis of four switching tubes formations of connecting successively, and described four switching tubes comprise two main switches and two auxiliary switches, it is characterized in that, comprise the following steps:
S1, when brachium pontis export electric current be greater than or equal to current limit threshold time, the over-current signal received comes into force, and first turns off described two main switches, then turns off described two auxiliary switches;
S2, when the electric current that brachium pontis exports drops to lower than described current limit threshold, the over-current signal that receives lost efficacy, and made described two auxiliary switches according to normal switching logic action;
S3, the over-current signal inefficacy received, and the pwm signal of described two main switches or described two auxiliary switches is effective in when arriving, and makes described two main switches according to normal switching logic action.
2. the Current limited Control method of three-level inverter according to claim 1, is characterized in that, step S2 comprises following sub-step:
S21, when the electric current that brachium pontis exports drops to lower than described current limit threshold, the over-current signal that receives lost efficacy, and forced two auxiliary switches described in conducting;
S22, after the first delay time, of turning off in described two auxiliary switches does not need the auxiliary switch of normal open;
S23, after the second delay time, control described two auxiliary switches according to normal switching logic action.
3. the Current limited Control method of three-level inverter according to claim 2, is characterized in that, step S2 also comprises following sub-step:
Whether the over-current signal that S24, judgement receive comes into force, if then turn off described two auxiliary switches.
4. the Current limited Control method of three-level inverter according to claim 1, is characterized in that, step S3 comprises following sub-step:
S31, the over-current signal inefficacy received, and the pwm signal of described two main switches or described two auxiliary switches is effective in when arriving, judge after end first delay time, whether to be greater than or equal to very first time interval to the current time interval from described two auxiliary switches, if then perform sub-step S33, then perform sub-step S32 if not;
S32, wait for that the next one of the pwm signal of described two main switches or described two auxiliary switches effectively performs sub-step S33 after arriving;
S33, control described two main switches according to normal switching logic action.
5. the Current limited Control method of three-level inverter according to claim 4, is characterized in that, the described very first time is spaced apart auxiliary switch and turns off the Dead Time that main switch opens.
6. the current limiting control apparatus (800) of a three-level inverter, three-level inverter at least comprises the brachium pontis of four switching tubes formations of connecting successively, described four switching tubes comprise two main switches and two auxiliary switches, it is characterized in that, described current limiting control apparatus (800) comprising:
Current limited Control unit (810), when the electric current for exporting at brachium pontis is greater than or equal to current limit threshold, the over-current signal of reception comes into force, and first turns off described two main switches, then turns off described two auxiliary switches;
Auxiliary switch opens unit (820), and when the electric current for exporting at brachium pontis drops to lower than described current limit threshold, the over-current signal received lost efficacy, and made described two auxiliary switches according to normal switching logic action;
Main switch opens unit (830), and for losing efficacy at the over-current signal received, and the pwm signal of described two main switches or described two auxiliary switches is effective in when arriving, and makes described two main switches according to normal switching logic action.
7. the current limiting control apparatus (800) of three-level inverter according to claim 6, is characterized in that, described auxiliary switch is opened unit (820) and being comprised:
Force conduction module (821), the electric current for exporting at brachium pontis drops to lower than described current limit threshold, when the over-current signal received lost efficacy, forces two auxiliary switches described in conducting;
Turn off module (822), for after two auxiliary switches described in pressure conducting, through the first delay time, of turning off in described two auxiliary switches does not need the auxiliary switch of normal open;
Logic control module (823), after not needing the auxiliary switch of normal open, through the second delay time, controls described two auxiliary switches according to normal switching logic action in described two auxiliary switches of shutoff.
8. the current limiting control apparatus (800) of three-level inverter according to claim 7, is characterized in that, described auxiliary switch is opened unit (820) and also comprised:
Current limit control module (824), for judging whether the over-current signal received comes into force, and when over-current signal comes into force, turns off described two auxiliary switches.
9. the current limiting control apparatus (800) of three-level inverter according to claim 6, is characterized in that, described main switch is opened unit (830) and being comprised:
Judge module (831), for losing efficacy at the over-current signal received, and the pwm signal of described two main switches or described two auxiliary switches is effective in when arriving, and judges whether be greater than or equal to very first time interval to the current time interval from described two auxiliary switches after end first delay time;
Time delay module (832), for when described two auxiliary switches are less than very first time interval according to normal switching logic action to the current time interval, wait for that the next one of the pwm signal of described two main switches or described two auxiliary switches is effectively along arriving;
Main switch opening module (833), for when whether described two auxiliary switches are greater than or equal to very first time interval to the current time interval after end first delay time, control described two main switches according to normal switching logic action.
10. the current limiting control apparatus (800) of three-level inverter according to claim 9, is characterized in that, the described very first time is spaced apart auxiliary switch and turns off the Dead Time that main switch opens.
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