CN104425302A - Defect detection method and device of semiconductor device - Google Patents
Defect detection method and device of semiconductor device Download PDFInfo
- Publication number
- CN104425302A CN104425302A CN201310398712.9A CN201310398712A CN104425302A CN 104425302 A CN104425302 A CN 104425302A CN 201310398712 A CN201310398712 A CN 201310398712A CN 104425302 A CN104425302 A CN 104425302A
- Authority
- CN
- China
- Prior art keywords
- defect
- interest
- region
- defective locations
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
Abstract
The invention discloses a defect detection method and device of a semiconductor device. The defect detection method of the semiconductor device comprises the following steps: providing a to-be-detected wafer; acquiring defect positions on the to-be-detected wafer; generating a plurality of interested regions according to the defect positions, wherein at least one defect exists in each interested region; acquiring defect position data in the interested regions; detecting the defects of the interested regions according to the defect position data in the interested regions; acquiring defect parameters in the interested regions. The defect detection method of the semiconductor device has the advantages of high efficiency, high accuracy and accurate and stable detection result.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, particularly relate to a kind of defect inspection method and device of semiconductor device.
Background technology
Semiconductor integrated circuit chip is made by batch process, can form a large amount of various types of semiconductor device on the same substrate, and is connected to each other to have complete electric function.Wherein, the defect produced in arbitrary step, all may cause the failure of circuit production.Therefore, in manufacture craft, normal needs carries out defects detection and analysis to the making structure of each step process, finds out the reason that defect occurs, and is got rid of.But, along with very lagre scale integrated circuit (VLSIC) (ULSI, Ultra Large Scale Integration) develop rapidly, the integrated level of chip is more and more higher, the size of device is more and more less, accordingly, being enough to of producing in technique makes affects device and becomes the flaw size of flat rate also more and more less, has higher requirement to the defects detection of semiconductor device.
Existing defect inspection method comprises: provide wafer to be detected; Described detection wafer is detected, obtains the defective locations on wafer to be detected; According to the defective locations on wafer to be measured, all kinds of device for detecting manually is made to correspond to defective locations on wafer to be detected, and the actual conditions of defect corresponding to detecting.Finally, the corresponding judgement of this defect of handling it according to the actual conditions of defect.
But, existing defect inspection method consuming time longer, workload is large and accuracy is low.
Summary of the invention
The problem that the present invention solves is to provide a kind of defect inspection method and device of semiconductor device.
For solving the problem, the invention provides a kind of defect inspection method of semiconductor device, comprising: wafer to be detected is provided; Obtain the defective locations on described wafer to be detected; Generate some Region Of Interest according to described defective locations, at least there is in each Region Of Interest a defect; Obtain the defective locations data in Region Of Interest; Detect according to the defect of defective locations data to described Region Of Interest in described Region Of Interest, obtain the defect parameters in Region Of Interest.
Optionally, the size of described Region Of Interest is more than or equal to 8 microns.
Optionally, the resolving range of described Region Of Interest is 0.12 micron ~ 0.20 micron.
Optionally, the method that the defect of described Region Of Interest detects is comprised: according to the defective locations data genaration Region Of Interest defect map in Region Of Interest; According to Region Of Interest defect map, defect is scanned, to obtain defect parameters.
Optionally, described defect parameters comprises defective locations parameter and flaw size parameter.
Optionally, also comprise: check according to the defect of described defect parameters to Region Of Interest.
Optionally, the method obtaining the defective locations on described wafer to be detected comprises: adopt focus specification and design configuration standard criterion to detect described detection wafer, mark the position be not inconsistent with focus specification or design configuration mark specification, to obtain the defective locations on wafer to be detected.
Accordingly, the present invention also provides a kind of defect detecting device of semiconductor device, comprising: defect location unit, for according to determining defects rule, obtains the defective locations on described wafer to be detected; Region Of Interest positioning unit, for generating some Region Of Interest according to described defective locations, at least has a defect in each Region Of Interest; Position data extraction unit, for obtaining the defective locations data in Region Of Interest; Detecting unit, for detecting according to the defect of defective locations data to described Region Of Interest in described Region Of Interest, obtains the defect parameters in Region Of Interest.
Optionally, check unit, for checking according to the defect of described defect parameters to Region Of Interest.
Optionally, described detecting unit comprises: Date Conversion Unit, for adopting the defective locations data genaration Region Of Interest defect map in Region Of Interest; Scanning element, for scanning defect according to Region Of Interest defect map, to obtain defect parameters.
Compared with prior art, technical scheme of the present invention has the following advantages:
In the defect inspection method of described semiconductor device, because described Region Of Interest generates automatically according to defective locations, its accuracy is higher, and each Region Of Interest can be made accurately to cover at least one defect, and therefore the problem of mistakes and omissions defect not easily occurs in determined Region Of Interest; Secondly, generating Region Of Interest according to described defective locations can also improve detection efficiency, and reduces workload.And the detection of defect parameters is carried out subsequently through described Region Of Interest, the defect parameters obtained is accurate, ensure that accuracy and the stability of defects detection result.
In the defect detecting device of described semiconductor device, owing to having Region Of Interest positioning unit, some Region Of Interest can be automatically generated according to defective locations, and make that at least there is in each Region Of Interest a defect, therefore determined Region Of Interest accuracy is high, and not easily the problem of mistakes and omissions defect occurs.And, owing to having Region Of Interest positioning unit, the location efficiency of Region Of Interest is improved, therefore, it is possible to make the detection efficiency of device improve.Therefore, the defect parameters that the defect detecting device of described semiconductor device obtains is accurate, and defects detection result accurate stable.
Accompanying drawing explanation
Fig. 1 is a kind of schematic flow sheet of defect inspection method;
Fig. 2 is the schematic flow sheet of the defect inspection method of the semiconductor device of the embodiment of the present invention;
Fig. 3 to Fig. 7 is the schematic diagram of the defect inspection process embodiment of semiconductor device of the present invention;
Fig. 8 is the schematic diagram of the defect detecting device embodiment of semiconductor device of the present invention.
Embodiment
As stated in the Background Art, existing defect inspection method consuming time longer, workload is large and accuracy is low.
Specifically please refer to Fig. 1, be a kind of schematic flow sheet of defect inspection method, comprise:
Step S11, provides wafer to be detected;
Step S12, detects described detection wafer, marks the defective locations on wafer to be detected;
Step S13, according to marked defective locations, obtains all defective locations data on described wafer to be detected;
After step s 13, perform step S14 or S15, wherein:
Step S14, according to described defective locations data, make to check that device (such as microscope) finds defect position on wafer to be detected, and checked the actual conditions of described defect by described checkout gear, the position of the semiconductor structure of such as fault location, structure, difference between size and design standard;
Step S15, by described defective locations data input detection device (Inspection Tool), in described checkout gear, Region Of Interest delimited according to described defective locations data, described checkout gear is made to carry out Scanning Detction to Region Of Interest, if checkout gear scans the defect in Region Of Interest, then obtain defect parameters (comprising position, structure, size);
After the step s 15, perform step S16, according to described defect parameters, adopt reviewing means (Review Tool) to check the defect on wafer to be measured, to determine the actual conditions of defect.
From said process, no matter perform step S14 or step S15 after step s 13, all need according to defective locations data, manual positioning checks device or checkout gear.Concrete, when performing step S14, after the defective locations data obtaining wafer to be measured, according to described defective locations data, manual movement checks that device arrives corresponding fault location, and checks the actual conditions of each defect one by one, judges the process of these defects to make.And when performing step S15, after defective locations data input detection device, need in checkout gear, manually to delimit some Region Of Interest according to described defective locations data, make that at least there is in each Region Of Interest a defect, make checkout gear scan these Region Of Interest successively again, thus obtain the defect parameters in each Region Of Interest.
Wherein, when manually device is checked in location, accurately check described in location that device is comparatively large to the difficulty of fault location, and check the situation of each defect one by one, cause huge workload, and consuming time tediously long.Secondly, when manually delimiting some Region Of Interest according to described defective locations data in checkout gear, be difficult to ensure that described Region Of Interest accurately can cover defective locations, easily cause the defect parameters inaccuracy that scanning obtains; And, manually delimit Region Of Interest and workload can be caused equally to increase.Therefore, the method for above-mentioned defects detection consuming time longer, workload is large and accuracy is low.
In order to solve the problem, the present invention proposes a kind of defect inspection method of semiconductor device, comprising: obtain the defective locations on wafer to be detected; Generate Region Of Interest according to described defective locations, there is in described Region Of Interest at least one defect; Obtain the defective locations data in Region Of Interest; Detect according to the defect of defective locations data to described Region Of Interest in described Region Of Interest, obtain the defect parameters in Region Of Interest.Wherein, because described Region Of Interest is generated automatically by defective locations, its accuracy is higher, and each Region Of Interest can be made accurately to cover at least one defect, and therefore the problem of mistakes and omissions defect not easily occurs in determined Region Of Interest; Secondly, generating Region Of Interest according to described defective locations can also improve detection efficiency, and reduces workload.And the detection of defect parameters is carried out subsequently through described Region Of Interest, the defect parameters obtained is accurate, ensure that accuracy and the stability of defects detection result.
For enabling above-mentioned purpose of the present invention, feature and advantage more become apparent, and are described in detail specific embodiments of the invention below in conjunction with accompanying drawing.
Fig. 2 is the schematic flow sheet of the defect inspection method of the semiconductor device of the embodiment of the present invention, comprising:
Step S101, provides wafer to be detected;
Step S102, adopts focus specification and design configuration standard criterion to detect described detection wafer, marks the position be not inconsistent with focus specification or design configuration mark specification, to obtain the defective locations on wafer to be detected;
Step S103, generates some Region Of Interest according to described defective locations, at least has a defect in each Region Of Interest;
Step S104, obtains the defective locations data in Region Of Interest;
Step S105, according to the defective locations data genaration Region Of Interest defect map in Region Of Interest;
Step S106, scans defect according to Region Of Interest defect map, to obtain the defect parameters in Region Of Interest;
Step S107, checks according to the defect of described defect parameters to Region Of Interest.
Fig. 3 to Fig. 7 is the schematic diagram of the defect inspection process of the semiconductor device of the embodiment of the present invention.
Please refer to Fig. 3, wafer 200 to be detected is provided; Adopt focus specification and design configuration standard criterion to detect described detection wafer, mark the position be not inconsistent with focus specification or design configuration mark specification, to obtain the defective locations 201 on wafer 200 to be detected.
Described wafer to be detected 200 comprises substrate and is formed in described substrate or the semiconductor structure of substrate surface, and described semiconductor structure can be used in forming chip circuit, to realize specific chip functions; Wherein, described substrate comprises silicon substrate, germanium substrate, silicon carbide substrates, germanium silicon substrate, silicon-on-insulator substrate, germanium substrate on insulator; The formation process of described semiconductor structure comprises photoetching, deposition, etching and ion implantation etc., and the semiconductor structure formed comprises etching through hole, metal interconnection wire, polysilicon structure etc.
For the technique of existing formation semiconductor structure, be difficult to invariably to make formed semiconductor structure have defect, and the defect produced in arbitrary step in technical process all easily causes formed chip circuit failure.And, along with the integrated level of chip improves constantly, the size of the semiconductor structure in chip constantly reduces, the defect produced in technical process is made to become the impact of flat rate also larger on chip, the following defect found early in technical process, reduces the impact that defect is made chip as far as possible, needs the defect produced in technical process to detect, and defect is judged, to find out the method eliminating defect.
Namely described wafer to be detected 200 has been formed with the substrate of the semiconductor structure in segment chip, and described wafer 200 to be measured has some unit areas (shot) in arrayed, and semiconductor structure at least two unit areas is identical.When the semiconductor structure in unit area is identical, described identical semiconductor structure is formed by identical technique, and therefore, in the unit area with identical semiconductor structure, the position of defect is identical.As shown in Figure 3, a unit area 210 is shown.
After described wafer 200 to be detected is loaded into checkout equipment, described wafer 200 to be detected is detected, obtains the figure Butut of the semiconductor structure on described wafer to be detected 200 surface.The figure Butut of the semiconductor structure on described wafer 200 surface to be detected is inputed in defect location unit, to determine the defective locations of described wafer to be detected 200 for described figure Butut.
There is in described defect location unit focus specification (Hotspot Spec) and design configuration mark specification (Design Pattern Spec), after by the figure Butut of wafer 200 to be measured input defect location unit, the figure Butut of described wafer 200 to be measured and focus specification, design configuration mark specification can compare by described defect location unit, when the figure Butut of described wafer 200 to be measured and focus specification or design configuration mark specification inconsistent time, namely mark described inconsistent position, thus obtain the defective locations 201 on wafer 200 to be measured.
Wherein, described focus specification is the position that defect easily appears in described wafer to be measured 200 surface, the test pattern of semiconductor structure.Concrete, before the described wafer 200 to be measured of detection, provide some wafers, and the semiconductor figure of described some crystal column surfaces and formation process, identical with formation process with the figure of the semiconductor structure on wafer 200 surface to be measured; Detect the defect of the semiconductor structure of some crystal column surfaces successively, record the test pattern of the semiconductor structure at hotspot location and the described hotspot location place occurring defect in some wafers, form focus specification.When detecting described wafer 200 to be measured, the figure Butut of wafer 200 to be measured finds hotspot location, and whether the semiconductor structure figure detecting the hotspot location place of wafer 200 to be measured conforms to test pattern.
Test pattern when described design configuration mark specification is the semiconductor structural designs on described wafer to be measured 200 surface.When detecting described wafer 200 to be measured, the figure Butut of wafer 200 to be measured being compared with test pattern and mates, if do not conform to, then inconsistent position being marked.
Please refer to Fig. 4, Fig. 4 is the enlarged drawing of unit area 210 in Fig. 3, generates some Region Of Interest 202 according to described defective locations 201, at least has a defect in each Region Of Interest 202; Obtain the defective locations data in Region Of Interest 202.
After some defective locations 201 at acquisition wafer 200(to be detected as shown in Figure 3), Region Of Interest positioning unit can generate a Region Of Interest 202 automatically for defective locations 201, and described Region Of Interest 202 i.e. follow-up needs adopts detecting unit to carry out the region of defects detection; Each Region Of Interest 202 covers a defective locations 201 at least completely; And the size of described Region Of Interest 202 needs to be more than or equal to pre-set dimension; In the present embodiment, described pre-set dimension is 8 microns.Because described Region Of Interest 202 is generated according to defective locations 201 automatically by Region Of Interest positioning unit, detection time can be shortened, improve detection efficiency, and reduce the workload of testing staff, and the Region Of Interest 202 obtained is also more accurate, thus make follow-up when defect being scanned with scanning element, more quick and precisely, the defect parameters obtained is also more accurate in location.Therefore, the defects detection efficiency of described semiconductor device improves and accuracy raising.
Concrete, the figure of described Region Of Interest 202 can be circle, rectangle, triangle or polygon; When the figure of described Region Of Interest 202 is circular, circular diameter is more than or equal to 8 microns; When the figure of described Region Of Interest 202 be rectangle or triangle time, described rectangle or the leg-of-mutton length of side are more than or equal to 8 microns; When the figure of Region Of Interest 202 is polygon, runs through described polygonal full-size and be more than or equal to 8 microns.In the present embodiment, the figure of described Region Of Interest 202 is rectangle, and the length of side of described rectangle is greater than 8 microns.
After generation Region Of Interest 202, defective locations 201 in Region Of Interest 202 can be converted to data and export by position data extraction unit, thus the defective locations data obtained in Region Of Interest 202, when described defective locations data are used for follow up scan defect to obtain defect parameters, for location scanning unit.
Concrete, first described position data extraction unit makes the figure Butut of Region Of Interest 202 have high-resolution, then in described high-resolution Region Of Interest 202, defective locations 201 can accurately be shown, then extracted defective locations data are more accurate; The resolution of described Region Of Interest 202 is in the scope of 0.12 micron ~ 0.20 micron; After the resolution of figure Butut that improve Region Of Interest 202, the defective locations 201 in Region Of Interest 202 can be converted to defective locations data and export by described position data extraction unit.Such as with in described wafer 200 to be detected a bit for initial point, at described wafer 200 surface construction vertical coordinate system to be measured, then the defective locations 201 in Region Of Interest 202 all can export with coordinate data, i.e. defective locations data.
Please refer to Fig. 5, according to the defective locations data genaration Region Of Interest defect map in Region Of Interest 202; According to Region Of Interest defect map, defect is scanned, to obtain the defect parameters in Region Of Interest 202.
After acquisition defective locations data, detecting unit (Inspection Tool) can be adopted to detect according to the defect of defective locations data to described Region Of Interest in described Region Of Interest.Wherein, described detecting unit comprises Date Conversion Unit and scanning element.
First, after position data extracting unit outputs defective locations data, described Date Conversion Unit obtains described defective locations data, and described defect unknown data is converted to defect map (as shown in Figure 5).Afterwards, described data transaction list is by defect map input scan unit, and described scanning element can be located at crystal column surface to be detected according to described defect distribution unit, described scanning element is scanned the defect in Region Of Interest 202, to obtain the concrete defect parameters of each defect in wafer 200 to be detected, described defect parameters comprises defective locations parameter and flaw size parameter, i.e. the actual size of the semiconductor structure at defective locations place, position, structural parameters.And testing staff according to the defect parameters of described wafer 200 to be detected, can judge described each defect, or check.
It should be noted that, in the present embodiment, after the defect map of formation described Region Of Interest, before defect is scanned, described Region Of Interest defect map is verified.Concrete, as shown in Figure 6, after defective locations data are converted to defect map by Date Conversion Unit, described defect map and simulated defect figure are carried out matching ratio comparatively, whether correct with the defect map verifying the output of described Date Conversion Unit; Wherein, described defective locations data are converted to figure and obtain after obtaining defective locations data by analogue unit by described simulated defect figure.
Please refer to Fig. 7, check according to the defect of described defect parameters to Region Of Interest 202.
After the described defect parameters of acquisition, testing staff can carry out analysis to described defect parameters and judge, to determine the process to described defect.When testing staff think need to check a certain defect time, check unit (Review Tool) can be made at wafer 200(to be detected as shown in Figure 3 according to the defective locations parameter of this defect) surface positions, to check the actual conditions of this defect; Wherein, described review tool can be electron microscope.As shown in Figure 7, be the actual conditions of the defect that review tool views according to defect parameters, wherein, bridge joint is there occurs between adjacent metal interconnection line, as shown in region 220, the bridge joint between described metal interconnection wire can cause chip circuit short circuit, makes chip circuit failure.According to the actual conditions of viewed defect, can adjust the technique of the semiconductor structure forming described wafer 200 surface to be detected, realize the object eliminating described defect.
In the defect inspection method of the semiconductor device of the present embodiment, because described Region Of Interest generates automatically according to defective locations, its accuracy is higher, and each Region Of Interest can be made accurately to cover at least one defect, and therefore the problem of mistakes and omissions defect not easily occurs in determined Region Of Interest; Secondly, generating Region Of Interest according to described defective locations can also improve detection efficiency, and reduces workload.And the detection of defect parameters is carried out subsequently through described Region Of Interest, the defect parameters obtained is accurate, ensure that accuracy and the stability of defects detection result.
Accordingly, embodiments of the invention also provide a kind of defect detecting device of semiconductor device, please refer to Fig. 8, comprising: defect location unit 300, for according to determining defects rule, obtain the defective locations on described wafer to be detected; Region Of Interest positioning unit 301, for generating some Region Of Interest according to described defective locations, at least has a defect in each Region Of Interest; Position data extraction unit 302, for obtaining the defective locations data in Region Of Interest; Detecting unit 303, for detecting according to the defect of defective locations data to described Region Of Interest in described Region Of Interest, obtains the defect parameters in Region Of Interest.
Wherein, described detecting unit 303 comprises: Date Conversion Unit 330, for adopting the defective locations data genaration Region Of Interest defect map in Region Of Interest; Scanning element 331, for scanning defect according to Region Of Interest defect map, to obtain defect parameters.
The defect detecting device of semiconductor device also comprises: check unit 304, for checking according to the defect of described defect parameters to Region Of Interest.
In addition, the defect detecting device of described semiconductor device also comprises analogue unit 305, after obtaining defective locations data, and described defective locations data is converted to simulated defect figure; Described simulated defect figure be used for defect map matching ratio comparatively, with verify Date Conversion Unit export defect map whether correct.
In the present embodiment, in the defect detecting device of semiconductor device, owing to having Region Of Interest positioning unit, some Region Of Interest can be automatically generated according to defective locations, and make that at least there is in each Region Of Interest a defect, therefore determined Region Of Interest accuracy is high, and not easily the problem of mistakes and omissions defect occurs.And, owing to having Region Of Interest positioning unit, the location efficiency of Region Of Interest is improved, therefore, it is possible to make the detection efficiency of device improve.Therefore, the defect parameters that the defect detecting device of described semiconductor device obtains is accurate, and defects detection result accurate stable.
Although the present invention discloses as above, the present invention is not defined in this.Any those skilled in the art, without departing from the spirit and scope of the present invention, all can make various changes or modifications, and therefore protection scope of the present invention should be as the criterion with claim limited range.
Claims (10)
1. a defect inspection method for semiconductor device, is characterized in that, comprising:
Wafer to be detected is provided;
Obtain the defective locations on described wafer to be detected;
Generate some Region Of Interest according to described defective locations, at least there is in each Region Of Interest a defect;
Obtain the defective locations data in Region Of Interest;
Detect according to the defect of defective locations data to described Region Of Interest in described Region Of Interest, obtain the defect parameters in Region Of Interest.
2. the defect inspection method of semiconductor device as claimed in claim 1, it is characterized in that, the size of described Region Of Interest is more than or equal to 8 microns.
3. the defect inspection method of semiconductor device as claimed in claim 1, it is characterized in that, the resolving range of described Region Of Interest is 0.12 micron ~ 0.20 micron.
4. the defect inspection method of semiconductor device as claimed in claim 1, is characterized in that, comprise the method that the defect of described Region Of Interest detects: according to the defective locations data genaration Region Of Interest defect map in Region Of Interest; According to Region Of Interest defect map, defect is scanned, to obtain defect parameters.
5. the defect inspection method of semiconductor device as claimed in claim 1, it is characterized in that, described defect parameters comprises defective locations parameter and flaw size parameter.
6. the defect inspection method of semiconductor device as claimed in claim 1, is characterized in that, also comprise: check according to the defect of described defect parameters to Region Of Interest.
7. the defect inspection method of semiconductor device as claimed in claim 1, it is characterized in that, the method obtaining the defective locations on described wafer to be detected comprises: adopt focus specification and design configuration standard criterion to detect described detection wafer, mark the position be not inconsistent with focus specification or design configuration mark specification, to obtain the defective locations on wafer to be detected.
8. a defect detecting device for semiconductor device, is characterized in that, comprising:
Defect location unit, for according to determining defects rule, obtains the defective locations on described wafer to be detected;
Region Of Interest positioning unit, for generating some Region Of Interest according to described defective locations, at least has a defect in each Region Of Interest;
Position data extraction unit, for obtaining the defective locations data in Region Of Interest;
Detecting unit, for detecting according to the defect of defective locations data to described Region Of Interest in described Region Of Interest, obtains the defect parameters in Region Of Interest.
9. the defect detecting device of semiconductor device as claimed in claim 8, is characterized in that, also comprise: check unit, for checking according to the defect of described defect parameters to Region Of Interest.
10. the defect detecting device of semiconductor device as claimed in claim 8, it is characterized in that, described detecting unit comprises: Date Conversion Unit, for adopting the defective locations data genaration Region Of Interest defect map in Region Of Interest; Scanning element, for scanning defect according to Region Of Interest defect map, to obtain defect parameters.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310398712.9A CN104425302B (en) | 2013-09-04 | 2013-09-04 | The defect inspection method and device of semiconductor devices |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310398712.9A CN104425302B (en) | 2013-09-04 | 2013-09-04 | The defect inspection method and device of semiconductor devices |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104425302A true CN104425302A (en) | 2015-03-18 |
| CN104425302B CN104425302B (en) | 2017-09-22 |
Family
ID=52973963
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310398712.9A Active CN104425302B (en) | 2013-09-04 | 2013-09-04 | The defect inspection method and device of semiconductor devices |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN104425302B (en) |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106935528A (en) * | 2017-05-08 | 2017-07-07 | 合肥市华达半导体有限公司 | A kind of defect inspection method of semiconductor components and devices |
| CN108346592A (en) * | 2018-01-17 | 2018-07-31 | 武汉新芯集成电路制造有限公司 | A kind of method and device of simulation wafer rear defect |
| CN108461371A (en) * | 2018-05-08 | 2018-08-28 | 德淮半导体有限公司 | Electron beam scanning device, defect detecting system and method |
| CN110261270A (en) * | 2019-07-18 | 2019-09-20 | 西安奕斯伟硅片技术有限公司 | A kind of analysis method and device of Defect |
| CN110690136A (en) * | 2019-10-12 | 2020-01-14 | 上海华力微电子有限公司 | Defect detection method and system |
| CN111341686A (en) * | 2020-03-10 | 2020-06-26 | 上海华力微电子有限公司 | Method and device for detecting wafer defects |
| CN111816599A (en) * | 2020-07-14 | 2020-10-23 | 长江存储科技有限责任公司 | Die locator and die locating method |
| CN112417191A (en) * | 2019-08-20 | 2021-02-26 | 华润微电子（重庆）有限公司 | Defect scanning result processing method, device and system and storage medium |
| CN112447542A (en) * | 2019-08-29 | 2021-03-05 | 台湾积体电路制造股份有限公司 | Semiconductor wafer inspection method and system |
| CN113241310A (en) * | 2021-05-28 | 2021-08-10 | 长江存储科技有限责任公司 | Wafer defect detection method, detection device, detection equipment and readable storage medium |
| WO2023065493A1 (en) * | 2021-10-18 | 2023-04-27 | 长鑫存储技术有限公司 | Defect detection method and apparatus, and device and storage medium |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1276577A (en) * | 1999-06-02 | 2000-12-13 | 松下电器产业株式会社 | Pattern defect testing method |
| US20030014197A1 (en) * | 2001-07-13 | 2003-01-16 | Hung-Jen Weng | Method and apparatus for wafer analysis |
| CN102789999A (en) * | 2012-08-16 | 2012-11-21 | 上海华力微电子有限公司 | Defect detecting method for utilizing graphic features to scan and manufacturing method of semiconductor chip |
-
2013
- 2013-09-04 CN CN201310398712.9A patent/CN104425302B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1276577A (en) * | 1999-06-02 | 2000-12-13 | 松下电器产业株式会社 | Pattern defect testing method |
| US20030014197A1 (en) * | 2001-07-13 | 2003-01-16 | Hung-Jen Weng | Method and apparatus for wafer analysis |
| CN102789999A (en) * | 2012-08-16 | 2012-11-21 | 上海华力微电子有限公司 | Defect detecting method for utilizing graphic features to scan and manufacturing method of semiconductor chip |
Cited By (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106935528A (en) * | 2017-05-08 | 2017-07-07 | 合肥市华达半导体有限公司 | A kind of defect inspection method of semiconductor components and devices |
| CN108346592A (en) * | 2018-01-17 | 2018-07-31 | 武汉新芯集成电路制造有限公司 | A kind of method and device of simulation wafer rear defect |
| CN108346592B (en) * | 2018-01-17 | 2020-06-23 | 武汉新芯集成电路制造有限公司 | Method and device for simulating defects on back of wafer |
| CN108461371A (en) * | 2018-05-08 | 2018-08-28 | 德淮半导体有限公司 | Electron beam scanning device, defect detecting system and method |
| CN110261270A (en) * | 2019-07-18 | 2019-09-20 | 西安奕斯伟硅片技术有限公司 | A kind of analysis method and device of Defect |
| CN110261270B (en) * | 2019-07-18 | 2023-02-21 | 西安奕斯伟材料科技有限公司 | Method and device for analyzing silicon wafer defects |
| CN112417191A (en) * | 2019-08-20 | 2021-02-26 | 华润微电子（重庆）有限公司 | Defect scanning result processing method, device and system and storage medium |
| CN112417191B (en) * | 2019-08-20 | 2023-09-26 | 华润微电子（重庆）有限公司 | Defect scanning result processing method, device, system and storage medium |
| CN112447542A (en) * | 2019-08-29 | 2021-03-05 | 台湾积体电路制造股份有限公司 | Semiconductor wafer inspection method and system |
| CN110690136A (en) * | 2019-10-12 | 2020-01-14 | 上海华力微电子有限公司 | Defect detection method and system |
| CN111341686B (en) * | 2020-03-10 | 2022-04-19 | 上海华力微电子有限公司 | Method and device for detecting wafer defects |
| CN111341686A (en) * | 2020-03-10 | 2020-06-26 | 上海华力微电子有限公司 | Method and device for detecting wafer defects |
| CN111816599A (en) * | 2020-07-14 | 2020-10-23 | 长江存储科技有限责任公司 | Die locator and die locating method |
| CN113241310A (en) * | 2021-05-28 | 2021-08-10 | 长江存储科技有限责任公司 | Wafer defect detection method, detection device, detection equipment and readable storage medium |
| WO2023065493A1 (en) * | 2021-10-18 | 2023-04-27 | 长鑫存储技术有限公司 | Defect detection method and apparatus, and device and storage medium |
Also Published As
| Publication number | Publication date |
|---|---|
| CN104425302B (en) | 2017-09-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN104425302A (en) | Defect detection method and device of semiconductor device | |
| CN102944196B (en) | A kind of method detecting circularity of circular contact hole of semiconductor | |
| CN100465612C (en) | Defect detection method | |
| CN103354212B (en) | The method of measuring and calculating contact hole and polysilicon gate deviation of the alignment value | |
| US20140226893A1 (en) | Method and System for Image-Based Defect Alignment | |
| TW201350860A (en) | Method for aligning probe contacts with wafer contacts | |
| TWI754151B (en) | Wafer-level testing method and test structure thereof | |
| CN103354211B (en) | The method of measuring and calculating contact hole and polysilicon gate deviation of the alignment value | |
| TWI639203B (en) | Method and system for diagnosing a semiconductor wafer | |
| CN102623368A (en) | Wafer defect detection method | |
| CN103346103B (en) | Detect the method for polysilicon gate and contact hole Aligning degree | |
| CN103531500A (en) | Calibration method of wafer defect detection equipment | |
| KR102496148B1 (en) | Method for semiconductor wafer inspection and system thereof | |
| TW202115763A (en) | Multi-scanning electron microscopy for wafer alignment | |
| TWI494558B (en) | Method and system of classifying defects on a wafer | |
| CN103531498B (en) | Wafer defect analytical system | |
| JP6244307B2 (en) | System and method for sample preparation for subsurface defect inspection | |
| CN102353697B (en) | Defect on-line assessment method | |
| CN103972119A (en) | Testing device and method for measuring alignment deviation through testing device | |
| CN103887204B (en) | Silicon wafer quality factor eliminating method related to problems of laser annealing process | |
| CN107437514B (en) | Method for monitoring defects of product measurement area | |
| CN103837105A (en) | Critical size measuring method | |
| CN106098583B (en) | For the electron beam scanning detection method of polysilicon oxide grid missing | |
| US11449984B2 (en) | Method and system for diagnosing a semiconductor wafer | |
| CN104319244B (en) | Positioning method of failure center point of chip |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |