CN104378161B - A kind of FCoE agreement accelerating engine IP kernel based on AXI4 bus architecture - Google Patents
A kind of FCoE agreement accelerating engine IP kernel based on AXI4 bus architecture Download PDFInfo
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Abstract
The invention discloses a kind of FCoE agreement accelerating engine IP kernel based on AXI4 bus architecture, belong to Ethernet optical-fibre channel field, be applied in FCoE UNE adapter.The present invention includes sending module, receiver module and control module.The present invention sets up on AXI4 bus architecture basis, using AXI4 Lite bus to IP kernel configuration register of the present invention, is transmitted/is received the read-write of descriptor using AXI4 bus, the data being sent/being received using the transmission of AXI4 Stream high-speed channel.The present invention can be controlled by FCoE UNE adapter cpu, is specifically designed for the needs of hardware handles FCoE Frame in Ethernet optical-fibre channel field, using full duplex mode of operation, work real-time high-efficiency, data throughout is big, and transfer rate is high, and is capable of Lossless transport.The present invention supports FCoE data sectional/merging treatment, lossless ethernet feature and single virtualization.
Description
Technical field
The invention belongs to Ethernet Fibre Channel technologies field, more particularly, to a kind of based on AXI4 bus architecture
FCoE agreement accelerating engine IP kernel.
Background technology
With the development of the technology such as Internet of Things, cloud computing, it is in explosive growth that Internet firm needs data to be processed, huge
Big data volume needs the process of efficient storage and high speed.In order to cater to this trend, Internet firm must be set up enterprise
The data center of level.
Data center is by storing net (Storage Area Network, hereinafter referred to as SAN) and LAN (Local Area
Network, hereinafter referred to as LAN) merge form.SAN is mainly based upon fiber channel protocol (Fibre Channel, FC) and will deposit
Storage equipment server constitutes network, and the no frame losing of fiber channel protocol, low latency, high bandwidth are the optimal choices that storage is netted.
LAN is mainly made up of Ethernet, and Ethernet connects simple, compatibility by force so that it is widely used in LAN.In Enterprise Data
In center applications, need to be merged SAN and LAN, otherwise arise that equipment and number of cables increase sharply, interface type numerous
Miscellaneous, energy resource consumption is huge and the problems such as management complexity is high.Ethernet optical-fibre channel (Fibre Channel over
Ethernet, hereinafter referred to as FCoE) optical-fibre channel can be mapped to Ethernet, fiber channel protocol frame is encapsulated in Ethernet
Frame is referred to as FCoE frame to be transmitted in ethernet networks, thus SAN and LAN is merged.The FCoE network adaptation needing in UNE
Device also will be novel FCoE UNE adapter CNA card (Converged Network Adapter, CNA).
In existing network adapter scheme, the process of the Internet protocol data flow is mainly carried out by host CPU,
Network adapter simply serves the effect of receiving frame or data.There are substantial amounts of various flows due in UNE communication
The data exchange of amount type, host CPU needs data volume to be processed huge so that host CPU burden is overweight, result in CPU
Can seriously reduce, have a strong impact on the quality of network service and the performance of main frame.
Protocol hardware accelerates the advantage referring to calculate using hardware concurrent, selectively needs host CPU complete part
The protocol processes work becoming is put into and carries out on hardware, so can simplify the burden of CPU, improve work efficiency.Currently used for net
The hardware protocol of network adapter processes and is primarily directed to ICP/IP protocol, its technology and product all comparative maturities.It is directed to and melt
Close network-specific and be in the starting stage in FCoE protocol hardware, existing IP kernel scheme there is also following deficiency：
1st, UNE adapter is to be a network by the originally different network integrations, thus can not in data link layer
Reuse traditional Ethernet protocol, New Fusion network needs lossless Ethernet protocol (the Data Center of enhancement mode
Bridge, hereinafter referred to as DCB) support.Existing IP kernel scheme must carry the ethernet mac control of DCB function with third party
Device docking processed, and the mac controller carrying DCB function at present is not also used widely, and result in existing IP kernel application model
Enclose narrow, compatibility difference is it is impossible to meet actual demand；
2nd, existing IP kernel scheme has only been by cyclic redundancy check (CRC) (Cyclic Redundancy Check, letter below
Claim CRC) process and frame head postamble process, protocol processes dynamics is little.In UNE, have the one of mass data exchange
As be former storage net data traffic FCoE frame.Existing IP kernel is not due to being directed to the dedicated processes module of FCoE frame so that leading
Machine CPU still will undertake very big procotol and process responsibility, thus leading to host CPU performance to remain unchanged inefficiency, merge net
Network overall performance is very low；
3rd, existing IP kernel scheme supports AXI4-Lite light weight bus and AXI4 bus architecture, is carrying out mass data biography
When defeated speed not high it is impossible to meet the requirement of UNE mass data high-speed transfer, link data can be led to cannot to pass in time
Delivering to main frame to be processed, thus causing data retention and congestion, reducing network performance；
4th, existing IP kernel scheme does not support the virtualization based on example, in hardware, and hardware based single virtualization (SR-
IOV) virtual machine environment can be made directly to access hardware, effectively improve performance；There is single virtualized function also have energy-conservation, fit
Orchestration reduces, simplifies wiring, the advantage reducing switch ports themselves.Existing IP kernel scheme cannot provide above advantage, and such as
Fruit also can increase the burden of host computer system completely using software virtualization.
Content of the invention
Disadvantages described above for prior art or Improvement requirement, the present invention provides a kind of FCoE based on AXI4 bus architecture
Agreement accelerating engine IP kernel, is applied in FCoE UNE adapter.Using hardware concurrent process feature it would be desirable to
The FCoE data processing work that CPU is responsible for all is put into and carries out on FCoE network adapter hardware, can accelerate protocol processes
Speed, offloading the CPU, and it is aided with flow-control, congestion control and single virtualization (SR-IOV) support, thus effectively
The overall performance of lifting network.
The present invention provides a kind of FCoE agreement accelerating engine IP kernel based on AXI4 bus architecture, including sending module, connects
Receive module and control module, wherein：
Described sending module includes：Send descriptor control unit, send descriptor for transmission；Send high-speed channel control
Unit processed, for receiving data to be sent, wherein said data to be sent includes general data and FCoE data block；Send data
Buffer unit, for caching described general data to be sent；Send FCoE data segmentation unit, for splitting and encapsulating pending
The described FCoE data block sent forms FCoE Frame to be sent；Send lossless ether net unit, be used for completing PFC frame generate and
ETS dispatches；Transmit queue select unit, for selecting the described general data of transmission and described FCoE to treat according to described ETS scheduling
Send Frame；Send data packaging unit, for according to described send descriptor encapsulation described general data to be sent and
Described PFC frame, and the Frame after encapsulation and described FCoE Frame to be sent are carried out with CRC interpolation formation frame to be sent；Send out
Descriptor administrative unit is sent to be used for storing and manage described transmission descriptor；And send frame buffer unit, concurrent for caching
Send described frame to be sent；
Described receiver module includes：Receive frame buffer unit, for caching frame to be received；Receive frame resolution unit, be used for
Complete the verification to described frame to be received, parsing to form general data, type identification signal, PFC frame and FCoE Frame；Connect
Receive queue select unit, for receiving after the described type identification signal behavior reception parsing that frame resolution unit generates according to described
Described general data；Receiving data buffer unit, for caching described general data；Receive FCoE data combination unit, use
Form FCoE data block in merging and caching described FCoE Frame；Receive lossless ether net unit, for parsing PFC frame and life
Become to send and suspend vector, dispatched with the transmission suspending particular flow rate categorical data；Receive descriptor administrative unit, for caching and
Filling receives descriptor；Receive descriptor control unit, be used for prefetching and write back described reception descriptor；And receive logical at a high speed
Road control unit, the general data and described reception FCoE data for writing back described receiving data buffer unit caching merges single
The FCoE data block of unit's caching；And
Described control module includes：Register configuration unit, is applied to described FCoE agreement accelerating engine IP for configuration
The control register of core, and register management unit, for managing described control register, when described control register needs
Configure described sending module or described receiver module certain unit when, described register management unit is by described control register
Value be sent to corresponding units.
In general, by the contemplated above technical scheme of the present invention compared with prior art, there is following beneficial effect
Really：
1st, the association that the present invention is specific to the UNE adapter of application in Ethernet optical-fibre channel field and develops
View accelerating engine IP kernel, maximum characteristic is that the FCoE data exchange needing host CPU to process is put into UNE adapter
The special FCoE processing module of middle IP kernel is processed, and effectively reduces the burden of main frame.All of FCoE UNE is fitted
Orchestration can carry out hardware based FCoE data exchange processing using IP kernel of the present invention.
2nd, the present invention is integrated with the function to realize lossless Ethernet for the lossless ether net unit, can high performance satisfaction melt
Close the requirement to bandwidth, time delay and packet loss for the different flow transmitting in network.IP kernel of the present invention with DCB function can be with now
Some traditional ethernet mac controllers are compatible so that IP kernel range of application of the present invention becomes wide, compatible and favorable expandability.
3 present invention utilizes the concurrency of hardware calculates advantage, and substantial amounts of data processing during FCoE is exchanged is put into hardware
On carry out, effectively alleviate the burden of host CPU, the speed of protocol processes and the overall performance of network can be obviously improved.
4th, the present invention can support the virtualization of single virtualization form, and hardware based single virtualization can make virtual
Machine environment directly accesses hardware, effectively improves performance；IP kernel have single virtualized function also have energy-conservation, adapter reduce,
Simplify wiring, the advantage reducing switch ports themselves；IP kernel supports that single virtualization can make software need not specially do based on pure soft
The virtualization design of part, can effectively reduce the burden of CPU, improve performance.
5th, the present invention sets up on AXI4 bus architecture basis, transmits control register information, profit using AXI4-Lite
Receive/send descriptor with AXI4 bus transfer, receive/send data using AXI4-Stream channel transfer.The present invention is in net
It is controlled by adapter cpu on network adapter；Extensibility is good, can carry AXI4 EBI and AXI4- with other
The IP kernel collaborative work of Stream passage.
Brief description
Fig. 1 is position in FCoE UNE adapter for the agreement accelerating engine IP kernel of the present invention and Module Division is illustrated
Figure；
Fig. 2 is the structured flowchart of agreement accelerating engine IP kernel sending module of the present invention；
Fig. 3 is the structured flowchart of agreement accelerating engine IP kernel receiver module of the present invention；
Fig. 4 is the structured flowchart of agreement accelerating engine IP kernel control module of the present invention；
Fig. 5 is the schematic diagram that agreement accelerating engine IP kernel of the present invention sends data flow；
Fig. 6 is the schematic diagram of agreement accelerating engine IP kernel receiving data stream of the present invention.
Specific embodiment
In order that the objects, technical solutions and advantages of the present invention become more apparent, below in conjunction with drawings and Examples, right
The present invention is further elaborated.It should be appreciated that specific embodiment described herein is only in order to explain the present invention, and
It is not used in the restriction present invention.As long as additionally, involved technical characteristic in each embodiment of invention described below
The conflict of not constituting each other just can be mutually combined.
The IP kernel of the present invention is set up on AXI4 bus architecture basis, using AXI4-lite bus to IP kernel of the present invention
Depositor is configured, and is transmitted/is received the read-write of descriptor using AXI4 bus, using AXIS-Stream high-speed data
The data that channel transfer sends/receives, completes reception/sending function under the control of UNE adapter cpu.
Fig. 1 show position in FCoE UNE adapter for the agreement accelerating engine IP kernel of the present invention and Module Division
Schematic diagram.As shown in figure 1, IP kernel of the present invention is applied to FCoE UNE adapter inner, in UNE adapter cpu
It is operated under control, its data path can connect other IP kernels (such as direct memory access (Direct Memory with one end
Access, hereinafter referred to as DMA) controller etc.), the other end connects 10G ethernet mac controller.In embodiments of the present invention,
FCoE network adapter cpu passes through AXI4-Lite bus and AXI4 bus marco IP kernel of the present invention and by address data
Mode configuration register and transmissions/receiving data descriptor, and to be sent/data flow of receiving is by AXI4-Stream
Passage is connected with other IP kernels to realize function.There are register storage area and the address number of address number inside IP kernel of the present invention
Descriptor memory block (not shown in figure 1), when AXI4_Lite bus is by this IP kernel incoming for the value of address and configuration register
When, the value of configuration register can accordingly be updated；The transmission of descriptor is also such, is only carried out by AXI4 bus.
Agreement accelerating engine IP kernel of the present invention includes three parts：Sending module, receiver module and control module.Sending module
For completing segmentation, encapsulation and the transmission of data to be sent, its pass through AXI4-Stream channel reception data to be sent and including
Portion carries out segmentation and encapsulation, is then passed through AXI4-Stream channel transfer to ethernet mac controller.Receiver module is used
Merge in the decapsulation data completing data to be received, it passes through AXI4-Stream passage and receives from ethernet mac controller
Data, internally completes the decapsulation of data and is passed through AXI4-Stream channel transfer to other IP kernel examples after merging
As dma controller etc..Control module is used for completing the configuration to the control register being applied to this IP kernel, will be by AXI4-
The value for configuring the control register being applied to this IP kernel of Lite bus transfer carry out being stored and transmitted to sending module and
Receiver module.
Fig. 2 show the structured flowchart of agreement accelerating engine IP kernel sending module of the present invention, sends descriptor including transmission
Send descriptor control unit, send high-speed data transmission high-speed channel control unit, send data buffer storage unit, transmission
FCoE data segmentation unit, the lossless ether net unit of transmission, transmit queue select unit, transmission data packaging unit, transmission are retouched
State symbol administrative unit and send frame buffer unit.
Send the transmission that descriptor control unit is used for completing to send descriptor.Specifically, when there being data to need to send,
UNE adapter cpu can control AXI4 bus to be sent to transmission descriptor control unit by sending descriptor first, sends
The descriptor of different flow categorical data is sent to transmission descriptor administrative unit and carries out classification storage by descriptor control unit.
In embodiments of the present invention, different flow type may include：Interprocess communication IPC flow that low latency requires, lossless requirement
Tcp/ip communication LAN flow of storage Network Communication SAN traffic, permission certain time-delay and packet loss etc..In embodiments of the present invention, IP
Core spans several different clock zones, and the clock due to different IP kernels can be different, by IP kernel of the present invention and other IP
Have to when nuclear phase connects solve the problems, such as cross clock domain, this unit can be related to the coupling of two clock zones：Pass to the present invention
The AXI4 bus clock domain of IP kernel descriptor, and the clock zone of IP kernel of the present invention.
Send high-speed channel control unit and be put into this IP for the data to be sent sending AXI4-Stream passage
Core.Specifically, send high-speed channel control unit and certain spy is chosen according to the descriptor quantity sending in descriptor administrative unit
Fixed descriptor, and corresponding for particular descriptor data to be sent is sent to by AXI4-Stream passage according to its content
Send high-speed channel control unit.Specifically, when certain is when the descriptor amount of selection is too many, this kind of descriptor can be selected.
Because data to be sent has various flow rate type, send high-speed channel control unit and can be controlled obtaining with certain polling sequence
Take the data to be sent of different flow type.Send high-speed channel control unit obtain different flow type data to be sent it
Afterwards, if common data to be sent, can be transferred to send data buffer storage unit；If FCoE data block to be sent,
Can be transferred to send FCoE data segmentation unit.In embodiments of the present invention, this unit can be related to two clock zones
Coupling：Transmit the clock zone of the AXI4-Stream passage of data to be sent, and the clock zone of IP kernel of the present invention.
Send data buffer storage unit to be used for caching general data to be sent.Specifically, single when sending high-speed channel control
When unit sends commonly data to be sent to transmission data buffer storage unit, simultaneously can transmitting function discharge pattern indication signal.Send out
Send data buffer storage unit, according to function flow type indication signal, the data belonging to different discharge pattern is put into different sons
Unit caches (in embodiments of the present invention, subelement caching refer to send data buffer storage unit inside subdivision for single virtual
Change each caching with traffic partition, not shown in Fig. 2).Send data buffer storage unit and can support that multiple subelements delay simultaneously
Deposit to adapt to the requirement of single virtualization and various flow data in UNE.When receiving the team that transmit queue select unit is sent
During array selecting signal, send data buffer storage unit and send the data that corresponding subelement caches to transmit queue select unit.
Send FCoE data segmentation unit to be used for completing segmentation and the encapsulation of FCoE data block to be sent.Specifically, send
The data block that high-speed channel control unit sends transmission FCoE data segmentation unit to includes sending the frame head frame of FCoE Frame
Tail template and the not segmented data block of a big section.Send the requirement according to Ethernet protocol largest frames for the FCoE data segmentation unit
Data block is cut into suitable size, and is that each section of partition data block adds suitably according to frame head postamble template in order
Frame head postamble, now passes through the FCoE Frame to be sent after adding and does not include CRC check value.Send FCoE data sectional
Frame to be sent for the FCoE handling well is transmitted by unit when receiving the queue selection signal that transmit queue select unit is sent
To transmit queue select unit.
Send lossless ether net unit for realizing the lossless ethernet feature of sending module, including the stream based on priority
Amount controls (Priority-based Flow Control, hereinafter referred to as PFC) frame transmitter and enhancement mode transmission to select
(Enhanced Transmission Select, hereinafter referred to as ETS) scheduler (not shown in figure 1).Specifically, when transmission nothing
Damage ether net unit receive from the threshold level signal of receiver module when, represent have in receiver module certain order caching surpass
Go out its caching capabilities, PFC transmitter can generate suitable timing value according to this signal for PFC data division, and adds PFC frame
Head is sent to transmission frame encapsulation unit as PFC frame, and the PFC frame now transmitting does not contain crc value.When the lossless ether net unit of transmission
Receive from receiver module transmission suspend vector when, ETS scheduler can be according to this signal suspension corresponding discharge categorical data
Send, and remove sending the data suspending vector instruction from ETS scheduler, now generate and be sent to transmit queue and select
The scheduling signals of unit are the next dispatch value needing discharge pattern data to be sent.In embodiments of the present invention, ETS adjusts
The rudimentary algorithm of degree is that the discharge pattern (such as IPC flow) for low delay distributes strict preference algorithm, for the flow of no frame losing
Type (such as SAN traffic) distributes weight polling algorithm, for not only allowing frame losing but also allowing assignment of traffic (the such as LAN of time delay
Flow) polling algorithm.
Transmit queue select unit is used for selecting the transmission of frame to be sent.Specifically, transmit queue select unit according to send out
The result of calculation sending the ETS scheduler in lossless ether net unit is sending data buffer storage unit and is sending FCoE data sectional list
Select frame suitably to be sent to be transmitted in unit, that is, be sent to transmission frame encapsulation unit.Meanwhile, sent one and taken second place every
Afterwards, this transmission frame type and size can be fed back to the lossless ether net unit of transmission, to facilitate ETS scheduler to complete the tune of next time
Degree work.
Send frame encapsulation unit to be used for encapsulating Frame to be sent.Specifically, when transmission frame encapsulation unit passes through to send
Queue select unit receive from send data buffer storage unit data or send lossless ether net unit data when, can to send out
Descriptor administrative unit application is sent to obtain its corresponding frame information sending in descriptor.Send frame encapsulation unit to be described according to it
The data that the information of symbol is to be sent forms suitable frame head postamble and is packaged.Pass through transmit queue when sending frame encapsulation unit
Select unit receives from when sending the data of FCoE data segmentation unit, can't send Frame for FCoE and form frame head frame
Tail (other kinds of frame is required for adding frame head postamble).Finally, send frame encapsulation unit and carry out CRC school for all frames to be sent
Test value to calculate and add CRC check value.Send frame encapsulation unit to pass the Frame to be sent encapsulating and CRC adds after completing
Deliver to transmission frame buffer unit.
Send descriptor administrative unit and be used for storage and management transmission descriptor.Specifically, send descriptor administrative unit
The transmission descriptor sending the different flow type that the transmission of descriptor control unit comes can be stored, send frame encapsulation unit receiving
Application after, send descriptor administrative unit can by corresponding transmission descriptor information be sent to transmission frame encapsulation unit for
Complete the encapsulation of data.After sending frame encapsulation unit and transmission frame is sent to transmission frame buffer unit, send descriptor pipe
Used descriptor can be marked by reason unit.When the descriptor of certain discharge pattern overuses, send description
Symbol administrative unit can send writing back of descriptor to sending descriptor control unit application, and application sends descriptor again.
Send frame buffer unit to be used for caching and send frame to be sent.Specifically, send frame buffer unit linkup transmit frame
Encapsulation unit and ethernet mac controller, when receiving the frame to be sent sending frame encapsulation unit, can delay to frame to be sent
Deposit, and be sent to ethernet mac controller and be transmitted.In embodiments of the present invention, send frame buffer unit and can complete 10G
Ethernet mac controller IP kernel and the coupling of two clock zones of IP kernel of the present invention.
Fig. 3 show the structured flowchart of agreement accelerating engine IP kernel receiver module of the present invention, including receive frame buffer unit,
Receive frame resolution unit, receiving queue select unit, receiving data buffer unit, receive FCoE data combination unit, receive no
Damage ether net unit, receive descriptor administrative unit, the reception descriptor control unit of transmission reception descriptor and receive high
The reception high-speed channel control unit of fast data.
Receive frame buffer unit to be used for caching frame to be received.Specifically, receive frame buffer unit and connect ethernet mac control
Device and reception frame resolution unit, when receiving from the frame to be received that ethernet mac controller transmits, can delay to frame to be received
Deposit, and be sent to reception frame resolution unit.Receive frame buffer unit and can complete 10G ethernet mac controller IP kernel and Ben Fa
The coupling of bright two clock zones of IP kernel.
Receive frame resolution unit to be used for completing the operation such as verification, parsing of reception frame.Specifically, receive frame resolution unit to connect
Receive from the frame receiving frame buffer unit, carry out CRC check inside reception frame resolution unit first, only verify successfully
Frame just can be saved and process.Next inside reception frame resolution unit, the frame head receiving frame is parsed to determine frame
Type.If normal frames, receive frame resolution unit and then the judgement of discharge pattern is carried out to it, then single to receiving descriptor management
Unit's application obtains suitable reception descriptor, and frame originating point information is inserted descriptor, finally common frame data is sent to reception team
Column selection unit；If PFC frame, then directly it is sent to the lossless ether net unit of reception and is further processed；If symbol
Close the FCoE Frame of certain exchange, be then sent to reception FCoE data combination unit and be further processed.
Receiving queue select unit is used for the other data needing caching in addition to FCoE data are classified.At this
In bright embodiment, other data refer to other all data except particular exchange FCoE Frame and PFC frame.Specifically, when connecing
Receive queue select unit to receive from when receiving the data sent of frame resolution unit and type identification signal, receiving queue selects single
Subelement corresponding in other data is activations to receiving data buffer unit can be cached by unit according to type identification signal.
Receiving data buffer unit is used for caching the general data that receiving queue select unit transmits.Specifically, work as reception
During the receiving queue selection signal data that the transmission of queue select unit comes, data can be cached to the son accordingly belonging to different automatically
Unit caches (in embodiments of the present invention, subelement caching refer to send data buffer storage unit inside subdivision for single virtual
Change each caching with traffic partition, not shown in Fig. 3).When in receiving data buffer unit, data volume reaches certain value, meeting
To receiving high-speed channel control unit application, other data are write back to other IP kernels (such as DMA etc.).If receiving data caches
In unit, data volume is too many and residual memory space is not enough, can generate threshold level signal so that sending module generates suitably
PFC frame is transmitted.
Receive FCoE data combination unit to be used for processing the specific FCoE Frame of merging.Specifically, when receiving from connecing
During the FCoE Frame of receipts frame resolution unit, receive FCoE data combination unit and can parse remaining FCoE frame originating point information, simultaneously
Data load effective in data is preserved.When next FCoE Frame arrives, receive FCoE data combination unit meeting
Continue to preserve effective data load and in order multiple valid data load are sorted and preserved and become data block.Work as data block
When reaching a certain size, receive FCoE data combination unit and can apply for by receiving high-speed channel control unit to other IP kernels
(such as DMA) transmits data block.
Receive lossless ether net unit for realizing the lossless ethernet feature of receiver module.Specifically, it is derived from when receiving
During the PFC data of reception frame resolution unit, receive lossless ether net unit and can parse PFC frame and generate transmission time-out vector.Connect
Receive lossless ether net unit and be sent to the ETS scheduling in the lossless ether net unit of transmission of sending module by sending time-out vector
Device, the transmission for suspending certain specific discharge pattern data is dispatched.
Receive descriptor administrative unit to be used for caching and manage the descriptor of receiver module.Specifically, receive descriptor pipe
Reason unit is used for caching and receives the reception descriptor (being not filled by) that the transmission of descriptor control unit comes, and carries out classification caching.When
Receive frame resolution unit will certain discharge pattern Frame frame information transmission come when, receive descriptor administrative unit can choose right
The reception descriptor answered is filled with.When the reception descriptor having been filled with reaches some, receive descriptor administrative unit
This part can be write back to reception high-speed channel control unit application to have been filled with receiving descriptor.
Receive descriptor control unit to be used for prefetching and write back reception descriptor.Specifically, when UNE adapter cpu
During by being used for controlling the value receiving the depositor starting to be sent to this IP kernel, the process that receives starts, and receives descriptor control unit
Can obtain a certain amount of reception descriptor then send it to reception descriptor administrative unit enter row cache.When reception descriptor
The reception descriptor that has been filled with of administrative unit storage reaches some, and receiving descriptor control unit can write receiving descriptor
Return to UNE adapter cpu.This unit can be related to the coupling of two clock zones：Transmission receives the AXI4 bus of descriptor
Clock zone, and the clock zone of IP kernel of the present invention.
Receive high-speed channel control unit to be used for writing back receiving data.Specifically, receiving high-speed channel control unit can be by
In receiving data buffer unit, the FCoE data block back of the general data of caching and reception FCoE data combination unit caching arrives
Other IP kernels such as dma controller etc..This unit is related to the coupling of two clock zones：During the AXIS passage of transmission receiving data
Clock domain, and the clock zone of IP kernel of the present invention.
Fig. 4 show the structured flowchart of agreement accelerating engine IP kernel control module of the present invention, including register configuration unit
With register management unit.
Register configuration unit is used for configuration control register.Specifically, when UNE adapter starts, AXI4-
The value of control register can be write register configuration unit by Lite bus.When there being control register to need to read, depositor
The value of control register is sent to AXI4-Lite bus by dispensing unit.This unit can be related to the coupling of two clock zones：
AXI4 bus clock domain, and the clock zone of IP kernel of the present invention.
Register management unit is used for managing IP kernel internal control registers of the present invention.Specifically, when control register needs
During certain unit of transmission/reception module to be configured, the value of control register is sent to corresponding list by register management unit
Unit.
Fig. 5 show the schematic diagram that agreement accelerating engine IP kernel of the present invention sends data flow.FCoE UNE is fitted first
Fitter C PU can control the write of AXI4 bus to send descriptor to transmission descriptor control unit.Receiver module can be sent to transmission
Two signals of module：Threshold level signal and transmission suspend vector.When there being data to be transmitted, from AXI4-Stream at a high speed
The data to be sent that data channel transmission comes is sent to transmission data buffer storage unit or transmission by high-speed channel control unit
FCoE data segmentation unit.If other data, then other data entrance transmission data buffer storage unit carries out classification caching；As
Fruit is FCoE data block, then enter transmission FCoE data segmentation unit and carry out segment encapsulation.So latter two data enters and sends team
Column selection unit is transmitted selecting.Send lossless ether net unit to be carried out according to threshold level signal and transmission time-out vector
PFC framing and ETS scheduling, and it is sent to transmit queue select unit with reference to dispatching algorithm generation scheduling signals.Transmit queue
Select unit is transmitted selecting according to this scheduling signals.Data after sending selection and processing enters and sends frame encapsulation unit
Carry out framing processing and encapsulation, now may require that and send interpolation and the CRC interpolation that descriptor carries out frame information.Finally by after framing
Transmission frame be sent to transmission frame buffer unit, wait to be sent.
Fig. 6 show the schematic diagram of agreement accelerating engine IP kernel receiving data stream of the present invention.Receive in log-on data first
When, AXI4 bus can be sent to the unfilled reception descriptor receiving descriptor control unit a certain amount of different flow type.
When there being frame to need to receive, receive frame and can enter reception frame buffer unit.Then it is sent to reception frame resolution unit by receiving frame
Verified and parsed, frame information is sent to and receives the filling that descriptor administrative unit is described symbol.Frame through parsing
Remove frame head postamble (referred to as data), other data enter receiving data by the reception selection function of receiving queue select unit
Buffer unit carries out classification caching.FCoE data enters merging and the caching that FCoE receiving data combining unit carries out data.PFC
Data enters the lossless ether net unit of reception and carries out the parsing of frame to generate transmission time-out vector.Eventually pass the FCoE number of caching
It is sent to AXI4-Stream passage according to block and other data by receiving high-speed channel control unit.Send time-out vector to connect
Receive threshold signal and be sent to sending module.And fill the reception descriptor completing and write back via AXI4 bus.
The IP kernel that the present invention provides can be controlled by FCoE UNE adapter cpu, is specifically designed for Ethernet light
The needs of hardware handles FCoE Frame in fine passage field, using full duplex mode of operation, work real-time high-efficiency, data throughput
Amount is big, and transfer rate is high, and is capable of Lossless transport and supports virtualization.
As it will be easily appreciated by one skilled in the art that the foregoing is only presently preferred embodiments of the present invention, not in order to
Limit the present invention, all any modification, equivalent and improvement made within the spirit and principles in the present invention etc., all should comprise
Within protection scope of the present invention.
Claims (7)
1. a kind of FCoE agreement accelerating engine IP kernel based on AXI4 bus architecture, including sending module, receiver module；Wherein,
Described sending module includes：Send descriptor control unit, send descriptor for transmission；Send high-speed channel and control list
Unit, for receiving data to be sent, wherein said data to be sent includes general data and FCoE data block；Send descriptor pipe
Reason unit is used for storing and manage described transmission descriptor；And send frame buffer unit, for caching and sending frame to be sent；
Described receiver module includes：Receive frame buffer unit, for caching frame to be received；Receive descriptor administrative unit, be used for
Caching and filling receive descriptor；Receive descriptor control unit, be used for prefetching and write back described reception descriptor；And receive
High-speed channel control unit, for writing back the general data of receiving data buffer unit caching and receiving FCoE data combination unit
The FCoE data block of caching；
It is characterized in that,
Described sending module also includes：Send data buffer storage unit, for caching described general data to be sent；Send FCoE
Data segmentation unit, forms FCoE Frame to be sent for splitting and encapsulating described FCoE data block to be sent；Send no
Damage ether net unit, be used for completing the generation of PFC frame and ETS scheduling；Transmit queue select unit, for dispatching according to described ETS
Select to send described general data and described FCoE Frame to be sent；Send frame encapsulation unit, for retouching according to described transmission
State symbol encapsulation described general data to be sent and described PFC frame, and to the Frame after encapsulation and described FCoE number to be sent
Carry out CRC according to frame and add formation frame to be sent；Described PFC frame refers to the flow control frame based on priority, and described ETS scheduling is
Refer to enhancement mode transmission selection scheduling；
Described receiver module also includes：Receive frame resolution unit, for completing verification to described frame to be received, parsing to be formed
General data, type identification signal, PFC frame and FCoE Frame；Receiving queue select unit, for according to described reception frame solution
The described type identification signal behavior that analysis unit generates receives the described general data after parsing；Receiving data buffer unit, uses
In the described general data of caching；Receive FCoE data combination unit, form FCoE for merging and caching described FCoE Frame
Data block；Receive lossless ether net unit, for parsing PFC frame and generating transmission time-out vector, to suspend particular flow rate type
The transmission scheduling of data；Described FCoE agreement accelerating engine IP kernel also includes control module, and this control module includes：Depositor is joined
Put unit, be applied to the control register of described FCoE agreement accelerating engine IP kernel for configuration, and register management unit,
For managing described control register, when described control register needs certain that configure described sending module or described receiver module
During individual unit, the value of described control register is sent to corresponding units by described register management unit.
2. the FCoE agreement accelerating engine IP kernel based on AXI4 bus architecture as claimed in claim 1 is it is characterised in that described
FCoE agreement accelerating engine IP kernel is set up on AXI4 bus, AXI4-Lite bus and AXI4-Stream high-speed channel basis
On, it is controlled by FCoE network adapter cpu.
3. the FCoE agreement accelerating engine IP kernel based on AXI4 bus architecture as claimed in claim 1 or 2 it is characterised in that
Described sending module each unit specifically for：
Described transmission descriptor control unit is used for transmitting described transmission descriptor, and when needing to send data, FCoE network is fitted
Described transmission descriptor first can be sent to described transmission descriptor control unit by Fitter C PU, and described transmission descriptor controls single
The transmission descriptor of different flow categorical data is sent to described transmission descriptor administrative unit and carries out classification storage by unit；
Described transmission high-speed channel control unit is used for receiving described data to be sent, and AXI4-Stream high-speed channel will need
, to described transmission high-speed channel control unit, described transmission high-speed channel control unit is according to described pending for the data is activation sending
Send the discharge pattern of data, described general data and function flow type indication signal are sent to described transmission data buffer storage list
Unit, described FCoE data block is sent to described transmission FCoE data segmentation unit；
Described transmission data buffer storage unit be used for cache described general data to be sent, described transmission data buffer storage unit according to
The general data belonging to different discharge pattern is put into different subelements cachings by described function flow type indication signal, with
Realize single virtualization and traffic partition；
Described transmission FCoE data segmentation unit is exclusively used in merging and the described FCoE Frame of caching forms described FCoE data block,
Described FCoE data block is cut into properly by described transmission FCoE data segmentation unit according to the requirement of Ethernet protocol largest frames
Size, and be that each section of partition data block suitable frame head postamble of interpolation forms described FCoE Frame in order, and receiving
During the queue selection signal sent to described transmit queue select unit, described FCoE Frame is sent to described transmit queue
Select unit；
The lossless ether net unit of described transmission is used for completing the generation of described PFC frame and described ETS scheduling, when described transmission is lossless
Ether net unit receive from the threshold level signal of described receiver module when, can according to described threshold level signal be PFC number
According to generate suitable timing value, and add PFC frame head formed described PFC frame be sent to described transmission frame encapsulation unit part；When
Described send lossless ether net unit receive from described receiver module transmission suspend vector when, can according to described send suspend
Vector suspends the transmission of corresponding discharge categorical data, and the described data sending time-out vector instruction is moved from ETS scheduler
Remove；
Described transmit queue select unit is used for selecting to send described general data according to described ETS scheduling and described FCoE is pending
Send Frame, after being sent completely every time, the data type being sent and size can be fed back to the lossless Ethernet of described transmission
Unit；
The described frame encapsulation unit that sends is used for sending descriptor encapsulation described general data to be sent and described PFC according to described
Frame, and the Frame after encapsulation and described FCoE Frame to be sent are carried out with CRC interpolation formation frame to be sent, when described transmission
When frame encapsulation unit receives described general data to be sent and described PFC frame, to described transmission descriptor administrative unit application
Obtain its corresponding frame information sending in descriptor；
Described transmission descriptor administrative unit is used for storing and manage described transmission descriptor, and receiving, described transmission frame encapsulation is single
After the application of unit, corresponding transmission descriptor information can be sent to described transmission frame encapsulation by described transmission descriptor administrative unit
Unit is to complete the encapsulation of data；
Described transmission frame buffer unit is used for caching and send described frame to be sent, when the institute receiving described transmission frame encapsulation unit
When stating frame to be sent, row cache can be entered to described frame to be sent, and be sent to ethernet mac controller to be transmitted.
4. the FCoE agreement accelerating engine IP kernel based on AXI4 bus architecture as claimed in claim 3 is it is characterised in that described
Send the coupling that descriptor control unit completes two clock zones：AXI4 bus clock domain and described FCoE agreement accelerating engine IP
The clock zone of core；Described transmission high-speed channel control unit completes the coupling of two clock zones：The clock of AXI4-Stream passage
Domain and the clock zone of described FCoE agreement accelerating engine IP kernel；Described transmission frame buffer unit completes the coupling of two clock zones：
The clock zone of ethernet mac controller and the clock zone of described FCoE agreement accelerating engine IP kernel.
5. the FCoE agreement accelerating engine IP kernel based on AXI4 bus architecture as claimed in claim 1 or 2 it is characterised in that
Described receiver module each unit specifically for：
Described reception frame buffer unit is used for caching described frame to be received, described in receiving and transmitting from ethernet mac controller
During frame to be received, described frame to be received can be entered with row cache and be sent to described reception frame resolution unit；
Described receive frame resolution unit be used for completing verification to described frame to be received, parsing to form general data, type is sentenced
Level signal, PFC frame and FCoE Frame, carry out CRC school to described frame to be received first inside described reception frame resolution unit
Test, then the frame head verifying successfully frame to be received is parsed to determine its type, if normal frames, then flow is carried out to it
The judgement of type, then obtains corresponding reception descriptor to described reception descriptor administrative unit application, frame originating point information is filled out
Enter after corresponding reception descriptor forms general data and be sent to described receiving queue select unit；If PFC frame, then passed
Deliver to the lossless ether net unit of described reception；If FCoE Frame, then it is sent to described reception FCoE data and merges list
Unit；
Described receiving queue select unit is used for receiving, according to described, the described type identification signal behavior that frame resolution unit generates
Receive the described general data after parsing, receive, from described, general data and the type identification that frame resolution unit is sent when receiving
During signal, described receiving queue select unit can send described general data to described reception according to described type identification signal
Corresponding subelement caching in data buffer storage unit；
Described receiving data buffer unit is used for caching described general data, when in described receiving data buffer unit, data volume reaches
During to certain value, to described reception high-speed channel control unit application, its data can be write back to other IP kernels, if described reception
In data buffer storage unit data volume too many and when residual memory space is not enough, generate threshold level signal and send to described transmission mould
Block is transmitted with generating suitable PFC frame；
Described reception FCoE data combination unit is used for merging and cache described FCoE Frame and forms described FCoE data block, when
Receive from described receive frame resolution unit described FCoE Frame when, described reception FCoE data combination unit can parse surplus
Wherein effective data load is preserved by remaining FCoE frame originating point information simultaneously, when next FCoE Frame arrives, described
Receive FCoE data combination unit to may proceed to preserve its valid data load and in order multiple valid data load sort
And preserve the described FCoE data block of formation；
The lossless ether net unit of described reception is used for parsing PFC frame and generating described transmission suspending vector, and described transmission is suspended
Vector is sent to the ETS scheduler in the described transmission lossless ether net unit of described sending module, to suspend particular flow rate class
The transmission scheduling of type data；
Described reception descriptor administrative unit be used for caching and filling receive descriptor, when described reception frame resolution unit by certain
When the frame information transmission of discharge pattern Frame comes, described reception descriptor administrative unit can be chosen corresponding reception descriptor and enter
Row filling, when the reception descriptor having been filled with reaches some, described reception descriptor administrative unit can connect to described
Receive high-speed channel control unit application and write back the reception descriptor that this part has been filled with；
Described reception descriptor control unit is used for prefetching and write back described reception descriptor, when described reception descriptor management is single
The having been filled with of unit's storage receives descriptor when reaching some, and described reception descriptor control unit can be by the reception having been filled with
Descriptor receives descriptor and writes back to UNE adapter cpu；
The described high-speed channel control unit that receives is used for writing back the general data of described receiving data buffer unit caching and described
Receive the FCoE data block of FCoE data combination unit caching, and write back to other IP kernels.
6. the FCoE agreement accelerating engine IP kernel based on AXI4 bus architecture as claimed in claim 5 is it is characterised in that described
Receive the coupling that descriptor control unit completes two clock zones：AXI4 bus clock domain and described FCoE agreement accelerating engine IP
The clock zone of core；Described reception high-speed channel control unit completes the coupling of two clock zones：The clock of AXI4-Stream passage
Domain and the clock zone of described FCoE agreement accelerating engine IP kernel；Described reception frame buffer unit completes the coupling of two clock zones：
The clock zone of ethernet mac controller and the clock zone of described FCoE agreement accelerating engine IP kernel.
7. the FCoE agreement accelerating engine IP kernel based on AXI4 bus architecture as claimed in claim 1 or 2 it is characterised in that
Described register configuration unit completes the coupling of two clock zones：AXI4 bus clock domain and described FCoE agreement accelerating engine IP
The clock zone of core.
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| CN105978762B (en) * | 2016-04-27 | 2019-02-01 | 刘巍 | Redundant Ethernet data transmission set, system and method |
| CN105979190B (en) * | 2016-04-27 | 2019-06-28 | 北京小鸟看看科技有限公司 | A kind of method that realizing Displayport interface auxiliary communication channel and Displayport interface |
| CN106789609B (en) * | 2016-12-26 | 2019-12-27 | 中国科学院空间应用工程与技术中心 | FC-EG gateway, communication conversion method between fiber channel and Ethernet |
| CN110233798B (en) * | 2018-03-05 | 2021-02-26 | 华为技术有限公司 | Data processing method, device and system |
| CN111836024A (en) * | 2020-04-30 | 2020-10-27 | 电子科技大学 | Hybrid network system design based on video transmission |
| CN112783813B (en) * | 2021-01-20 | 2022-03-18 | 燕山大学 | Interconnectable HART communication protocol chip and use method thereof |
| CN113507424B (en) * | 2021-05-08 | 2023-11-21 | 中国电子科技集团公司第十四研究所 | FC engine frame receiving buffer management system |
| CN113127390B (en) * | 2021-05-13 | 2023-03-14 | 西安微电子技术研究所 | Multi-protocol data bus adapter engine architecture design method |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102075437A (en) * | 2011-02-12 | 2011-05-25 | 成都市华为赛门铁克科技有限公司 | Communication method, gateway and network |
| CN102185833A (en) * | 2011-03-30 | 2011-09-14 | 无锡众志和达存储技术有限公司 | Fiber channel (FC) input/output (I/O) parallel processing method based on field programmable gate array (FPGA) |
| CN203151539U (en) * | 2012-11-09 | 2013-08-21 | 北京航空航天大学 | AFDX terminal system virtual link layer IP core |
| WO2013165340A1 (en) * | 2012-04-30 | 2013-11-07 | Hewlett-Packard Development Company, L.P. | CONVERGED FABRIC FOR FCoE |
| CN103885840A (en) * | 2014-04-04 | 2014-06-25 | 华中科技大学 | FCoE protocol acceleration engine IP core based on AXI4 bus |
-
2014
- 2014-10-22 CN CN201410565988.6A patent/CN104378161B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102075437A (en) * | 2011-02-12 | 2011-05-25 | 成都市华为赛门铁克科技有限公司 | Communication method, gateway and network |
| CN102185833A (en) * | 2011-03-30 | 2011-09-14 | 无锡众志和达存储技术有限公司 | Fiber channel (FC) input/output (I/O) parallel processing method based on field programmable gate array (FPGA) |
| WO2013165340A1 (en) * | 2012-04-30 | 2013-11-07 | Hewlett-Packard Development Company, L.P. | CONVERGED FABRIC FOR FCoE |
| CN203151539U (en) * | 2012-11-09 | 2013-08-21 | 北京航空航天大学 | AFDX terminal system virtual link layer IP core |
| CN103885840A (en) * | 2014-04-04 | 2014-06-25 | 华中科技大学 | FCoE protocol acceleration engine IP core based on AXI4 bus |
Non-Patent Citations (2)
| Title |
|---|
| Kamiya S, Ichino K, Yasuda M, et al..Advanced FCoE: extension of fibre channel over ethernet.《The Workshop on Data Center - Converged and Virtual Ethernet Switching》.2011, * |
| 邹少义等.基于AXI4的FCoE协议加速引擎IP核的设计与实现.《2008年中国高校通信类院系学术研讨会议论文集（上册）》.2009, * |
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