CN104021246B - Self-adaptive length predictor applied to low power consumption fault-tolerant circuit - Google Patents
Self-adaptive length predictor applied to low power consumption fault-tolerant circuit Download PDFInfo
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Abstract
The invention belongs to the technical field of low power consumption integrated circuit design, and particularly relates to a self-adaptive length predictor applied to a low power consumption fault-tolerant circuit. Compared with a traditional fault-tolerant circuit based on prediction, an on-line timing sequence monitoring module based on a shadow register technology is added, the on-line timing sequence monitoring module monitors time delay errors in real time and transmits error indication signals to the predictor, the predictor is controlled to only select samples without errors for calculation, self-adaptive scaling of a prediction window is achieved, samples with errors are filtered out effectively, and prediction precision is improved. A self-adaptive prediction technology and a voltage over scaling technology are combined, the performance of a system can be guaranteed in a tolerant range, and voltages and power consumption are allowed to be further lowered. The self-adaptive length predictor applied to the low power consumption fault-tolerant circuit has the advantages of being simple in structure, low in expense, high in error correcting capacity and the like, and is especially applied to a low power consumption digital signal processing system based on a VOS technology.
Description
Technical field
The invention belongs to low power consumption integrated circuit technical field and in particular to a kind of be applied to low-power consumption fault tolerable circuit from
Adapt to length prediction device.
Background technology
In recent years due to mobile device, portable electronic, communication and other consumption electronic product markets fast development with
And the market demand makes IC designer increasingly pay attention to the power problemses of circuit.In a lot of applications, reduce power consumption
Have become as an of paramount importance problem of Design of Digital System.The market demand of low-power consumption has promoted a lot of Low-power Technology
Generation, current industry commonly use Low-power Technology have gated clock, gate voltage and multiple voltage domain design etc..In recent years
Research worker proposes voltage and crosses zoom technology（VOS: Voltage Over Scaling）, its principle is artificially to reduce electricity
Pressure, to reduce power consumption, causes critical path timing error simultaneously because voltage reduces, and now passes through to add fault tolerable circuit again
Technology carries out error correction；Finally, Circuits System can bring substantially reducing of power consumption with the sacrifice of certain signal to noise ratio.
Existing VOS fault tolerable circuit technology includes：Difference channel error correction, based on prediction error correction circuit, be based on low precision
The error correcting technique of stand-by circuit and self adaptation mistake cancellation technology etc., wherein the error correction circuit technology based on prediction, with it
The features such as circuit is simple, expense is little is widely applied, but the window of traditional predictor be often fixing it is impossible to according to
The state real-time change of data, limits the raising of fault freedom to a certain extent.It is pre- that the present invention proposes a kind of self adaptation
Surveying device, according to the error message of current data stream, can dynamically adjusting the length of prediction window, thus greatly improving error correction energy
Power, allows for the reduction further of voltage and power consumption.
Content of the invention
It is an object of the invention to provide a kind of adaptive-length predictor being applied to low-power consumption fault tolerable circuit, to improve
The precision of prediction of predictor, thus improving the error-detection error-correction ability of system, and then realizes voltage and power consumption reduces further.
The adaptive-length predictor being applied to low-power consumption fault tolerable circuit proposed by the present invention, its entire block diagram such as Fig. 1 institute
Show.This adaptive-length predictor is mainly by online timing error monitoring module, error indication signal propagation chain, predictor and choosing
Select output module composition.Wherein, timing error monitoring module and error indication signal propagation chain are each responsible for the inspection of timing error
Survey and propagate, error indication signal is followed data and propagated together as the additional information of data, and is connected within predictor
The control end of alternative multiplexer, control forecasting device is predicted using the sample that those do not malfunction；Output module is selected to bear
Duty selects former data or predictive value as final output.
In the present invention, described timing error monitoring module, as shown in Fig. 2 mainly touched by shadow register, XOR gate and D
Send out device to constitute；Wherein shadow register structure explanation as shown in figure 3, shadow register certain time by a time delay when
Clock drives, and needs a certain combination logic path ends of monitoring to be connected to the data input pin of shadow register；Shadow register
Output with the output of former depositor by an XOR gate contrast, if it is different, then thinking that sequential malfunctions, this error signal is passed through
Drive d type flip flop to be propagated by former clock, propagate series consistent with the pipeline series of former data path；Error indication signal
After leaving monitoring module, as the additional information of output data, continue through and propagated by former clock-driven d type flip flop, directly
To entering into inside predictor.
In the present invention, described predictor, as shown in figure 1, similar with traditional predictor structure, it is all by a low pass filtered
Ripple device is constituted, but in the present invention, the input of each coefficient both increases an alternative multiplexer, and the control of multiplexer
End processed is connected to the additional signal of corresponding data（I.e. error indication signal）If corresponding data malfunctions（I.e. error indication signal
For high level）, then select " 0 " as this coefficient, without error（I.e. error indication signal is low level）, then select former system
Number.Final effect is that the sample of error will not be used to calculate predictive value, it is achieved thereby that the effective shielding to wrong data
Dynamically scale with the self adaptation of prediction window.
In the present invention, described selection output module is a simple alternative multiplexer, the control port of this multiplexer
As the multiplexer in predictor, it is connected in error indication signal.Control signal is that the data of current data is effective
Property information, if current data error, multiplexer selects the predictive value of predictor as final output, without mistake, multiple
Select current data with device as output.
Traditional predictor length of window is often fixing, when wrong data occurs in prediction window, these
Wrong data still can be used to calculate predictive value, which results in the decline of precision of prediction.Self adaptation proposed by the present invention is long
Degree predictor, with less hardware spending, solves this problem well, improves precision of prediction, allow for voltage and work(
The reduction further of consumption.
Brief description
Fig. 1 is the structure overview diagram of adaptive predictor of the present invention.
Fig. 2 is timing error monitoring module diagram in the present invention.
Fig. 3 illustrates for shadow register.
Fig. 4 is the shortcoming explanation of Classical forecast device.
Fig. 5 illustrates for adaptive predictor.
Specific embodiment
The generation of error indication signal and to propagate be the first step of design adaptive-length predictor, different digital signal
Processing system, pipeline organization and critical path distribution are not quite similar, and therefore we will analyze original digital signal processing system first
The critical path distribution of system, determines which path needs to carry out the monitoring of sequential it is assumed that the operating clock cycle of system requirements is
T, target operating voltage is, whereinFor system worked well voltage,
For voltage scaling coefficient, then under target operating voltage, the path of had more than clock cycle T be required for monitored, that is,
Shadow register as shown in Figure 2 is added to monitor chain.If on the other hand it should be noted that not having on a certain level production line
Need the path of monitoring, then this level is increased without shadow register, only increasing a d type flip flop propagation error indication signal is
Can.
Second step is the design of predictor, determines maximum predicted window.In order to the deficiency of Classical forecast device is described, divide first
Analysis Fig. 4 in two kinds of situations, taking the Classical forecast device that prediction length is 6 as a example, situation 1 be its normal running conditions, now when
Front data Y (n+7) error, data Y (n+6) the .. .Y (n+1) that 6 before it are error-free is used to generate predictive value
；In the latter case, Y (n) error, equally, 6 data before it are used to generate pre- by Y (n-1) .. .Y (n-6)
Measured value, but in this 6 data Y (n-3) be also error data it is clear that this wrong data influences whether the precision of predictive value,
That is Classical forecast device does not take into account that the effectiveness of the data in prediction window, no matter when, the sample in window
This all can be used for calculating predictive value.
In order to solve this problem, improve precision of prediction and fault-tolerant ability, the present invention proposes adaptive-length predictor.
Fig. 5 gives the adaptive predictor structure chart that maximum predicted length of window is 6, and taking situation in Fig. 42 as a example, now sequential is wrong
The indication signal of monitoring module and the generation of indication signal propagation chain is " 001000 " by mistake, and this sequence is admitted in predictor, as
The control signal of alternative multiplexer, gates corresponding coefficient, and the wherein coefficient h 2 of error sample Y (n-3) is replaced by " 0 ",
That is sample Y (n-3) will not be used as calculating the predictive value of Y (n), prediction window length is changed into 5, thus shielding wrong sample
This impact to predictive value, thus achieves the Self Adaptive Control of prediction window.
In the final output end of system, the corresponding error indication signal of current data, equally it is used as alternative multiplexer
Control signal select final output, if wrong, select predictive value, otherwise select initial value.
Claims (3)
1. a kind of adaptive-length predictor being applied to low-power consumption fault tolerable circuit it is characterised in that：Supervised by online timing error
Control module, error indication signal propagation chain, predictor and selection output module composition；Wherein, timing error monitoring module and mistake
By mistake indication signal propagation chain is each responsible for detection and the propagation of timing error, error indication signal as data additional information with
Propagate with data, and be connected to the control end of the alternative multiplexer within predictor, control forecasting device is not had using those
The sample having error is predicted；Output module is selected to be responsible for selecting former data or predictive value as final output；
Described timing error monitoring module, is mainly made up of shadow register, XOR gate and d type flip flop；Wherein, shadow register
By a time delay, the clock of certain time drives, and needs a certain combination logic path ends of monitoring to be connected to shadow register
Data input pin；The output of shadow register is contrasted by an XOR gate with former depositor output, if it is different, then thinking
Sequential malfunctions, and the signal of error, by driving d type flip flop to be propagated by former clock, propagates the flowing water of series and former data path
Line series is consistent；Error indication signal after leaving monitoring module, as the additional information of output data, continue through by former when
The d type flip flop that clock drives is propagated, until entering into inside predictor.
2. the adaptive-length predictor being applied to low-power consumption fault tolerable circuit according to claim 1 it is characterised in that：Institute
State predictor, be made up of a low pass filter, and the input of each coefficient both increases an alternative multiplexer, this is multiple
It is error indication signal with the additional signal that the control end of device is connected to corresponding data, if corresponding data error is mistake instruction
Signal is high level, then select " 0 " as this coefficient, without error be error indication signal be low level, then select former
Coefficient.
3. the adaptive-length predictor being applied to low-power consumption fault tolerable circuit according to claim 2 it is characterised in that：Institute
State selection output module be an alternative multiplexer, the control port of this multiplexer as the multiplexer in predictor, all
It is attached in error indication signal；Control signal is the data validity information of current data, if current data error, multiple
Select the predictive value of predictor as final output with device, without mistake, multiplexer selects current data as output.
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| CN105700354B (en) * | 2016-01-31 | 2018-08-07 | 南通大学 | The intellegent sampling and detecting system of adjustable failure |
| CN110993005B (en) * | 2019-12-11 | 2021-03-26 | 海光信息技术股份有限公司 | Circuit structure, chip, training method and training device |
| CN113608575B (en) * | 2021-10-09 | 2022-02-08 | 深圳比特微电子科技有限公司 | Assembly line clock drive circuit, calculating chip, force calculating board and calculating equipment |
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| JP2001043259A (en) * | 1999-07-30 | 2001-02-16 | Toyooki Kogyo Co Ltd | Method for preparing power consumption while using computer system and computer readable recording medium storing program for realizing the method |
| CN1358310A (en) * | 2000-01-17 | 2002-07-10 | 松下电器产业株式会社 | Digital recording/data reproducing apparatus |
| CN1794187A (en) * | 2004-12-21 | 2006-06-28 | 日本电气株式会社 | Computer system and method for dealing with errors |
| CN102436524A (en) * | 2011-10-19 | 2012-05-02 | 清华大学 | Fuzzy reasoning method for soft fault diagnosis for analog circuit |
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| EP1859531A4 (en) * | 2005-03-11 | 2008-04-09 | Agency Science Tech & Res | Predictor |
| US7739524B2 (en) * | 2005-08-29 | 2010-06-15 | The Invention Science Fund I, Inc | Power consumption management |
| CN103093052A (en) * | 2013-01-25 | 2013-05-08 | 复旦大学 | Design method of low-power dissipation parallel finite impulse response (FIR) digital filter |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001043259A (en) * | 1999-07-30 | 2001-02-16 | Toyooki Kogyo Co Ltd | Method for preparing power consumption while using computer system and computer readable recording medium storing program for realizing the method |
| CN1358310A (en) * | 2000-01-17 | 2002-07-10 | 松下电器产业株式会社 | Digital recording/data reproducing apparatus |
| CN1794187A (en) * | 2004-12-21 | 2006-06-28 | 日本电气株式会社 | Computer system and method for dealing with errors |
| CN102436524A (en) * | 2011-10-19 | 2012-05-02 | 清华大学 | Fuzzy reasoning method for soft fault diagnosis for analog circuit |
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