CN103974069B - Reusable method for video coding and encoder - Google Patents
Reusable method for video coding and encoder Download PDFInfo
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Abstract
The embodiment of the present invention provides a kind of reusable method for video coding and encoder.The reusable method for video coding of the present invention, including：Obtain a two field picture；Inter prediction parameter acquiring according to pre-setting carries out the processing sequence of the predicting unit of inter prediction to described image, and the inter prediction parameter includes inter-frame forecast mode, the position of predicting unit, the type of predicting unit, the process time control information of predicting unit, next time prediction effect comparison algorithm, prediction jump information and end of identification；Processing sequence according to the predicting unit carries out inter prediction on described image position corresponding with the predicting unit successively, and described image is encoded according to the result of the inter prediction.The embodiment of the present invention solves PU selection algorithms and fixes and single, when application scenarios change causes that PU types and processing sequence change, it is necessary to carry out hardware modifications and just adapt to new scene, is unfavorable for the problem of coded system performance improvement and extension.
Description
Technical field
The present embodiments relate to video compression technology, more particularly to a kind of reusable method for video coding and coding
Device.
Background technology
In recent years, information technology is developed rapidly, and visual quality requirement of the people to video is improved constantly, high definition, ultra high-definition
And the appearance of 3D videos is subject to everybody extensive favor.But, the high-definition image of a 720P is uncompressed to take 2.2 million words
The memory space of (MByte, abbreviation MB) is saved, if a frame rate for video is 30 frames/second, even if only five minutes, data
Amount is also up to 19 GB (GigaByte, abbreviation GB), it is seen that meet the number shared by the high-quality video of people's demand
It is that very huge, uncompressed original video data even is all difficult to receive in the future now according to amount, either
Storage or transmission all there is a problem of very big.
Substantial amounts of redundancy is there is in video data, redundancy mainly includes following several classes, such as spatial redundancy, piece image
In if larger background area, then the pixel value in these regions is closely similar；Time redundancy, the company of video sequence
Generally conversion is little between former frame and a later frame in continuous frame, and with very strong similitude, the main distinction is that and only exist
It is slightly different on the locus of moving object between different frame；Statistical redundancy, is carried out using different coding methods to information
Entropy code, then the bit number for encoding whole symbol sebolic addressing will be not quite alike；Visual redundancy, the vision system of human eye is defective
, it is not that all of color, contrast and frequency can be recognized, therefore the appropriate precision for reducing image, human eye
Can't perceive, while the purpose of amount of compressed data can be reached.The reason for being aware of generation redundancy, it is possible to using corresponding
Method carries out redundancy elimination, realizes video compress, and the principle and starting point of video compression coding are that and eliminate to greatest extent
Various redundancies.Specifically, for different redundancies, video compression coding standard is eliminated using different strategies, for example,
Time redundancy is eliminated with inter prediction；Spatial redundancy is eliminated with infra-frame prediction；With conversion, quantify to eliminate visual redundancy；Compiled with entropy
Code eliminates statistical redundancy.
As described above, the purpose of video compression coding is the space of the code stream or storage video for saving transmission video, depending on
The processing procedure of frequency can include following steps：1) collection of video, the collection of video is obtained by images such as video cameras and set
It is standby to obtain；2) coding of video, compression coding is carried out to video sequence, obtains corresponding video code flow；3) after to compression coding
Video code flow be transmitted or store；4) video code flow for obtaining is decoded, obtains decoded video；5) user
Video is played out using display device, wherein, mainly include prediction (infra-frame prediction and interframe in the Video coding of the 2) step
Prediction), change quantization and coding.
Efficient video coding (High Efficiency Video Coding, abbreviation HEVC) (H.265) technology is used as new
Generation video encoding standard, is devoted to code efficiency than advanced video coding (Advanced Video Coding, abbreviation
AVC 50%) is improved.Inter prediction is main memory access and Calculation bottleneck in video compression coding, in order to improve inter prediction
Accuracy, increased merging (merge) predictive mode in HEVC standard, merge patterns are by comprising multiple adjacent blocks
Whole motion compensated area uses single movement parametric degree, the redundancy on removal kinematic parameter.In order to all from inter prediction
Optimal predictive mode is selected in merge patterns, it is necessary to enter to all of predicting unit (Prediction Unit, abbreviation PU)
Row multiple spot merge patterns are operated.Macro block extend to 64 × 64 by HEVC standard from 16 × 16, be easy to the pressure of high-resolution video
Contracting, at the same using coding unit (Coding Unit, abbreviation CU), predicting unit (Prediction Unit, abbreviation PU) and
Converter unit (Transform Unit, abbreviation TU) coding structure improves code efficiency, wherein, CU is used for cataloged procedure, PU
It is the elementary cell being predicted, TU is the elementary cell for carrying out transform and quantization.
But, in current implementation, be according to image application scenarios design merge patterns, its hardware configuration and
Specific application scenarios close-coupled, in logic realization, designs fixed PU processing sequences, and control PU's by state machine
Treatment, can so cause PU selection algorithms to be fixed and single, cause that PU types and processing sequence become when application scenarios change
During change, it is necessary to carry out hardware modifications and just adapt to new scene, be unfavorable for coded system performance improvement and extension.
The content of the invention
The embodiment of the present invention provides a kind of reusable method for video coding and encoder, is fixed with solving PU selection algorithms
And it is single, when PU processing sequences change, it is necessary to which carrying out hardware modifications could complete the problem of PU order upgradings.
In a first aspect, the embodiment of the present invention provides a kind of reusable method for video coding, including：
Obtain a two field picture；
Inter prediction parameter acquiring according to pre-setting carries out the treatment of the predicting unit of inter prediction to described image
Sequentially, the inter prediction parameter includes inter-frame forecast mode, the position of predicting unit, the type of predicting unit, predicting unit
Process time control information, prediction effect comparison algorithm, next time predict jump information and end of identification, wherein, it is described
Inter-frame forecast mode is used for the reconnaissance mode for indicating to carry out the inter prediction, and the position of the predicting unit is described for indicating
Predicting unit location in coding unit layer, the process time control information of the predicting unit is used to indicate described
The duration of inter prediction is carried out on image position corresponding with the predicting unit；The prediction effect comparison algorithm is used to indicate
Compare the algorithm of the result of the inter prediction, the jump information of prediction next time is used to indicate to carry out the interframe next time
The coding unit layer of prediction；
Processing sequence according to the predicting unit is enterprising in described image position corresponding with the predicting unit successively
Row inter prediction, and described image is encoded according to the result of the inter prediction.
It is described according to the predicting unit with reference in a first aspect, in the first possible implementation of first aspect
Processing sequence carry out inter prediction on described image position corresponding with the predicting unit successively, and according to the interframe
The result of prediction is encoded to described image, including：
Processing sequence according to the predicting unit obtains the corresponding interframe of the pending predicting unit successively
Prediction Parameters, on described image position corresponding with the predicting unit carry out interframe pre- according to the inter prediction parameter
Survey；
Result according to the inter prediction is encoded to described image.
With reference to the first possible implementation of first aspect or first aspect, second in first aspect is possible
In implementation, the processing sequence according to the predicting unit obtains the corresponding institute of the pending predicting unit successively
Inter prediction parameter is stated, frame is carried out on described image position corresponding with the predicting unit according to the inter prediction parameter
Between predict, including：
Processing sequence according to the predicting unit obtains the corresponding interframe of the pending predicting unit successively
Prediction Parameters, and position according to the predicting unit, the type of predicting unit determine the predicting unit in described image
Corresponding position；
According to the inter-frame forecast mode, predicting unit process time control information in described image corresponding position
On carry out the inter prediction, and pass through the process time control information of the predicting unit determine described in carry out the interframe pre-
The duration of survey；
The algorithm of the result of the inter prediction is determined according to the prediction effect comparison algorithm, and according to described pre-
Surveying effect comparison algorithm carries out treatment acquisition comparative result to the result of the inter prediction.
With reference to second possible implementation of first aspect, in the third possible implementation of first aspect
In, the result according to the inter prediction is encoded to described image, including：
Coded system is determined according to the comparative result and described image is encoded.
With reference to first aspect, first aspect second to the third in any one possible implementation, in first party
In the 4th kind of possible implementation in face, before one two field picture of the acquisition, also include：
The inter prediction parameter is pre-set according to image application scenarios or hardware capabilities, and preserves the inter prediction
Parameter.
Second aspect, the embodiment of the present invention provides a kind of encoder, including：Processor, memory and addressable controller；
The memory, for store video images and inter prediction parameter, the inter prediction parameter includes that interframe is pre-
Survey pattern, the position of predicting unit, the type of predicting unit, the process time control information of predicting unit, prediction effect compare
Algorithm, next time prediction jump information and end of identification；
The processor, for obtaining a two field picture from the memory, according to the inter prediction for pre-setting
Parameter carries out inter prediction to described image, and described image is encoded according to the result of the inter prediction；
The addressable controller, for carrying out addressing of address to the inter prediction parameter in the memory.
With reference to second aspect, in the first possible implementation of second aspect, the addressing register is specific to use
In the base address that the base address according to the currently processed coding unit layer of the inter prediction parameter acquiring, predicting unit are combined；
The cumulative quantity for obtaining treated predicting unit；By the base address of coding unit layer, the base address of predicting unit combination
And the quantity of treated predicting unit is entered row address and is added up, and obtains the pending inter prediction parameter described
Address in memory；
The processor, specifically for the ground according to the pending inter prediction parameter in the memory
Location obtains the pending inter prediction parameter from the memory, and according to the pending inter prediction parameter pair
Described image carries out inter prediction, and described image is encoded according to the result of the inter prediction.
Also include：
Trigger, the quantity for triggering the addressable controller is cumulative and is addressed in the memory.
With reference to the first possible implementation of second aspect, second aspect, second in second aspect is possible
In implementation, the processor determines described pre- specifically for the position according to the predicting unit, the type of predicting unit
Survey unit corresponding position in described image；According to the inter-frame forecast mode, the process time control information of predicting unit
The inter prediction, and the process time control information for passing through the predicting unit are carried out on corresponding position in described image
It is determined that the duration for carrying out the inter prediction；The inter prediction is determined according to the prediction effect comparison algorithm
The algorithm of result, and according to the prediction effect comparison algorithm to the result of the inter prediction carry out treatment acquisition compare knot
Really；Coded system is determined according to the comparative result and described image is encoded.
The embodiment of the present invention reusable method for video coding and encoder, by will be according to image application scenarios and hardware
What ability was pre-designed carries out the operating process formation inter prediction parameter of the predicting unit PU of inter prediction, and the interframe is pre-
Surveying parameter read-in memory, then read inter prediction parameter acquiring carries out the parameter information of HEVC codings, and performs HEVC codings,
The application scenarios of HEVC codings and the decoupling of hardware configuration are realized, PU selection algorithms is solved and is fixed and single, when application scenarios change
When becoming so that PU types and processing sequence change, it is necessary to carry out hardware modifications and just adapt to new scene, it is unfavorable for coding
The problem that systematic function is improved and extended.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
The accompanying drawing to be used needed for having technology description is briefly described, it should be apparent that, drawings in the following description are this hairs
Some bright embodiments, for those of ordinary skill in the art, without having to pay creative labor, can be with
Other accompanying drawings are obtained according to these accompanying drawings.
Fig. 1 is the flow chart of the reusable method for video coding embodiment of the present invention；
Fig. 2 is CU structural representations of the present invention；
Fig. 3 A are PU structural representations one of the present invention；
Fig. 3 B are PU structural representations two of the present invention；
Fig. 3 C are PU structural representations three of the present invention；
Fig. 3 D are PU structural representations four of the present invention；
Fig. 4 is PU combinations schematic diagram of the present invention；
Fig. 5 is PU execution sequences schematic diagram of the present invention；
Fig. 6 is inter prediction supplemental characteristic form schematic diagram of the present invention；
Fig. 7 is the structural representation of inventive encoder embodiment one；
Fig. 8 is the structural representation of inventive encoder embodiment two；
Fig. 9 is the structural representation of inventive encoder embodiment three；
Figure 10 is the reading address control module structural representation of inventive encoder；
Figure 11 is the comparison algorithm modular structure schematic diagram of inventive encoder；
Figure 12 realizes the flow chart of efficient video coding for inventive encoder.
Specific embodiment
To make the purpose, technical scheme and advantage of the embodiment of the present invention clearer, below in conjunction with the embodiment of the present invention
In accompanying drawing, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described embodiment is
A part of embodiment of the present invention, rather than whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art
The every other embodiment obtained under the premise of creative work is not made, belongs to the scope of protection of the invention.
Real-time in order to improve HEVC video compression codings of the invention, on the encoder by field programmable gate array
(Field Programmable Gate Array, abbreviation FPGA) or application specific integrated circuit (Application Specific
Integrated Circuit, abbreviation ASIC) HEVC video compression codings are realized, the programmable characteristic of FPGA or ASIC is caused
The inter predication process of merge patterns be it is reusable, can be with the number of real-time adjustment PU according to application scenarios and hardware capabilities
And order, different application schemes can be met, hardware configuration is decoupled out from application scenarios, greatly improve
The flexibility that merge is realized.
Fig. 1 is the flow chart of the reusable method for video coding embodiment of the present invention, as shown in figure 1, the side of the present embodiment
Method can include：
Step 101, one two field picture of acquisition；
In the present embodiment, image is shot and preserved by camera head, and encoder can directly from local
Image is got in memory.
The inter prediction parameter acquiring that step 102, basis pre-set carries out the predicting unit of inter prediction to image
Processing sequence；
In the present embodiment, inter prediction parameter includes inter-frame forecast mode, the position of predicting unit, the class of predicting unit
Type, the process time control information of predicting unit, next time prediction effect comparison algorithm, prediction jump information and end mark
Know, wherein, inter-frame forecast mode is used for the reconnaissance mode for indicating to carry out inter prediction, and the position of predicting unit is used for indication predicting
Unit location in coding unit layer, the process time control information of predicting unit is used to indicate in image and prediction list
The duration of inter prediction is carried out on the corresponding position of unit；Prediction effect comparison algorithm compares the result of inter prediction for instruction
Algorithm, predicts that jump information is used for the coding unit layer for indicating to carry out inter prediction next time next time.
In order to more effectively carry out the compression of data, HEVC employs more flexible mode and represents block structure：CU, PU with
And converter unit, wherein, CU be predicted, convert, quantifying and entropy code elementary cell, maximum CU is 64 × 64, most
Small coding unit is that 8 × 8, HEVC takes the mode of quaternary tree iteration to carry out the division of CU, and the shape of CU must be square
, i.e. the size of four blocks of quad-tree partition is duplicate, and Fig. 2 is CU structural representations of the present invention, as shown in Fig. 2
Include four layers CU layers altogether, be respectively 64 × 64,32 × 32,16 × 16 and 8 × 8；PU is the elementary cell being predicted, it
Shape can not be foursquare, CU can include that one or more PU, Fig. 3 A are PU structural representations of the present invention
One, Fig. 3 B are PU structural representations two of the present invention, and Fig. 3 C are PU structural representations three of the present invention, and Fig. 3 D show for PU structures of the present invention
It is intended to four, as shown in figs. 3 a-3d, the PU for carrying out inter prediction includes 2N × 2N, 2N × N, tetra- kinds of patterns of N × 2N and N × N, its
In, N represents 1/2nd of the specification of CU layers residing for PU, such as be in CU layers of current PU is 32 × 32, then PU 2N × 2N
It is that 32 × 32, PU 2N × N is that 32 × 16, PU N × 2N is that 16 × 32, PU N × N is 16 × 16；Converter unit is into line translation
With the elementary cell for quantifying, its size can be from 4 × 4 to 32 × 32, it is necessary to be foursquare, in inter prediction, conversion
The size of unit can be more than PU size, but no more than CU size.
Merge patterns are PU to be processed, it is necessary to be considered the order of different PU treatment.Fig. 4 is PU combination sides of the present invention
Formula schematic diagram, as shown in Figure 4, it is contemplated that the difference of application scenarios and hardware capabilities, it is necessary to merge performances it is different, cause place
The PU numbers and order of reason are also different, and for the popularity for supporting PU to select, each layer of CU can include 7 kinds of PU combinations：
1)PU2N×2N；2)PU2N×N；3)PUN×2N；4) PU2N × 2N and PUN × 2N；5) PU2N × 2N and PU2N × N；6)PUN
× 2N and PU2N × N；7) PUN × 2N, PU2N × N and PU2N × 2N.Each combination can correspond to various PU's
Operating process, including the integer that PU0, PU1, PU2 ... PUn, n can be any one more than 0, i.e., combination in above-mentioned 7,
No matter selecting which kind of combination carries out inter prediction, it is determined that PU processing sequence when can be according to application scenarios, hardware energy
Power, and the demand such as encoding precision, are specifically ranked up to the PU patterns in the combination.
For example, Fig. 5 is PU execution sequences schematic diagram of the present invention, CU layers is 32 × 32, and the PU of selection is combined as PU16 × 32
With PU32 × 32, i.e., 4) above-mentioned the plant combination, then corresponding to CU32 × 32, PU2N × 2N and PUN × 2N combinations
In the treatment to PU can be carried out according to the sequence shown in Fig. 5, blank parts be need it is idle go out certain periodicity, C1 is
PU16 × 32, C2 is PU32 × 32, and C1-0 merges (i.e. merge treatment) 0 expression to be done for the first time in first point being pre-selected
The merge treatment of PU16 × 32, C1-0 merges 1 and represents the merge that first time PU16 × 32 are done in second point being pre-selected
Treatment, C2 merges 0 and represents the merge treatment that PU32 × 32 are done in first point being pre-selected, and C2 merges 1 expression and selected in advance
Second point selected does the merge treatment of PU32 × 32, and C1-1 merges 0 expression to be done second in first point being pre-selected
The merge treatment of PU16 × 32, C1-1 merges 1 expression and is second merge of PU16 × 32 in second point being pre-selected
Treatment.Fig. 5 shows the PU processing sequences done for CU32 × 32 layer, is capable of achieving to CU32 × 32 according to the order
HEVC is encoded, optionally, determine the 4) plant combination after, HEVC codings can also be carried out with other PU orders, separately
Outward, 1) difference according to demand, it is also possible to determine other combinations, such as the plant, 3) the plant etc., and then can correspond to not
Sequentially, the final PU orders for determining are related to application scenarios and hardware capabilities here, it is contemplated that different scenes are to video for same PU
The factor such as pixel request, image definition and continuity, and the data processing limit that hardware maximum can bear designs
Sequentially, and the PU hardware configurations that have no effect in hardware configuration, i.e. the present embodiment of order can be general to suitable PU, lead to
Cross during coded program write into FPGA or ASIC, then memory is read by coded program and get default processing sequence, and most
HEVC is sequentially carried out according to this eventually and is encoded up expected encoding efficiency.
It is step 103, corresponding with the predicting unit in described image successively according to the processing sequence of the predicting unit
Inter prediction is carried out on position, and described image is encoded according to the result of the inter prediction.
In the present embodiment, the combination and processing sequence of PU are being determined according to image application scenarios and hardware capabilities
Afterwards, encoder sequentially forms inter prediction parameter according to this, and the inter prediction parameter is including every in HEVC encoding operation flows
The corresponding data message of one PU for choosing.Specifically, according to the process of above-mentioned determination PU orders, HEVC encoders are obtained
The follow-up operating process for carrying out HEVC codings is got, operating process includes how many PU numbers, in the inter prediction parameter just
Including how many data messages, when which PU each data message be HEVC coder processes to, the corresponding instructions of the PU, its
In, inter-frame forecast mode represents the mode of merge reconnaissances；The position of the current PU of positional representation of PU；PU types are represented where PU
CU layers, PU types and PU call numbers；PU process time control information represents the process time counter of current PU；Prediction effect
Comparison algorithm is represented and can weigh that in actual applications different performance and Different Logic realize cost, and the current PU of selection is in different phase
Using different comparative approach, mainly include absolute difference and (Sum of Absolute Differences, abbreviation：SAD) calculate
Method, absolute propagation difference and (Sum of Absolute Transformed Difference, abbreviation：) and the difference of two squares SATD
Value and (Sum of Squared Differences, abbreviation：SSD) algorithm；Prediction jump information is represented to have processed and worked as next time
CU layers of information after preceding PU next time where PU to be processed；End of identification represents whether current PU operations are last PU.
The inter prediction parameter that HEVC encoders will pre-set writes memory by bus, be stored in it is local, so as to
When the FPGA of follow-up HEVC encoders performs coded program, the letter to currently processed PU can be directly read from memory
Breath.
HEVC encoders read inter prediction parameter from memory, get the place of the PU that inter prediction is carried out to image
Make sequence in order, inter prediction is carried out on image position corresponding with PU successively further according to the PU processing sequences, and it is pre- according to interframe
The result of survey is encoded to image.The FPGA of HEVC encoders reads interframe pre- when coded program is run from memory
Parameter is surveyed, reading each time can get the information of current PU and the jump information of next PU, according to these PU's
Information coded program is the institute in the operating process that will be pre-designed by being capable of achieving HEVC codings, implementation procedure so repeatedly
There is being disposed one by one for PU, reach expected HEVC encoding efficiencies.
The present embodiment, by the prediction for carrying out inter prediction that will be pre-designed according to image application scenarios and hardware capabilities
The operating process of unit PU forms inter prediction parameter, and by the inter prediction parameter read-in memory, then read inter prediction
Parameter acquiring carries out the parameter information of HEVC codings, and performs HEVC codings, realizes the application scenarios and hardware knot of HEVC codings
The decoupling of structure, solves PU selection algorithms and fixes and single, causes that PU types and processing sequence change when application scenarios change
When, it is necessary to carry out hardware modifications and just adapt to new scene, be unfavorable for the problem of coded system performance improvement and extension.
Further, Fig. 6 is inter prediction supplemental characteristic form schematic diagram of the present invention, as shown in fig. 6, inter prediction parameter
The corresponding data messages of each PU in the operating process for including can be the data form storage with 32 bits in storage
In device, in this 32 bit, 5-0 bits：Totally 6 bit, represents the position of PU, wherein, 5-4 bits represent current PU in CU32 × 32
The particular location of layer, such as 00 represents CU32 × 32 in the upper left corner, and 01 represents CU32 × 32 in the upper right corner, and 10 represent the lower left corner
CU32 × 32,11 represent CU32 × 32 in the lower right corner；3-2 bits represent particular locations of the current PU in CU16 × 16 layer；1-0 ratios
Spy represents particular locations of the current PU in CU8 × 8 layer.13-8 bits：Totally 6 bit, represents the type of PU, wherein, 13-12 bits
Represent currently processed CU layer, such as 00 to represent currently processed be CU64 × 64,01 expression it is currently processed be CU32 × 32,
10 to represent currently processed be CU16 × 16, and 11 to represent currently processed be CU8 × 8；11-10 bits represent the pattern of PU, example
Such as 00 expression 2N × 2N；01 represents PU2N × N；10 represent PUN × 2N；11 represent PUN × N；9-8 bits represent PU indexes.17-
16 bits：Totally 2 bit, represents and predicts jump information next time, and what such as 00 expression was processed next time is CU64 × 64；01 represents
What is processed next time is CU32 × 32；What 10 expressions were processed next time is CU16 × 16；11 represent process next time be CU8 ×
8.19-18 bits：Totally 2 bit, represents prediction effect comparison algorithm, and such as 00 represents SAD algorithms；01 represents SATD algorithms；10
Represent SSD algorithms.20 bits：Totally 1 bit, represents end of identification.23-21 bits：Totally 3 bit, represents inter-frame forecast mode.
31-24：Totally 8 bit, represents time control.It should be noted that the data message form shown in Fig. 6 is of the present invention
One example of data form, the data form can also have other bit methods to set up, be not specifically limited herein.
Further, in the step of above method embodiment 103 according to the processing sequence of the predicting unit successively in institute
Stating carries out inter prediction on image position corresponding with the predicting unit, and according to the result of the inter prediction to the figure
As being encoded, concrete implementation method can be：Processing sequence according to the predicting unit obtains pending institute successively
The corresponding inter prediction parameter of predicting unit is stated, according to the inter prediction parameter in described image and the predicting unit
Inter prediction is carried out on corresponding position；Result according to the inter prediction is encoded to described image.
Specifically, HEVC encoders obtain the pending prediction successively according to the processing sequence of the predicting unit
The corresponding inter prediction parameter of unit, and position according to the predicting unit, the type of predicting unit determine it is described pre-
Survey unit corresponding position in described image；According to the inter-frame forecast mode, the process time control information of predicting unit
The inter prediction, and the process time control information for passing through the predicting unit are carried out on corresponding position in described image
It is determined that the duration for carrying out the inter prediction；The inter prediction is determined according to the prediction effect comparison algorithm
The algorithm of result, and according to the prediction effect comparison algorithm to the result of the inter prediction carry out treatment acquisition compare knot
Really；Coded system is determined according to the comparative result and described image is encoded.
HEVC encoders from memory after it have read inter prediction parameter, you can according to the data in inter prediction parameter
The processing sequence of acquisition of information PU, HEVC encoders are carried out on image position corresponding with predicting unit successively according to the order
Inter prediction, the i.e. degree of HEVC encoders after the data message for reading PU, such as the data message shown in Fig. 6, according to 13-
The information of 8 bits and 5-0 bits be would know that current PU position, CU layers and the CU layers use PU patterns and
The point of merge treatment, according to these information HEVC encoders can on the image with the PU opposite positions at inter prediction.
After HEVC coder processes complete current PU, the end of identification according to 25-24 bits determines whether HEVC codings terminate, if
It is not over, then HEVC encoders are obtained according to the jump information of prediction next time of 17-16 bits and carry out inter prediction next time
Jump information, i.e., the CU for processing next time layers, it is necessary to explanation, the sequence of positions of the PU for processing next time be it is fixed,
Such as four CU32 × 32, then the order for the treatment of can be the upper left corner, the upper right corner, the lower left corner, the lower right corner in CU32 × 32 layer
Order, relatively special is CU64 × 64, and therefore only one of which does not exist processing sequence.HEVC encoders can continue basis
The data message of next PU carries out inter prediction, and each layer of the corresponding PU orders of CU are identicals.If 25-24 bit tables
Show end coding, HEVC encoders terminate coding, it is necessary to explanation, if being currently CU8 × 8, end of identification need and
CU16 × 16, CU32 × 32, the end of identification of CU64 × 64 are while effectively, if being currently CU16 × 16, end of identification is needed
Will with CU32 × 32, CU64 × 64 end of identification simultaneously effectively, if being currently CU32 × 32, end of identification need and
The end of identification of CU64 × 64 effectively, if being currently CU64 × 64, directly terminates simultaneously.HEVC encoders are to figure
As being processed the result predicted according to prediction effect comparison algorithm when carrying out inter prediction, the volume optimal to obtain the image
Code mode, then encodes according to coded system to image.
Further, before the step of above method embodiment 101, also include：According to image application scenarios or hardware energy
Power pre-sets the inter prediction parameter, and preserves the inter prediction parameter.
Specifically, the coding of video is closely related with the hardware capabilities of application scenarios or encoder, therefore in default frame
Between predictive coding parameter when, it is necessary to consider the two factors.When the application scenarios of video change, it is meant that to the clear of video
The requirement such as clear degree, continuity all there occurs change, now need to adjust the operating process of PU, and hardware capabilities change in addition is represented
The ability of hardware handles data is raised and lowered, either which kind of change, it is also desirable to adjust the operating process of PU, above two feelings
, there is at least one situation and is accomplished by updating the operating process of the PU for carrying out inter prediction according to specific change, and generate in condition
New inter prediction parameter.
Fig. 7 is the structural representation of inventive encoder embodiment one, as shown in fig. 7, the encoder of the present embodiment can be with
Including：Processor 11, memory 12 and addressable controller 13, wherein, memory 12 is pre- for store video images and interframe
Parameter is surveyed, the inter prediction parameter includes that inter-frame forecast mode, the position of predicting unit, the type of predicting unit, prediction are single
The process time control information of unit, next time prediction effect comparison algorithm, prediction jump information and end of identification；Processor
11, for obtaining a two field picture from the memory, described image is entered according to the inter prediction parameter for pre-setting
Row inter prediction, and described image is carried out according to the result of the inter prediction；Addressable controller 13, in the storage
Addressing of address is carried out to the inter prediction parameter in device.
Further, addressable controller 13, specifically for according to the currently processed coding of the inter prediction parameter acquiring
The base address of elementary layer, the base address of predicting unit combination；The cumulative quantity for obtaining treated predicting unit；By the coding
The quantity of the base address, the base address that predicting unit is combined and treated predicting unit of elementary layer is entered row address and is tired out
Plus, obtain address of the pending inter prediction parameter in the memory；Processor 11, specifically for according to described
Address of the pending inter prediction parameter in the memory obtains the pending frame from the memory
Between Prediction Parameters, and inter prediction is carried out to described image according to the pending inter prediction parameter, and according to the frame
Between predict result described image is encoded.
The device of the present embodiment, can be used for performing the technical scheme of Fig. 1~Fig. 6 either method embodiments, and it realizes former
Reason is similar with technique effect, and here is omitted.
Fig. 8 is the structural representation of inventive encoder embodiment two, as shown in figure 8, the encoder of the present embodiment is in Fig. 7
On the basis of shown coder structure, further, can also include：Trigger 14, for triggering the addressable controller
Quantity is cumulative and is addressed in the memory.
The device of the present embodiment, can be used for performing the technical scheme of any one of Fig. 1~Fig. 6 embodiment, its realization
Principle is similar with technique effect, and here is omitted.
Further, processor 11, institute is determined specifically for the position according to the predicting unit, the type of predicting unit
State predicting unit corresponding position in described image；Process time control according to the inter-frame forecast mode, predicting unit
Information carries out the inter prediction, and the process time control for passing through the predicting unit on corresponding position in described image
The duration of the inter prediction is carried out described in information determination；Determine that the interframe is pre- according to the prediction effect comparison algorithm
The algorithm of the result of survey, and according to the prediction effect comparison algorithm to the result of the inter prediction carry out treatment acquisition compare
As a result；Coded system is determined according to the comparative result and described image is encoded.
Using two specific embodiments, the technical scheme to Fig. 7 and Fig. 8 shown device embodiments below is carried out specifically
It is bright.
Fig. 9 is the structural representation of inventive encoder embodiment three, as shown in figure 9, the encoder of the present embodiment can be with
Including：Memory module 11, address control module 12 of reading, address state of a control machine module 13, comparison algorithm module 14, bus 15 with
And read parameter acquisition module 16.Inter prediction parameter is write in memory module 11 by bus 15, address state of a control machine mould
The reading of the trigger message of block 13, i.e. triggering are read address control module 12 and inter prediction parameter are read in memory module 11, read ground
After location control module 12 receives reading triggering, according to the address that inter prediction parameter acquiring reads so that memory module 11 is exported
The inter prediction parameter stored in the address, including PU types, PU positions, prediction effect comparison algorithm etc., comparison algorithm module
14 perform corresponding algorithm according to prediction effect comparison algorithm, and export result of calculation, there is above-mentioned output information, HEVC codings
The program of device can complete HEVC codings.
Further, Figure 10 is the reading address control module structural representation of inventive encoder, as shown in Figure 10, Fig. 9
In reading address control module 12 include：CU layers of selecting module 21, PU combination selecting module 22, current PU determining modules 23 and
Address accumulator module 24, wherein, CU layers of selecting module 21, for the base according to currently processed CU layers of inter prediction parameter acquiring
Address；PU combines selecting module 22, for combining corresponding base address according to the currently used PU of inter prediction parameter acquiring；When
Preceding PU determining modules 23, for determining currently processed PU flows address according to the counting situation of PU flows；Address accumulator module
24, for currently processed CU layers of base address, currently used PU to be combined into corresponding base address, currently processed PU flows
Address is added up, and obtains reading address in a storage module.Read address control module above-mentioned three adds up, to storage mould
Block exports current reading address, to realize the read operation of memory module.
Further, Figure 11 is the comparison algorithm modular structure schematic diagram of inventive encoder, as shown in figure 11, in Fig. 9
Comparison algorithm module 14 include：Interpolating module 31, the first algoritic module 32, the second algoritic module 33, third algorithm module 34
And arithmetic result processing module 35, wherein interpolating module 31, the residual values for obtaining video；First algoritic module 32,
Two algoritic modules 33 and third algorithm module 34 are respectively used to realize three kinds of distortion factor optimization algorithms that these three algorithms are for example
Can be SAD algorithms, SATD algorithms and SSD algorithms；Arithmetic result processing module 35, for the data lattice performed according to current PU
Prediction effect comparison algorithm in formula is processed the result of calculation of respective algorithms.
Figure 12 realizes the flow chart of efficient video coding for inventive encoder, as shown in figure 12, the flow of the present embodiment
Suitable for the structure of encoder embodiment shown in Fig. 7~Figure 11, the flow includes：
The inter prediction parameter that s101, processor will be pre-designed writes memory by bus；
The inter prediction parameter of s102, processor verification write-in memory；
S103, processor proceed by Video coding；
S104, processor read inter prediction parameter according to addressable controller from memory；
S105, processor carry out inter prediction according to inter prediction parameter to image；
In the present embodiment, processor can divide treatment branch according to the combination of PU, for example, the PU combination bags shown in Figure 10
Included seven kinds of patterns, each pattern can correspond to a treatment branch, processor when inter prediction is carried out, as long as according to frame
Between Prediction Parameters obtain current PU combinations, you can processed in corresponding branch.
S106, processor complete the inter prediction of the currently processed corresponding image-region of maximum coding unit；
In the present embodiment, image is divided into multiple regions according to the specification of maximum coding unit, and each region is according to interframe
PU processing sequences in Prediction Parameters carry out inter prediction, processor respectively to each region according to default PU orders at
Reason.
S107, processor judge whether all to be disposed image, otherwise turn s108, are, turn s109；
In the present embodiment, processor first judges whether after the corresponding image-region of maximum coding unit has been processed
Full frame images are processed, i.e., whether has also had the image-region of no treatment, if be disposed, processor has terminated to regard
Frequency is encoded, and starts, for the default inter prediction parameter of new image, to re-encode, if be not disposed also, processor
Continue reading inter prediction parameter carries out inter prediction to next image-region.
S108, processor start to carry out inter prediction to the corresponding image-region of next maximum coding unit, turn to go
s104；
S109, processor terminate Video coding, turn to remove s101.
One of ordinary skill in the art will appreciate that：Realizing all or part of step of above-mentioned each method embodiment can lead to
The related hardware of programmed instruction is crossed to complete.Foregoing program can be stored in a computer read/write memory medium.The journey
Sequence upon execution, performs the step of including above-mentioned each method embodiment；And foregoing storage medium includes：ROM, RAM, magnetic disc or
Person's CD etc. is various can be with the medium of store program codes.
Finally it should be noted that：Various embodiments above is merely illustrative of the technical solution of the present invention, rather than its limitations；To the greatest extent
Pipe has been described in detail with reference to foregoing embodiments to the present invention, it will be understood by those within the art that：Its according to
The technical scheme described in foregoing embodiments can so be modified, or which part or all technical characteristic are entered
Row equivalent；And these modifications or replacement, the essence of appropriate technical solution is departed from various embodiments of the present invention technology
The scope of scheme.
Claims (8)
1. a kind of reusable method for video coding, it is characterised in that including：
Obtain a two field picture；
Inter prediction parameter acquiring according to pre-setting carries out the processing sequence of the predicting unit of inter prediction to described image,
The inter prediction parameter includes inter-frame forecast mode, the position of predicting unit, the type of predicting unit, the treatment of predicting unit
Time control information, next time prediction effect comparison algorithm, prediction jump information and end of identification, wherein, the interframe is pre-
Survey pattern is used for the reconnaissance mode for indicating to carry out the inter prediction, and the position of the predicting unit is used to indicate the prediction single
Unit the location of in coding unit layer, the process time control information of the predicting unit be used to indicating described image with
The duration of inter prediction is carried out on the corresponding position of the predicting unit；The prediction effect comparison algorithm compares institute for instruction
The algorithm of the result of inter prediction is stated, the jump information of prediction next time is used to indicate to carry out the inter prediction next time
The coding unit layer；
Processing sequence according to the predicting unit carries out frame on described image position corresponding with the predicting unit successively
Between predict, and described image is encoded according to the result of the inter prediction；
Before one two field picture of the acquisition, also include：
The inter prediction parameter is pre-set according to image application scenarios or hardware capabilities, and preserves the inter prediction ginseng
Number.
2. method according to claim 1, it is characterised in that the processing sequence according to the predicting unit exists successively
Carry out inter prediction on described image position corresponding with the predicting unit, and according to the result of the inter prediction to described
Image is encoded, including：
Processing sequence according to the predicting unit obtains the corresponding inter prediction of the pending predicting unit successively
Parameter, inter prediction is carried out according to the inter prediction parameter on described image position corresponding with the predicting unit；
Result according to the inter prediction is encoded to described image.
3. method according to claim 2, it is characterised in that the processing sequence according to the predicting unit is obtained successively
Take the corresponding inter prediction parameter of the pending predicting unit, according to the inter prediction parameter described image with
The predicting unit carries out inter prediction on corresponding position, including：
Processing sequence according to the predicting unit obtains the corresponding inter prediction of the pending predicting unit successively
Parameter, and position according to the predicting unit, the type of predicting unit determine predicting unit correspondence in described image
Position；
According to the inter-frame forecast mode, predicting unit process time control information in described image corresponding position it is enterprising
The row inter prediction, and carry out the inter prediction described in the process time control information determination for passing through the predicting unit
Duration；
The algorithm of the result of the inter prediction is determined according to the prediction effect comparison algorithm, and according to the prediction effect
Fruit comparison algorithm carries out treatment to the result of the inter prediction and obtains comparative result.
4. method according to claim 3, it is characterised in that the result according to the inter prediction is to described image
Encoded, including：
Coded system is determined according to the comparative result and described image is encoded.
5. a kind of encoder, it is characterised in that including：Processor, memory and addressable controller；
The memory, for store video images and inter prediction parameter, the inter prediction parameter includes inter prediction mould
Formula, the position of predicting unit, the type of predicting unit, the process time control information of predicting unit, prediction effect comparison algorithm,
Jump information and end of identification are predicted next time；
The processor, for obtaining a two field picture from the memory, according to the inter prediction parameter for pre-setting
Inter prediction is carried out to described image, and described image is encoded according to the result of the inter prediction；
The addressable controller, for carrying out addressing of address to the inter prediction parameter in the memory；
The processor, is additionally operable to pre-set the inter prediction parameter according to image application scenarios or hardware capabilities.
6. encoder according to claim 5, it is characterised in that the addressable controller, specifically for according to the frame
Between Prediction Parameters obtain the base address of currently processed coding unit layer, the base address of predicting unit combination；Cumulative acquisition treatment
The quantity of the predicting unit crossed；By the base address of coding unit layer, the base address of predicting unit combination and the treatment
The quantity of the predicting unit crossed is entered row address and is added up, and obtains ground of the pending inter prediction parameter in the memory
Location；
The processor, specifically for the address according to the pending inter prediction parameter in the memory from
The pending inter prediction parameter is obtained in the memory, and according to the pending inter prediction parameter to described
Image carries out inter prediction, and described image is encoded according to the result of the inter prediction.
7. the encoder according to claim 5 or 6, it is characterised in that also include：
Trigger, the quantity for triggering the addressable controller is cumulative and is addressed in the memory.
8. encoder according to claim 7, it is characterised in that the processor, specifically for single according to the prediction
The position of unit, the type of predicting unit determine the predicting unit corresponding position in described image；It is pre- according to the interframe
Survey pattern, the process time control information of predicting unit carry out the inter prediction on corresponding position in described image, and
By the process time control information of the predicting unit determine described in carry out the duration of the inter prediction；According to the prediction
Effect comparison algorithm determines the algorithm of the result of the inter prediction, and according to the prediction effect comparison algorithm to described
The result of inter prediction carries out treatment and obtains comparative result；Coded system is determined according to the comparative result and described image is entered
Row coding.
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