CN103904039B - The encapsulating structure of ultra-thin female glass substrate and method - Google Patents

The encapsulating structure of ultra-thin female glass substrate and method Download PDF

Info

Publication number
CN103904039B
CN103904039B CN201410127426.3A CN201410127426A CN103904039B CN 103904039 B CN103904039 B CN 103904039B CN 201410127426 A CN201410127426 A CN 201410127426A CN 103904039 B CN103904039 B CN 103904039B
Authority
CN
China
Prior art keywords
glass substrate
ultra
mounting groove
wiring
thin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201410127426.3A
Other languages
Chinese (zh)
Other versions
CN103904039A (en
Inventor
姜峰
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Center for Advanced Packaging Co Ltd
Original Assignee
National Center for Advanced Packaging Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National Center for Advanced Packaging Co Ltd filed Critical National Center for Advanced Packaging Co Ltd
Priority to CN201410127426.3A priority Critical patent/CN103904039B/en
Publication of CN103904039A publication Critical patent/CN103904039A/en
Application granted granted Critical
Publication of CN103904039B publication Critical patent/CN103904039B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

The present invention relates to the encapsulating structure of a kind of ultra-thin female glass substrate and method, it is according to technical scheme provided by the invention, the encapsulating structure of described ultra-thin female glass substrate, including glass substrate, described glass substrate has first surface and threeth surface corresponding with described first surface;It is concavely provided with some mounting grooves on the 3rd surface of glass substrate, forms isolation in the outer ring of mounting groove and hold district;Bottom land at described mounting groove forms the 4th surface;The conductive pole connecting first surface and the 4th surface it is provided with in glass substrate.The method that the present invention adopts glass substrate female thinning realizes the safety of ultrathin glass substrate and holds and interconnection between first surface and the 4th surface, avoiding existing method ultra-thin glass to hold safety coefficient low or use the interim bonding technology of high cost, make efficiency is low and the problem such as cost intensive.

Description

The encapsulating structure of ultra-thin female glass substrate and method
Technical field
The present invention relates to a kind of encapsulating structure and method, the encapsulating structure of especially a kind of ultra-thin female glass substrate and method, belong to the technical field of microelectronics Packaging.
Background technology
Along with people to the requirement of electronic product to the development in the directions such as miniaturization, multi-functional, environment-friendly type, people make great efforts to seek to do less and less by electronic system, integrated level is more and more higher, function does more and more, more and more stronger, thereby producing many new techniques, new material and newly design, wherein silicon through hole TSV and glass through hole TGV technology are exactly the Typical Representative of these technology.
Three-dimensional packaging technology, refers under the premise not changing package body sizes, stacks the encapsulation technology of two or more chip in same packaging body in vertical direction, it originates from the encapsulation of flash memory (NOR/NAND) and SDRAM.And silicon perforation (ThroughSiliconVia, TSV) is to realize one of key technology in three-dimension packaging.This owing to TSV relative to traditional mutual contact mode, it may be achieved total silicon encapsulates, mutually compatible with semiconductor CMOS process, and equal proportion can increase density of components, reduces interconnection delay problem, it is achieved at a high speed interconnection.
But owing to silicon through hole cost of manufacture is higher, limit its development;On the other hand glass substrate TGV(ThroughGlassVia) owing to it is with low cost, sealing performance is superior, insulating properties more preferably, high-frequency loss is relatively low, high-modulus, transparent, show the performances such as superior optical property and become a kind of preferred structure of silicon perforation (ThroughSiliconVia, the TSV) structure that continues.
For the processing of thin glass substrate TGV structure, it is always up a difficult problem for industrial circle.First: technical process is easily damaged, thus causing that yield is relatively low;On the other hand, adopt the special Technology-interim bonding techniques that holds can be effectively reduced the damage of thin glass substrate, promote ultra-thin glass and hold safety coefficient.But use the interim bonding technology of high cost, the problems such as make efficiency is low, cost intensive so that it is be difficult for industry and accepted.
In the file that publication number is CN102147674A, describe the manufacture method of a kind of ultra-thin glass.Glass processing becomes by open file the thickness ultrathin lightweight product within 0.05 to 0.5mm scope, and in order to solve the problem brought due to the strong vulnerability of ultra-thin glass, special work strengthening glass substrate.In addition, under 150 DEG C to 250 DEG C temperature environments, the deposition of transparency electrode is achieved by low temperature IPVD operation.This invention can reducing the manufacturing cost of touch panel while, and the safety also achieving substrate holds.But this patent has very strong restriction product scope, can only be used in the making of panel display screen.For other field, the method is substantially free of solution relevant issues.
Therefore, in view of problem above, it is necessary to propose a kind of encapsulating structure based on ultra-thin glass and process realizes high density surface interconnection, meet the requirement of ultra-thin glass three-dimension packaging, reduce cost of manufacture simultaneously.
Summary of the invention
It is an object of the invention to overcome the deficiencies in the prior art, encapsulating structure and the method for a kind of ultra-thin female glass substrate are provided, the safety that its method adopting the annular or square female of glass substrate thinning realizes ultrathin glass substrate holds and interconnection between first surface and the 4th surface, avoiding existing method ultra-thin glass to hold safety coefficient low or use the interim bonding technology of high cost, make efficiency is low and the problem such as cost intensive.
According to technical scheme provided by the invention, the encapsulating structure of described ultra-thin female glass substrate, including glass substrate, described glass substrate has first surface and threeth surface corresponding with described first surface;It is concavely provided with some mounting grooves on the 3rd surface of glass substrate, forms isolation in the outer ring of mounting groove and hold district;Bottom land at described mounting groove forms the 4th surface;The conductive pole connecting first surface and the 4th surface it is provided with in glass substrate.
Thickness between described 4th surface and first surface is 20 μm ~ 400 μm.
Described mounting groove is square or annular;Made by dry etching, wet etching or Ginding process on the 3rd surface of glass substrate and obtain mounting groove.
4th surface is provided with the 4th surface wiring;Being provided with first surface wiring on the first surface of glass substrate, the wiring of described first surface is electrically connected by conductive pole corresponding in glass substrate with the 4th surface wiring.
4th surface of described glass substrate is pasted with the 4th surface chip by the 4th surface wiring, being pasted with first surface chip by first surface wiring on the first surface of glass substrate, described first surface chip and the 4th surface chip are by corresponding conductive pole electrical connection.
The method for packing of a kind of ultra-thin female glass substrate, described method for packing comprises the steps:
A, providing and have the glass substrate of first surface and second surface, described second surface is corresponding with first surface;First surface at glass substrate makes the blind hole being perpendicular to described first surface;
B, in above-mentioned blind hole deposition of adhesion, and have in the blind hole of adhesion layer to fill in deposition and obtain conducting filler;
C, second surface to above-mentioned glass substrate are thinned to desired thickness, to form the 3rd surface of glass substrate;
D, make required mounting groove on the 3rd surface of above-mentioned glass substrate, described mounting groove is positioned at the surface of each conducting filler, the bottom land of mounting groove forms the 4th surface of glass substrate, the end being made contiguous 3rd surface of conducting filler by mounting groove is exposed, to form conductive pole in glass substrate;
Described mounting groove is square or annular;Made by dry etching, wet etching or Ginding process on the 3rd surface of glass substrate and obtain mounting groove.
The first surface of above-mentioned glass substrate makes first surface wiring, so that multiple conducting filler corresponding on glass substrate are electrically connected to each other;
Making the 4th surface wiring on the 4th surface of above-mentioned glass substrate, the 4th surface wiring is electrically connected by the first surface wiring that conductive pole is corresponding with glass substrate.
Advantages of the present invention: by mounting groove recessed in glass substrate, the outer ring of mounting groove forms isolation and holds district, hold district and can realize the safety of ultra thin glass substrates encapsulating structure by isolating and hold, and realize the encapsulating structure of interconnection between first surface and the 4th surface element device by thin glass substrate TGV structure, avoiding existing method ultra-thin glass to hold safety coefficient low or use the interim bonding technology of high cost, make efficiency is low and the problem such as cost intensive.
Accompanying drawing explanation
Fig. 1 ~ Fig. 4 is the sectional view that the present invention is embodied as processing step, wherein
Fig. 1 is the structural representation of glass substrate of the present invention.
Fig. 2 is the sectional view after the present invention obtains conductive salient point on the first surface of glass substrate.
Fig. 3 is the sectional view after the present invention obtains the 4th surface.
Fig. 4 is the sectional view after the present invention mounts first surface chip and the 4th surface chip.
Description of reference numerals: 1-glass substrate, 2-first surface, 3-second surface, 4-blind hole, 5-adhesion layer, 6-conducting filler, 7-conductive tie layers, 8-conductive salient point, 9-dielectric layer, 10-mounting groove, 11-the 4th surface, 12-first surface chip, 13-the 4th surface chip, 14-isolation hold district, 15-the 3rd surface and 16-conductive pole.
Detailed description of the invention
Below in conjunction with concrete drawings and Examples, the invention will be further described.
As shown in Figure 4: in order to avoid existing method ultra-thin glass hold safety coefficient low or use high cost interim bonding technology, make efficiency is low and the problem such as cost intensive, the present invention includes glass substrate 1, and described glass substrate 1 has first surface 2 and threeth surface 15 corresponding with described first surface 2;It is concavely provided with some mounting grooves 10 on the 3rd surface 15 of glass substrate 1, forms isolation in the outer ring of mounting groove 10 and hold district 14;Bottom land at described mounting groove 10 forms the 4th surface 11;The conductive pole 16 connecting first surface 2 and the 4th surface 11 it is provided with in glass substrate 1.
Specifically, conductive pole 16 connects first surface 2 and the 4th surface 11 refers to that the both ends of the surface of conductive pole 16 lay respectively on first surface 2 and the 4th surface 11.In glass substrate 1, multiple mounting groove 10 can be set, district 14 is held by isolation mutually isolated between different mounting grooves 10, owing to isolating the thickness holding district 14, there is good hardness, therefore can hold, by isolation, the encapsulating structure can being easy to being formed in district 14 and hold.The 4th surface wiring in each mounting groove 10 first surface corresponding with on first surface 2 is routed through conductive pole 16 and realizes corresponding electrical connection, in the embodiment of the present invention, and described corresponding connection, refer to and utilize conductive pole 16 to realize connection vertical up and down.Forming some encapsulation unit regions in glass substrate 1, in described encapsulation unit region, all of conductive pole 16 utilizes first surface wiring, the 4th surface wiring to be electrically connected to each other.
4th surface 11 is provided with the 4th surface wiring;Being provided with first surface wiring on the first surface 2 of glass substrate 1, the wiring of described first surface is electrically connected by conductive pole 16 corresponding in glass substrate 1 with the 4th surface wiring.Thickness between described 4th surface 11 and first surface 2 is 20 μm ~ 400 μm.Described mounting groove 10 is square or annular;Made by dry etching, wet etching or Ginding process on the 3rd surface 15 of glass substrate 1 and obtain mounting groove 10.4th surface 11 of described glass substrate 1 is pasted with the 4th surface chip 13 by the 4th surface wiring, being pasted with first surface chip 12 by first surface wiring on the first surface 2 of glass substrate 1, described first surface chip 12 is electrically connected by corresponding conductive pole 16 with the 4th surface chip 13.The first surface 2 of described glass substrate 1 is coated with dielectric layer 9.
As shown in Fig. 1 ~ Fig. 4, the encapsulating structure of said structure can be prepared by following processing step, and specifically, described method for packing comprises the steps:
A, providing and have the glass substrate 1 of first surface 2 and second surface 3, described second surface 3 is corresponding with first surface 2;First surface 2 at glass substrate 1 makes the blind hole 4 being perpendicular to described first surface 2;
As it is shown in figure 1, the first surface 2 of glass substrate 1 is corresponding with second surface 3, the method making blind hole 4 in glass substrate 1 includes machining, Laser Processing, sandblasting boring or etching.The aperture of described blind hole 4 is 1 μm ~ 500 μm.In the specific implementation, it is possible to manufacturing blind hole 4 by dry etch process, blind hole 4 downwardly extends from the first surface 2 of glass substrate 1, and the degree of depth of blind hole 4 is less than the thickness of glass substrate 1.The above-mentioned method manufacturing processing blind hole 4 in glass substrate 1 is the technological means that the art is conventional, specifically repeats no more.
B, in above-mentioned blind hole 4 deposition of adhesion 5, and have filling in the blind hole 4 of adhesion layer 5 to obtain conducting filler 6 in deposition;
As in figure 2 it is shown, the material of described adhesion layer 5 is one or more in Cu, Ni, Ta, Ti, Pt, Pd, AlN or TiN.In blind hole 4, fill the method obtaining conducting filler 6 include inserting electric conductor, plating, chemical plating, physical deposition, chemical vapour deposition (CVD) or liquid metal filling.One in the described electrically conductive metal of conducting filler 6, metal mixture, CNT or polycrystalline silicon material.In the embodiment of the present invention, the degree of depth that conducting filler 6 is filled is consistent with the degree of depth of blind hole 4.
In the specific implementation, the first surface 2 of above-mentioned glass substrate 1 makes first surface wiring, so that corresponding multiple conducting filler 6 are electrically connected to each other in glass substrate 1;Wherein, in described glass substrate 1, corresponding multiple conducting filler 6 are electrically connected to each other, after referring to that the plurality of conducting filler 6 is electrically connected to each other by first surface wiring, an encapsulation unit region is formed in glass substrate 1, it is electrically connected to each other by surface wiring by the multiple conducting filler 6 in an encapsulation unit region, keeps being dielectrically separated between the conducting filler 6 in encapsulation unit regions different in glass substrate 1.
The purpose manufacturing first surface wiring on the first surface 2 of glass substrate 1 is so that being all electrically connected to each other between the multiple conducting filler 6 in glass substrate 1, and the wiring of described first surface can adopt and arrange metal wiring layer and realize.
In order to carry out pasting chip, the first surface 2 of glass substrate 1 is additionally provided with dielectric layer 9, conductive tie layers 7 and conductive salient point 8, wherein, dielectric layer 9 covers on first surface 2, conductive tie layers 7 covers dielectric layer 9, and electrically connect with the conducting filler 6 in glass substrate 1 after through dielectric layer 9, conductive salient point 8 protrudes and is arranged on conductive tie layers 7, and conductive salient point 8 is electrically connected with conducting filler 6 by conductive tie layers 7.Dielectric layer 9 can adopt silicon dioxide or silicon nitride etc., and conductive tie layers 7 can adopt conventional conductive material.
C, second surface 3 to above-mentioned glass substrate 1 are thinned to desired thickness, to form the 3rd surface 15 of glass substrate 1;
Owing to time initial, the thickness of glass substrate 1 is thicker, need to carry out thinning to the second surface 3 of glass substrate 1, wherein need to determine according to original depth and the technique of glass substrate 1 to the thickness that glass substrate 1 second surface 3 is thinning, when thinning, the conventional technique ground or etch can be adopted, specifically repeat no more.
D, make required mounting groove 10 on the 3rd surface 15 of above-mentioned glass substrate 1, described mounting groove 10 is positioned at the surface of each conducting filler 6, the bottom land of mounting groove 10 forms the 4th surface 11 of glass substrate 1, the end being made contiguous 3rd surface 15 of conducting filler 6 by mounting groove 10 is exposed, to form conductive pole 16 in glass substrate 1;
As it is shown on figure 3, described mounting groove 10 is square or annular;Made by dry etching, wet etching or Ginding process on the 3rd surface 15 of glass substrate 1 and obtain mounting groove 10.Thickness between described 4th surface 11 and first surface 2 is 20 μm ~ 400 μm.In the embodiment of the present invention, after fabrication and installation groove 10 so that the end of conducting filler 6 is exposed, form conductive pole 16, when being embodied as, it is possible to allow the end of conducting filler 6 protrude from the 4th surface 11.After obtaining mounting groove 10, the outer ring of mounting groove 10 forms isolation and holds district 14, and isolation holds district 14 and has corresponding width and thickness, holds district 14 by isolation and can isolate different mounting grooves 10, meanwhile, hold district 14 by isolation can whole glass substrate 1 be held.
In the specific implementation, making the 4th surface wiring on the 4th surface 11 of above-mentioned glass substrate 1, the 4th surface wiring is electrically connected by the first surface wiring that conductive pole 16 is corresponding with glass substrate 1.
As shown in Figure 4, the effect of described 4th surface wiring and distributed areas are corresponding with first surface wiring, and namely the 4th surface wiring is positioned on the encapsulation unit region of glass substrate 1, and the 4th surface wiring is positioned on an encapsulation unit region on the 4th surface 11;After making first surface wiring and the 4th surface wiring, it is also possible to arranging the 4th surface chip 13 in the 4th surface wiring, the 4th surface chip 13 electrically connects with the 4th surface wiring;Simultaneously, can first surface chip 12 be mounted on conductive salient point 8, first surface chip 12 is electrically connected with the 4th corresponding surface chip 13 by conductive salient point 8, conductive tie layers 7 and conductive pole 16, in the embodiment of the present invention, the corresponding connection between first surface chip 12 with the 4th surface chip 13 refers to the electrical connection between the chip of the corresponding distribution in conductive pole 16 both ends.In the specific implementation, first surface chip 12 electrically connects by being positioned at multiple conductive poles 16 in encapsulation unit region with the 4th surface chip 13.
The present invention is by recessed mounting groove 10 in glass substrate 1, the outer ring of mounting groove 10 forms isolation and holds district 14, hold district 14 and can realize the safety of ultra thin glass substrates encapsulating structure by isolating and hold, and realize the encapsulating structure of interconnection between first surface and the 4th surface element device by thin glass substrate TGV structure, avoiding existing method ultra-thin glass to hold safety coefficient low or use the interim bonding technology of high cost, make efficiency is low and the problem such as cost intensive.
Described above to the disclosed embodiments, makes professional and technical personnel in the field be capable of or uses the present invention.The multiple amendment of these embodiments be will be apparent from for those skilled in the art, and generic principles defined herein can without departing from the spirit or scope of the present invention, realize in other embodiments.Therefore, the present invention is not intended to be limited to the embodiments shown herein, and is to fit to the widest scope consistent with principles disclosed herein and features of novelty.

Claims (5)

1. a method for packing for ultra-thin female glass substrate, is characterized in that, described method for packing comprises the steps:
A (), offer have the glass substrate (1) of first surface (2) and second surface (3), described second surface (3) is corresponding with first surface (2);First surface (2) in glass substrate (1) makes the blind hole (4) being perpendicular to described first surface (2);
(b), in above-mentioned blind hole (4) deposition of adhesion (5), and deposition have in the blind hole (4) of adhesion layer (5) fill obtain conducting filler (6);
C (), second surface (3) to above-mentioned glass substrate (1) are thinned to desired thickness, to form the 3rd surface (15) of glass substrate (1);
(d), make required mounting groove (10) on the 3rd surface (15) of above-mentioned glass substrate (1), described mounting groove (10) is positioned at the surface of each conducting filler (6), the bottom land of mounting groove (10) forms the 4th surface (11) of glass substrate (1), the end being made contiguous 3rd surface (15) of conducting filler (6) by mounting groove (10) is exposed, to form conductive pole (16) in glass substrate (1).
2. the method for packing of ultra-thin female glass substrate according to claim 1, is characterized in that: described mounting groove (10) is square or annular;Made by dry etching, wet etching or Ginding process on the 3rd surface (15) of glass substrate (1) and obtain mounting groove (10).
3. the method for packing of ultra-thin female glass substrate according to claim 1, it is characterized in that: the first surface (2) in above-mentioned glass substrate (1) is upper makes first surface wiring, so that corresponding multiple conducting filler (6) are electrically connected to each other in glass substrate (1) is upper;
Upper making the 4th surface wiring on the 4th surface (11) of above-mentioned glass substrate (1), the 4th surface wiring is electrically connected by the first surface wiring that conductive pole (16) is corresponding with glass substrate (1).
4. the method for packing of ultra-thin female glass substrate according to claim 1, is characterized in that: the thickness between described 4th surface (11) and first surface (2) is 20 μm ~ 400 μm.
5. the method for packing of ultra-thin female glass substrate according to claim 1, it is characterized in that: the 4th surface (11) of described glass substrate (1) is pasted with the 4th surface chip (13) by the 4th surface wiring, being pasted with first surface chip (12) by first surface wiring on the first surface (2) of glass substrate (1), described first surface chip (12) is electrically connected by corresponding conductive pole (16) with the 4th surface chip (13).
CN201410127426.3A 2014-03-31 2014-03-31 The encapsulating structure of ultra-thin female glass substrate and method Active CN103904039B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201410127426.3A CN103904039B (en) 2014-03-31 2014-03-31 The encapsulating structure of ultra-thin female glass substrate and method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201410127426.3A CN103904039B (en) 2014-03-31 2014-03-31 The encapsulating structure of ultra-thin female glass substrate and method

Publications (2)

Publication Number Publication Date
CN103904039A CN103904039A (en) 2014-07-02
CN103904039B true CN103904039B (en) 2016-07-06

Family

ID=50995300

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201410127426.3A Active CN103904039B (en) 2014-03-31 2014-03-31 The encapsulating structure of ultra-thin female glass substrate and method

Country Status (1)

Country Link
CN (1) CN103904039B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110631688B (en) * 2019-09-30 2022-01-25 南京元感微电子有限公司 Vector underwater acoustic sensor

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101789414A (en) * 2010-02-26 2010-07-28 晶方半导体科技(苏州)有限公司 Ultrathin semiconductor chip packaging structure and manufacturing process thereof
CN103119703A (en) * 2010-09-23 2013-05-22 高通Mems科技公司 Integrated passives and power amplifier
CN103325799A (en) * 2012-03-20 2013-09-25 南茂科技股份有限公司 Chip stacking structure and manufacturing method thereof

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110217657A1 (en) * 2010-02-10 2011-09-08 Life Bioscience, Inc. Methods to fabricate a photoactive substrate suitable for microfabrication
US8411459B2 (en) * 2010-06-10 2013-04-02 Taiwan Semiconductor Manufacturing Company, Ltd Interposer-on-glass package structures

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101789414A (en) * 2010-02-26 2010-07-28 晶方半导体科技(苏州)有限公司 Ultrathin semiconductor chip packaging structure and manufacturing process thereof
CN103119703A (en) * 2010-09-23 2013-05-22 高通Mems科技公司 Integrated passives and power amplifier
CN103325799A (en) * 2012-03-20 2013-09-25 南茂科技股份有限公司 Chip stacking structure and manufacturing method thereof

Also Published As

Publication number Publication date
CN103904039A (en) 2014-07-02

Similar Documents

Publication Publication Date Title
CN103972159B (en) Three-dimensional package structure and forming method thereof
CN103193193B (en) MEMS and forming method thereof
CN103443918B (en) The manufacture method of semiconductor device
JP5497756B2 (en) Semiconductor device manufacturing method and semiconductor device
CN102222654B (en) Semiconductor device with through substrate via and production method thereof
CN104425453B (en) 3DIC interconnection means and method
CN103943605B (en) Packaging structure and method based on ultra-thin glass
CN103824867B (en) The method of electric connection wafer and the semiconductor equipment being manufactured with the method
US9633952B2 (en) Substrate structure and method for manufacturing same
CN105575938B (en) A kind of silicon substrate pinboard and preparation method thereof
CN102103979A (en) Method for manufacturing three-dimensional silicon-based passive circuit consisting of through silicon vias
CN104377163A (en) CMOS compatible wafer bonding layer and process
CN105185719A (en) Lock type hybrid bonding method
CN102024747B (en) Method for manufacturing aluminium plug of power device
CN104979226A (en) Copper mixed bonding method
CN103400810A (en) Semiconductor chip laminating and packaging structure and manufacturing method thereof
CN103904039B (en) The encapsulating structure of ultra-thin female glass substrate and method
CN103879951B (en) The preparation method of silicon through hole
CN103904054B (en) Interconnection structure based on glass substrate and method
CN109671692A (en) TSV structure and TSV appear method
CN106783801B (en) High-density SOI packaging substrate and preparation method thereof
CN107226452B (en) Coplanar bonding structure and preparation method thereof
CN105321904B (en) Semiconductor device
CN110071047B (en) Method for manufacturing silicon-based adapter plate for micro-system integrated application
CN102496579A (en) Method for realizing electrical insulation on adapter plate

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant