CN103777997A - JAVA virtual machine hardware independency platform based on MIPS and independency improvement method thereof - Google Patents
JAVA virtual machine hardware independency platform based on MIPS and independency improvement method thereof Download PDFInfo
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- CN103777997A CN103777997A CN201310723797.3A CN201310723797A CN103777997A CN 103777997 A CN103777997 A CN 103777997A CN 201310723797 A CN201310723797 A CN 201310723797A CN 103777997 A CN103777997 A CN 103777997A
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Abstract
The invention discloses a JAVA virtual machine hardware independency platform based on MIPS and an independency improvement method of the JAVA virtual machine hardware independency platform. The JAVA virtual machine hardware independency platform based on the MIPS comprises a processor abstraction engine module, a memory management interface module, a task scheduling and local calling module, a compiling engine, an input/output module and the like. The independency improvement method of the JAVA virtual machine hardware independency platform based on the MIPS comprises the following steps of (1) starting a virtual machine, processing command line input, (2) initializing the operating environment of the virtual machine, (3) calling in and loading a Class file, (4) formatting a storage frame of a memory, and (5) executing a Java program. The JAVA virtual machine hardware independency platform based on the MIPS and the independency improvement method of the JAVA virtual machine hardware independency platform based on the MIPS have the advantages that an HAL of the virtual machine is designed in a clear modularization mode, platform transfer is facilitated, platform independency of hardware interfaces is achieved, development efficiency is improved, and difficulty of transfer is reduced.
Description
Technical field
The present invention relates to a kind of JAVA virtual machine hardware irrelevantization platform and irrelevantization thereof based on MIPS improves one's methods.
Background technology
Java source program generates the class file class being made up of bytecode after compiler compiling, when execution, first pack the bytecode from class file into by class loaders, after verifier safety verification, read bytecode by Java Virtual Machine, be converted to specific platform instruction, and move in corresponding CPU.
Java Virtual Machine is the heart of java applet operation, many excellent specific properties of Java all derive from concept and the realization of Java Virtual Machine, Java Virtual Machine is a kind of abstract computing machine being based upon on actual processor basis, what Java Virtual Machine moved is the bytecode reading in from Class class file, so Java Virtual Machine also can be regarded the software CPU take Java bytecode as instruction set as.
In the structure of Java platform, Java Virtual Machine is in the position of core, and its below is to transplant interface, and transplanting interface has 2 parts, the part that wherein depends on platform is adapter, and Java Virtual Machine is realized in concrete platform and operating system by transplanting interface.
To explain to carry out at initial Java code, finding certain method or code block when virtual machine moves frequent especially, these codes will be regarded as to " focus code " (Hot Spot Code), in order to improve the execution efficiency of focus code, in the time of operation, virtual machine will become the machine code relevant to local platform these code compilations, and carries out various levels of optimization, and the compiler that completes this task is called instant compiler JIT.
In existing Hotspot compiler, what Client Compiler realized is a simple syllogic compiler fast, and main focus is the optimization of locality, and has abandoned many longer global optimization means consuming time.
At first stage, platform independently front end is configured to a kind of senior intermediate code by bytecode and represents HIR.HIR carrys out representative code value by static single form of distributing SSA, and this can make some among the construction process of HIR and the optimization of carrying out afterwards action more easily realizes.Compiler can complete the optimization of part basis on bytecode before this, and as inline in method, the optimizations such as constant propagation will complete before bytecode is configured to HIR.
In subordinate phase, a relevant rear end of platform produces rudimentary intermediate code and represents LIR from HIR, and can on HIR, complete before this other optimization, as null value inspection is eliminated, range check eliminations etc., to allow HIR reach more efficient coded representation form.
The last stage is to use Linear sweep on LIR, to distribute register in the relevant rear end of platform, and on LIR, does peephole optimization, then produces machine code.
In traditional virtual machine design, the assembly instruction collection of the code in these 3 stages and processor is closely related, has a large amount of processor correlative codes to concentrate in CPU and OS_CPU catalogue, and through rough Statistics, the size of code relating to reaches 110776 row.This has caused the workload of transplanting for a new CPU very huge, and code robustness and robustness after transplanting have huge hidden danger.
Summary of the invention
The object of the invention is to: by targetedly traditional virtual machine transplantation Project being studied, many for traditional hotspot left over by history code, between each code block, degree of coupling is quite high, relate to CPU details many, and assembly code amount is large, the problem that transplanting workload is large, transplanting difficulty is large and the rear robustness of transplanting reduces that between code, call relation complexity causes, in the transplanting of MIPS platform, provide a kind of JAVA virtual machine hardware irrelevantization platform and irrelevantization thereof based on MIPS to improve one's methods, solve the shortcoming that prior art exists.
The present invention adopts following technical scheme to realize:
Irrelevantization of a JAVA virtual machine hardware platform based on MIPS, is characterized in that, this platform comprises:
The abstract engine modules of processor: comprise the processor based on storehouse and the processor based on register, the abstract engine modules of described processor is followed the tradition based on storehouse, the realization that provides the execution engine based on register to simulate particular hardware, the abstraction interface that provides storehouse to call;
Memory management interfaces module: for being responsible for distribution and the recovery of internal memory;
Task scheduling and local calling module: take adaptation strategies, directly realize the code adapter of abstraction interface and former hotspot;
Compiler engine: this compiler engine extracts Compile interface, replaces original HIR and LIR by fixing IR intermediate code, last according to new interface, compile partly extract be separately compiled into one independently module call.
Further, also comprise input/output module, described input/output module is taked adaptation strategies, directly realizes the adapter of abstraction interface and former hotspot code.
A kind of irrelevantization of JAVA virtual machine hardware platform based on MIPS is improved one's methods, and it is characterized in that, the method comprises the steps:
Virtual machine is a life cycle from reading in Class file to the overall process being finished, and this cycle, by function difference, can be divided into double teacher:
1, start virtual machine, and the capable input of processing command;
2, initialization virtual machine running environment;
3, call in and load Class file;
4, format memory frame;
5, carry out java applet.
The useful technique effect that the present invention possesses is: the HAL (hardware abstraction layer that has designed virtual machine in modular mode clearly, lower same), facilitate platform migration, realize hardware interface platform independence, improve development efficiency, reduced migration difficulty.
Accompanying drawing explanation
Fig. 1 is the hotspot framework before improving.
The framework that Fig. 2 is reconstruct of the present invention.
Embodiment
By the description to embodiment below; to more contribute to public understanding the present invention; but specific embodiment given applicant can't be considered as to the restriction to technical solution of the present invention, any definition to parts or technical characterictic change and/or to one-piece construction do form and immaterial conversion all should be considered as the protection domain that technical scheme of the present invention limits.
Fig. 1 is the hotspot framework before improving, in figure, can clearly find out, interpreter and compiler from level to level call OS_CPU and CPU module, several module weave ins.As seen from Figure 2, in reconstruct framework in interpreter and compiler be stripped from out as module independently.
The preferred embodiments of the present invention are:
Irrelevantization of a JAVA virtual machine hardware platform based on MIPS, this platform comprises:
The abstract engine modules of processor: according to the difference of operational data switching plane, mainly contain two kinds of abstract engines of the processor based on storehouse and the processor based on register, in the situation that storehouse is based upon internal memory, will be much smaller than the latter to the consumption of system resource when the former moves, although the latter's travelling speed will be faster than the former, but because the conventional architectures of hotspot is based on stack mode, therefore the abstract engine of this processor is still followed the tradition based on storehouse, the realization that provides the execution engine based on register to simulate particular hardware, provide the abstraction interface that storehouse calls to remain on the traditional advantage in problems such as processing function call and recurrence.Virtual register is the core of system, MIPS virtual machine is carried out byte code instruction by the computing between register, take out unified standard register interface according to the common ground of many moneys CPU in the present embodiment, as general-purpose register is used for storage and translation data and address, pointer register points to the stack top location of stack segment, segment register identifies code segment, the boundary between data segment and stack segment.
Memory management interfaces module: programmed instruction and the data storage mode in internal memory has two kinds: end and small end greatly.Large end refers to that the upper byte of data leaves in the low order address in internal memory; Small end is contrary, and the low byte of data leaves in the low order address in internal memory.Distribution and the recovery problem of internal memory is responsible in memory management, and due to the regulation display memory administrative law EMM of Java language and be not suitable for virtual machine, the interface of realizing of automatic memory management method AMM is the emphasis that this method is paid close attention to.In order to improve the service efficiency of internal memory, in the management of virtual memory, take first to pre-read the principle of distributing afterwards and open up virtual memory, first the size of byte code files is analyzed, from physical memory, distribute again enough internal memories as virtual memory according to its size, if remaining physical memory cannot be satisfied the demand, exit this sub-distribution.
Task scheduling and local calling module: the modular design degree of ripeness of original system is higher, takes in the present embodiment adaptation strategies, directly realize the code adapter of abstraction interface and former hotspot.
Compiler engine: after virtual machine explains that under mixed mode a certain section of Java code of operation reaches certain number of times, can start pattern compiler, after the code compilation of often operation, carry out OSR operation, each run all can enter the code after compiling later, improves operational efficiency.In old edition virtual machine code, this module relates to the part that assembly code is maximum, in order to reach modular effect, first extracts Compile interface, secondly replaces original HIR and LIR by fixing IR intermediate code, reduces level and the complexity of operation.Last according to new interface, compiling part extract be separately compiled into one independently module call, reached modularization highly, facilitated again optimization and replacement to compiler engine.
In the present embodiment, also comprise input/output module, virtual machine relies on host platform, and therefore input/output function realization is relatively simple, and the standard input/output on system call basis can be competent at.In this programme, input/output module is taked adaptation strategies, directly realizes the adapter of abstraction interface and former hotspot code, although arithmetic speed limit to some extent, without contact machine level interrupt call and input/output operations.
A kind of irrelevantization of JAVA virtual machine hardware platform based on MIPS is improved one's methods, and the method comprises the steps:
Virtual machine is a life cycle from reading in Class file to the overall process being finished, and this cycle, by function difference, can be divided into double teacher:
1, start virtual machine, and the capable input of processing command;
2, initialization virtual machine running environment;
3, call in and load Class file;
4, format memory frame;
5, carry out java applet.
Wherein subordinate phase and five-stage are the cores of whole program operation.
In the process of MIPS platform transplantation hotspot, method generation HAL layer used carries out the migration across CPU in the present embodiment, has greatly shortened transit time, has obtained good effect, and the modular design using in realization is as follows:
HALMemoryManager: memory management abstraction interface
HALStack: stack interface
HALCodeBuffer: code buffer-zone interface
HALCompiler: compiler engine abstraction interface
HALregister: processor is deposited and abstraction interface
By using the former hotspot code of above interface reconstruct, and modular compiler engine method, complete smoothly the migration work of platform, and obtained one group of general hardware interface realization.
The present invention has designed the HAL layer of virtual machine in modular mode clearly, facilitated platform migration, has realized hardware interface platform independence, has improved development efficiency, has reduced migration difficulty.Core of the present invention is to isolate actual hardware layer with modular abstract hardware HAL layer in Java Hotspot virtual machine.
Certainly; the present invention can also have other various embodiments; in the situation that not deviating from spirit of the present invention and essence thereof; those of ordinary skill in the art can make according to the present invention various corresponding changes and distortion, but these corresponding changes and distortion all should belong to the protection domain of the appended claim of the present invention.
Claims (3)
1. irrelevantization of the JAVA virtual machine hardware platform based on MIPS, is characterized in that, this platform comprises:
The abstract engine modules of processor: comprise the processor based on storehouse and the processor based on register, the abstract engine modules of described processor is followed the tradition based on storehouse, the realization that provides the execution engine based on register to simulate particular hardware, the abstraction interface that provides storehouse to call;
Memory management interfaces module: for being responsible for distribution and the recovery of internal memory;
Task scheduling and local calling module: take adaptation strategies, directly realize the code adapter of abstraction interface and former hotspot;
Compiler engine: this compiler engine extracts Compile interface, replaces original HIR and LIR by fixing IR intermediate code, last according to new interface, compile partly extract be separately compiled into one independently module call.
2. irrelevantization of the JAVA virtual machine hardware platform based on MIPS according to claim 1, it is characterized in that, also comprise input/output module, described input/output module is taked the strategy of Adapter, directly realizes the adapter of abstraction interface and former hotspot code.
3. irrelevantization of the JAVA virtual machine hardware platform based on MIPS is improved one's methods, and it is characterized in that, the method comprises the steps:
Virtual machine is a life cycle from reading in Class file to the overall process being finished, and this cycle, by function difference, can be divided into double teacher:
(1) start virtual machine, and the capable input of processing command;
(2) initialization virtual machine running environment;
(3) call in and load Class file;
(4) format memory frame;
(5) carry out java applet.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106033370A (en) * | 2015-03-16 | 2016-10-19 | 龙芯中科技术有限公司 | Method and device for realizing 64-bit Java virtual machine |
| CN108027793A (en) * | 2015-07-27 | 2018-05-11 | 应美盛股份有限公司 | System and method for docking sensor and processor |
| WO2023124543A1 (en) * | 2021-12-27 | 2023-07-06 | 清华大学 | Data processing method and data processing apparatus for big data |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080115119A1 (en) * | 2006-11-09 | 2008-05-15 | Bea Systems, Inc. | System and method for early platform dependency preparation of intermediate code representation during bytecode compilation |
-
2013
- 2013-12-25 CN CN201310723797.3A patent/CN103777997A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080115119A1 (en) * | 2006-11-09 | 2008-05-15 | Bea Systems, Inc. | System and method for early platform dependency preparation of intermediate code representation during bytecode compilation |
Non-Patent Citations (2)
| Title |
|---|
| 林巧民: "虚拟机相关技术研究及实践", 《中国优秀博硕士学位论文全文数据库(硕士)信息科技辑》 * |
| 王涛 等: "Java处理器中指令合并技术的研究与实现", 《计算机研究与发展》 * |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106033370A (en) * | 2015-03-16 | 2016-10-19 | 龙芯中科技术有限公司 | Method and device for realizing 64-bit Java virtual machine |
| CN106033370B (en) * | 2015-03-16 | 2019-12-10 | 龙芯中科技术有限公司 | Method and device for realizing 64-bit Java virtual machine |
| CN108027793A (en) * | 2015-07-27 | 2018-05-11 | 应美盛股份有限公司 | System and method for docking sensor and processor |
| CN108027793B (en) * | 2015-07-27 | 2021-12-07 | 应美盛股份有限公司 | System and method for interfacing sensors and processors |
| WO2023124543A1 (en) * | 2021-12-27 | 2023-07-06 | 清华大学 | Data processing method and data processing apparatus for big data |
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Application publication date: 20140507 |