CN103777676A - Communication clock frequency self-adaption device and method - Google Patents

Communication clock frequency self-adaption device and method Download PDF

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Publication number
CN103777676A
CN103777676A CN201410004384.4A CN201410004384A CN103777676A CN 103777676 A CN103777676 A CN 103777676A CN 201410004384 A CN201410004384 A CN 201410004384A CN 103777676 A CN103777676 A CN 103777676A
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China
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communication
unit
clock
buffer
data
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CN201410004384.4A
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梁明亮
张静
卢夏燕
郑灼荣
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Jianrong Integrated Circuit Technology Zhuhai Co Ltd
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Jianrong Integrated Circuit Technology Zhuhai Co Ltd
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Priority to CN201410004384.4A priority Critical patent/CN103777676A/en
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Abstract

The invention provides a communication clock frequency self-adaption device which is low in manufacturing cost and easy to realize and a method for communication clock frequency self-adaption adjustment based on the device. The communication clock frequency self-adaption device comprises a master communication unit, a slave communication unit, a storage unit, a cache unit, a monitoring unit and a clock generator, wherein the slave communication unit, the clock generator and the cache unit are all connected with the master communication unit, the clock generator and the cache unit are both connected with the monitoring unit, and the storage unit is connected with the cache unit. The communication clock frequency self-adaption device and method can be applied to the field of communication frequency adjustment.

Description

Communication clock frequency self-adaption device and method
Technical field
The present invention relates to a kind of self-reacting device, the self-reacting device and this device that relate in particular to a kind of communication clock frequency communicate the adaptive method of clock frequency.
Background technology
Multimedia recording and broadcasting system generally all comprises the memory devices such as main control MCU, internal memory, LCD display, SD card or mmc card.Main control MCU generally all needs SDRAM or the DDR SDRAM internal memory as data operation and program operation.View data in internal memory need to, by the lcd controller of MCU, send to LCD display to show with specific clock frequency.If player, the audio-video document of SD card the inside storage is read SDRAM or DDR SDRAM by MCU, and then the computing such as decode.If video recorder, MCU need to will process the audio-visual data encoding, and is written to SD card the inside with specific clock frequency.
Conventionally system the inside only has the internal memory of a SDRAM or DDR SDRAM, but audio/video encoding/decoding data, image deal with data, shows data, file data and program etc., is all placed on internal memory the inside.Be easy to occur that several functions needs access memory simultaneously and situation about clashing.
LCD display is that one need to be according to timeticks, the equipment of real-time transmission data.If in the time that timeticks arrives, do not have valid data to transmit, display frame just there will be extremely.Just because of this, in the busy system the inside that leads to a conflict a lot of internal storage access, be easy to cause LCD to show abnormal.
MCU, by SD controller, according to standard SD agreement, reads the storage data in SD card in Installed System Memory, or the data of Installed System Memory the inside are write to SD card.SD agreement regulation, the read-write of SD card is carried out take packet as unit.A packet is made up of the data of the quantity such as the 8byte fixing, 16byte, 512byte.If Installed System Memory, because access is busy, causes in time the data that read from SD card being write, or can not provide in time data to SD card, will cause loss of data or error in data.
The invention provides one effectively simple, do not increase device and the way of MCU cost, overcome the problems referred to above.
Summary of the invention
Technical matters to be solved by this invention is to overcome the deficiencies in the prior art, provides a kind of and manufactures this locality and be easy to the communication clock frequency self-adaption device of realizing and utilize this device to communicate the method that clock frequency self-adaptation is adjusted.
The technical scheme that communication clock frequency self-adaption device of the present invention adopts is: this device comprises main communication unit, from communication unit, storage unit, buffer unit, monitoring means and clock generator, describedly all be connected with described main communication unit from communication unit, described clock generator and described buffer unit, described clock generator is all connected with described monitoring means with described buffer unit, and described storage unit is connected with described buffer unit.
The technical scheme that the adaptive approach of communication clock frequency self-adaption device of the present invention adopts is that the method comprises that the method comprises the following steps:
(1) monitoring means, according to the memory data output of buffer unit, produces monitoring state;
(2) clock generator provides communication reference clock signal for main communication unit, and the monitoring state providing according to monitoring means, automatically adjusts the frequency of communication reference clock signal;
(3) the communication reference clock that main communication unit provides according to clock generator, produces the actual clock of communication, and communication reference clock has definite proportionate relationship with the frequency of the actual clock of communicating by letter;
(4) main communication module, according to the beat of the actual clock of communication, sends to the data in buffer unit from communication unit, or receives the data from communication unit, is stored in buffer unit;
(5) buffer unit is from storage unit reading out data and be stored in buffer unit, or by the data write storage unit being stored in buffer unit.
Further, in step (1), described monitoring state comprises: buffer memory is empty, buffer memory by sky, buffer memory will expire, buffer memory expired and the moderate five kinds of states of buffer memory.
Further, in step (2), while automatically adjusting the frequency of communication reference clock signal, buffer memory will be expired sky and buffer memory under state, reduce communication reference clock frequency; The empty and buffer memory of buffer memory completely under state, suspends the reference clock of communicating by letter; Under the moderate state of buffer memory, provide the communication reference clock of normal frequency to main communication unit.
The invention has the beneficial effects as follows: the present invention has increased the monitoring means for monitoring buffer unit data volume in existing electronic data communication system, when storage unit bandwidth deficiency, while causing buffer unit data volume not enough or too much, monitoring means coordinates the frequency that becomes clock generator adjustment communication reference clock, to adjust main communication unit and the communication speed from communication unit; While avoiding buffer unit data volume not enough or too much, cause garble or loss of data; Use these apparatus and method not only not affect practical communication effect, and can guarantee the correctness of communication.
Accompanying drawing explanation
Fig. 1 is easy structure schematic diagram of the present invention;
Fig. 2 is the easy structure schematic diagram in embodiment mono-;
Fig. 3 is the easy structure schematic diagram in embodiment bis-.
Embodiment
The invention discloses a kind of communication clock frequency self-adaption device and method.In order to make the object, technical solutions and advantages of the present invention clearer, push away screen display system and SD card read-write system as example and describe by reference to the accompanying drawings the implementation procedure of the specific embodiment of the invention in detail take LCD below.
embodiment mono-:
Below with reference to accompanying drawing 2, first specific embodiment of the present invention is described.
The LCD of communication clock frequency self-adaption pushes away screen display system, comprises LCD display, lcd controller, SDRAM, data buffer storage, monitoring means and clock generator, and wherein, lcd controller is connected with LCD display, clock generator, data buffer storage.Monitoring means is connected with clock generator, data buffer storage.SDRAM is connected with data buffer storage.The resolution of LCD display is 320X240.When this system is normally worked, data buffering reads the display image data that is stored in SDRAM the inside.Per second in order to guarantee that the refresh rate of LCD display reaches 60 frames, clock generator provides the reference clock signal of 5MHz.Lcd controller produces actual LCD display according to reference clock signal 5MHz and drives clock signal.Then lcd controller drives timeticks according to LCD display, from data buffering reading out data, then sends to LCD display, completes and shows that data send communication process.
When SDRAM be Time Bandwidth deficiency, while causing data buffering data to be less than 7 pixels, monitoring means produce buffer memory by empty signal to clock generator.Clock generator, in the time that buffer memory is effective by spacing wave, is reduced to 500KHz with reference to the frequency of clock signal automatically.LCD display drives the frequency of clock signal also with regard to the corresponding 500KHz that is reduced to, slower 10 times than 5MHz.The spending rate of the data of data buffering the inside just reduces by 10 times so.Before frequency reducing, data buffering, before data run out of completely, has the time of 10 times to continue to read the data of SDRAM relatively.
Under frequency reducing state, if SDRAM's is that Time Bandwidth is restored, data buffering supplements after enough demonstration data in time, and monitoring means is changed to the moderate state of buffer memory by buffer memory by dummy status.LCD display drives the frequency retrieval of clock signal to 5MHz.
Owing to there being the image persistance characteristic of 1/24 second on people's physiology of eye, so as long as LCD display refresh rate is per second higher than 25 frames, human eye pauses with regard to imperceptible picture.In the present embodiment, normal refresh rate is higher 2 times than human eye physiological requirement.Under frequency reducing state, only have the refresh rate of 7 pixels to be slower than normal speed, account for ten thousand of total pixel/.Actual refreshing frequency is very low lower than the possibility of human eye physiological requirement.Do not affecting under the prerequisite of LCD display display effect thereby realize, the data that greatly reduce factor data buffering the inside can not be supplemented in time, cause LCD to show the possibility of error in data.
embodiment bis-:
Below with reference to accompanying drawing 3, second specific embodiment of the present invention described.
The SD card read-write system of communication clock frequency self-adaption, comprising: SD card, SD controller, SDRAM, data buffer storage, monitoring means and clock generator, wherein, SD controller is connected with SD card, clock generator, data buffer storage.Monitoring means is connected with clock generator, data buffer storage.SDRAM is connected with data buffer storage.
When this system is normally worked, clock generator, according to the requirement of SD communication protocol, provides the reference clock signal of 10MHz.SD controller produces actual SD cartoon letters clock according to reference clock signal 10MHz.
Writing in the operating process of SD card, data buffering reads the data that are stored in SDRAM the inside.SD controller, according to SD cartoon letters timeticks, from data buffering reading out data, then sends to SD card, completes the communication process of writing SD card.When SDRAM be Time Bandwidth deficiency, can not be data buffering supplementary data in time, while causing data buffering to be read sky by SD controller, monitoring means produces the empty signal of buffer memory to clock generator.Clock generator is at buffer memory when spacing wave is effective, automatic pause reference clock signal.Correspondingly, SD cartoon letters clock signal is suspended, and SD cartoon letters suspends.Suspending under the state of clock, if SDRAM's is that Time Bandwidth is restored, after the timely supplementary data of data buffering, buffer memory dummy status is changed to the moderate state of buffer memory by monitoring means.Clock generator recovers output reference clock signal.Correspondingly, SD cartoon letters recovering clock signals, SD cartoon letters recovers.
Reading in the operating process of SD card, SD controller, according to SD cartoon letters timeticks, reads and data writing impact damper from SD card.Then, the data that are stored in data buffer the inside are write SDRAM by data buffering, completes the communication process of reading SD card.When SDRAM be Time Bandwidth deficiency, data buffering can not write SDRAM by data in time, causes data buffering to be write when full by SD controller, monitoring means produces signal that buffer memory is full to clock generator.Clock generator is at buffer memory when completely signal is effective, automatic pause reference clock signal.Correspondingly, SD cartoon letters clock signal is suspended, and SD cartoon letters suspends.Suspending under the state of clock, if SDRAM's is that Time Bandwidth is restored, data buffering writes data after SDRAM in time, and monitoring means has been expired state by buffer memory and has been changed to the moderate state of buffer memory.Clock generator recovers output reference clock signal.Correspondingly, SD cartoon letters recovering clock signals, SD cartoon letters recovers.
In SD communication protocol the inside regulation, the read-write motion of SD card all occurs in the saltus step edge of SD communication clock signal.After SD communication clock signal suspension, can there is not any read-write motion in SD card.Do not affecting under the prerequisite of SD card read-write operation thereby realize, stopping the data of factor data buffering the inside and can not process, causing the possibility of SD communication data mistake.
Above embodiment only, for explanation design of the present invention and feature, can not limit protection scope of the present invention with this, and all equivalences that essence is done according to the present invention change or modify, within should being included in protection scope of the present invention.
The present invention can be applicable to communication frequency and regulates field.

Claims (4)

1. a communication clock frequency self-adaption device, it is characterized in that: this device comprises main communication unit, from communication unit, storage unit, buffer unit, monitoring means and clock generator, describedly all be connected with described main communication unit from communication unit, described clock generator and described buffer unit, described clock generator is all connected with described monitoring means with described buffer unit, and described storage unit is connected with described buffer unit.
2. an adaptive approach for communication clock frequency self-adaption device as claimed in claim 1, is characterized in that, the method comprises the following steps:
(1) monitoring means, according to the memory data output of buffer unit, produces monitoring state;
(2) clock generator provides communication reference clock signal for main communication unit, and the monitoring state providing according to monitoring means, automatically adjusts the frequency of communication reference clock signal;
(3) the communication reference clock that main communication unit provides according to clock generator, produces the actual clock of communication, and communication reference clock has definite proportionate relationship with the frequency of the actual clock of communicating by letter;
(4) main communication module, according to the beat of the actual clock of communication, sends to the data in buffer unit from communication unit, or receives the data from communication unit, is stored in buffer unit;
(5) buffer unit is from storage unit reading out data and be stored in buffer unit, or by the data write storage unit being stored in buffer unit.
3. the adaptive approach of communication clock frequency self-adaption device according to claim 2, is characterized in that: in step (1), described monitoring state comprises: buffer memory is empty, buffer memory by sky, buffer memory will expire, buffer memory expired and the moderate five kinds of states of buffer memory.
4. the adaptive approach of communication clock frequency self-adaption device according to claim 3, it is characterized in that, in step (2), while automatically adjusting the frequency of communication reference clock signal, buffer memory will be expired sky and buffer memory under state, reduce communication reference clock frequency; The empty and buffer memory of buffer memory completely under state, suspends the reference clock of communicating by letter; Under the moderate state of buffer memory, provide the communication reference clock of normal frequency to main communication unit.
CN201410004384.4A 2014-01-06 2014-01-06 Communication clock frequency self-adaption device and method Pending CN103777676A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104765577A (en) * 2015-04-28 2015-07-08 杭州中天微系统有限公司 High-speed storage system achieving self-adaptive frequency

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CN1334661A (en) * 2000-07-24 2002-02-06 日本电气株式会社 System and method for clock synchronization of general serial bus receiver apparatus
CN1578255A (en) * 2003-07-29 2005-02-09 上海贝尔阿尔卡特股份有限公司 Adaptive clock recovery method used for packet switching metwork
CN101286087A (en) * 2008-05-04 2008-10-15 普天信息技术研究院有限公司 Flash memory card power consumption control method and terminal
CN101820324A (en) * 2010-04-30 2010-09-01 中兴通讯股份有限公司 Synchronous transmission method and system for asynchronous data
CN203858540U (en) * 2014-01-06 2014-10-01 建荣集成电路科技(珠海)有限公司 Communication clock frequency self adapting device

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5323426A (en) * 1992-02-21 1994-06-21 Apple Computer, Inc. Elasticity buffer for data/clock synchronization
US5905887A (en) * 1995-03-01 1999-05-18 Opti Inc. Clock frequency detection for computer system
CN1334661A (en) * 2000-07-24 2002-02-06 日本电气株式会社 System and method for clock synchronization of general serial bus receiver apparatus
CN1578255A (en) * 2003-07-29 2005-02-09 上海贝尔阿尔卡特股份有限公司 Adaptive clock recovery method used for packet switching metwork
CN101286087A (en) * 2008-05-04 2008-10-15 普天信息技术研究院有限公司 Flash memory card power consumption control method and terminal
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104765577A (en) * 2015-04-28 2015-07-08 杭州中天微系统有限公司 High-speed storage system achieving self-adaptive frequency
CN104765577B (en) * 2015-04-28 2017-08-15 杭州中天微系统有限公司 A kind of adaptive high-speed memory system of frequency

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