CN103713912A - Automatic power on circuit of computer - Google Patents

Automatic power on circuit of computer Download PDF

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Publication number
CN103713912A
CN103713912A CN201210370693.4A CN201210370693A CN103713912A CN 103713912 A CN103713912 A CN 103713912A CN 201210370693 A CN201210370693 A CN 201210370693A CN 103713912 A CN103713912 A CN 103713912A
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China
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electronic switch
computing machine
resistance
south bridge
connects
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CN201210370693.4A
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Chinese (zh)
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CN103713912B (en
Inventor
阮仕涛
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Shenzhen Prafly Technology Co Ltd
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Shenzhen Prafly Technology Co Ltd
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Abstract

The invention discloses an automatic power on circuit of a computer. The automatic power on circuit used for automatic power on of the computer comprises a south bridge chip, a super input-output chip connected with the south bridge chip, a first electronic switch, a second electronic switch, a first capacitor, a first resistor, a second resistor and a third resistor. Each of the first electronic switch and the second electronic switch comprises a first end, a second end and a third end. The third end of the first electronic switch is connected with the rest signal end RSMRST# of the south bridge chip through the first capacitor. The first end of first electronic switch is connected with the rest signal end RSMRST# of the south bridge chip through a delay module. The second end of the first electronic switch is connected with the first end of the second electronic switch through the first resistor. The second end of the second electronic switch is grounded. The third end of the second electronic switch are respectively connected with the power on triggering signal end FP_PWRBTN# of the super input-output chip and a standby power supply of the computer through the third resistor. The automatic power on circuit implemented by the total-hardware structure is simple in circuit structure and low in cost.

Description

A kind of computing machine automatic boot circuit
Technical field
The present invention relates to automatic boot circuit, more particularly, relate to a kind of being applied in after computer system telegram in reply, can restart the computing machine automatic boot circuit of computer system.
Background technology
Computing machine application in people's life is more and more extensive, as personal computer and industrial computer.In the operation of computer system, if there is civil power power-off, computer shutdown, when civil power heavily comes after, often requirement calculating function is started shooting and is resumed work at once.The common practice of the computer motherboard of present stage is that super I/O chip provides hardware circuit to control, and BIOS provides software control, and for example BIOS need to be POWER ON ACPOWER FAIL function setting, comes civil power with regard to Auto Power On at every turn like this.But adopt aforesaid way to need BIOS to control, the CMOS of BIOS arranges needs a RTC powered battery could keep arranging, when cause RTC battery loosening due to reasons such as vibrations, the RTC transient loss of powering, or due to the long-time RTC powered battery undertension that uses, CMOS arranges will lose and revert to factory-default, and the function setting of AC POWER LAIL also may be modified, and the automatic turn-on function that causes sending a telegram here can not be realized.
Summary of the invention
The technical problem to be solved in the present invention is, for the defect that needs hardware and software co-controlling computing machine Auto Power On, software boot program complexity of prior art, provide a kind of by hardware circuit and the simple computing machine automatic boot circuit of circuit structure.
The technical solution adopted for the present invention to solve the technical problems is: a kind of computing machine automatic boot circuit is provided, for automatically opening this computing machine, comprise South Bridge chip, and the super I/O chip being connected with South Bridge chip, also comprise the first electronic switch, the second electronic switch, the first electric capacity, the first resistance, the second resistance and the 3rd resistance; Described the first electronic switch and the second electronic switch comprise respectively first end, the second end, the 3rd end; The 3rd end of described the first electronic switch connects the reset signal end RSMRST# of South Bridge chip by described the first electric capacity, first end connects the reset signal end RSMRST# of South Bridge chip by time delay module, the second end connects the first end of described the second electronic switch by the first resistance; The second end ground connection of described the second electronic switch, the 3rd end connect respectively super I/O chip start trigger pip end FP_PWRBTN#, by the 3rd resistance, connect the standby power of described computing machine.
In computing machine automatic boot circuit of the present invention, described time delay module comprises the 4th resistance and the second electric capacity, and one end of described the second electric capacity connects the first end of the first electronic switch, and the other end connects one end of described the 4th resistance; The other end of described the 4th resistance connects the reset signal end RSMRST# of South Bridge chip.
In computing machine automatic boot circuit of the present invention, described automatic boot circuit also comprises the first diode, and the negative electrode of this diode connects the 3rd end of described the first electronic switch, plus earth.
In computing machine automatic boot circuit of the present invention, described the first electronic switch is N-channel MOS type field effect transistor, and its first end, the second end, the 3rd end are respectively grid, source electrode, drain electrode.
In computing machine automatic boot circuit of the present invention, described the second electronic switch is NPN triode, and its first end, the second end, the 3rd end are respectively base stage, emitter, collector.
In computing machine automatic boot circuit of the present invention, described the first diode is schottky diode.
Implement computing machine automatic boot circuit of the present invention, there is following beneficial effect: this computing machine automatic boot circuit can be when computing machine restores electricity, control the first electronic switch conducting, and then control the second electronic switch conducting, export a low level to the start trigger pip end FP_PWRBTN# of super I/O chip, then super I/O chip notice South Bridge chip start.The implementation of computing machine automatic boot circuit of the present invention is devices at full hardware structure, and its line construction is simple, and cost is low.
Accompanying drawing explanation
Below in conjunction with drawings and Examples, the invention will be further described, in accompanying drawing:
Fig. 1 is the schematic diagram of computing machine automatic boot circuit of the present invention.
Embodiment
In order to make object of the present invention clearer, below in conjunction with drawings and Examples, the present invention is further elaborated.Should be appreciated that specific embodiment described herein, only in order to explain the present invention, is not intended to limit the present invention.
As shown in Figure 1, schematic diagram at computing machine automatic boot circuit of the present invention, for automatically opening this computing machine, comprise South Bridge chip 10, and the super I/O chip 20 being connected with South Bridge chip 10, also comprise the first electronic switch, the second electronic switch, the first capacitor C 1, the first resistance R 1, the second resistance R 2, the 3rd resistance R 3, time delay module 10, the first diode D1; In specific implementation process, the first electronic switch adopts N-channel MOS type field effect transistor Q1, and the second electronic switch adopts NPN triode Q2.
The drain electrode of field effect transistor Q1 connects the reset signal end RSMRST# of South Bridge chip 10 by the first capacitor C 1, grid connects the reset signal end RSMRST# of South Bridge chip 10 by time delay module 30, and source electrode is by the base stage of the first resistance R 1 connecting triode Q2; The grounded emitter of triode Q2, collector connect respectively super I/O chip 20 start trigger pip end FP_PWRBTN#, by the 3rd resistance R 3, connect the standby power+V3.3SB of these computing machines.
Time delay module 30 comprises that one end of the 4th resistance R 4 and the second capacitor C 2, the second capacitor C 2 connects the grid of field effect transistor Q1, and the other end connects one end of the 4th resistance R 4; The other end of the 4th resistance R 4 connects the reset signal end RSMRST# of South Bridge chip 10.
The first diode D1 negative electrode connects the drain electrode of field effect transistor Q1, plus earth.In specific implementation process, this diode D1 is schottky diode, as adopted model, is the diode of IN4148.
In specific works process, when all standby powers of South Bridge chip 10 all set after, the RSMRST# signal of reset signal end RSMRST# output high level+3.3V(reset signal end RSMRST# is the POWER OK signal of the standby power of South Bridge chip, by feed circuit of mainboard, exports to South Bridge chip).Start trigger pip end FP_PWRBTN# is the starting-up signal to super I/O chip 20, and when FP_PWRBTN# has a low level, super I/O chip 20 will notify South Bridge chip 10 starts.
When civil power one, computing machine powers at once, all standby powers of South Bridge chip 10 all set, the reset signal end RSMRST# of South Bridge chip 10 becomes high level by change to+3.3V(of 0V by low level), by the 4th resistance R 4 and the second capacitor C 2, do after time delay, field effect transistor Q1 conducting, high level+the 3.3V of the reset signal end RSMRST# output of South Bridge chip 10 is by field effect transistor Q1, the first resistance R 1, the loop that the second resistance R 2 forms starts the first capacitor C 1 charging, B point (base terminal of triode Q2) voltage reaches the highest, and surpass the forward voltage of triode Q2, triode Q2 conducting, the collector output low level of triode Q2, to the start trigger pip end FP_PWRBTN# output low level of super I/O chip 20.Along with reducing of charging current, the voltage that B is ordered also reduces, when B point voltage is less than the forward voltage of triode Q2, triode Q2 cut-off, the start trigger pip end FP_PWRBTN# that is super I/O chip 20 is high level, triode Q2 has just exported a low pulse to super I/O chip 20 like this, and super I/O chip 20 notice South Bridge chips 10 are started shooting, and have so just realized the function of incoming call Auto Power On.
When the first capacitor C 1 is full of after electricity, the voltage of have+3.3V between the 1st pin of the second capacitor C 2 and the 2nd pin, when civil power disconnects, the reset signal end RSMRST# of South Bridge chip 10 is become 0V(high level and is become low level from+3.3V), because the first capacitor C 1 both end voltage can not be suddenlyd change, therefore the first capacitor C 1 the 2nd pin voltage-to-ground is-3.3V, the voltage at the first capacitor C 1 two ends can discharge over the ground by the first diode D1, and whole like this automatic boot circuit just can be waited for next time and again trigger start during civil power.
The pulsewidth of the low level pulse of the start trigger pip end FP_PWRBTN# of super I/O chip 20 can be by adjusting the first resistance R 1 and the second resistance R 2 changes.
By the delay circuit that adopts the 4th resistance R 4 and the second capacitor C 2 to form, the low pulse of trigger pip end FP_PWRBTN# of can preventing from starting shooting is sent too early and is caused computing machine not start shooting, because the low pulse signal of FP_PWRBTN# must send after reset signal end RSMRST# signal is ready to, mainboard could normal boot-strap.
Adopt computing machine automatic boot circuit of the present invention, when sending a telegram here after power down, gives by computing machine low pulse of start trigger pip end FP_PWRBTN# of super I/O chip 20, the action start of key is pressed in simulation, not controlled by bios software, no matter whether RTC battery is subject to vibrations to cause RTC power supply to be lost, no matter use the whether electricity shortage of RTC battery due to long-time, can realize incoming call automatic turn-on function.By adopting this computing machine automatic boot circuit, when computing machine restores electricity, control field effect transistor Q1 conducting, and then control triode Q2 conducting, export a low level to the start trigger pip end FP_PWRBTN# of super I/O chip 20, then super I/O chip 20 notice South Bridge chip 10 starts.The implementation of computing machine automatic boot circuit of the present invention is devices at full hardware structure, and its line construction is simple, and cost is low.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, all any modifications of doing within the spirit and principles in the present invention, be equal to and replace and improvement etc., within all should being included in protection scope of the present invention.

Claims (6)

1. a computing machine automatic boot circuit, for automatically opening this computing machine, comprise South Bridge chip, and the super I/O chip being connected with South Bridge chip, it is characterized in that, also comprise the first electronic switch, the second electronic switch, the first electric capacity, the first resistance, the second resistance and the 3rd resistance; Described the first electronic switch and the second electronic switch comprise respectively first end, the second end, the 3rd end; The 3rd end of described the first electronic switch connects the reset signal end RSMRST# of South Bridge chip by described the first electric capacity, first end connects the reset signal end RSMRST# of South Bridge chip by time delay module, the second end connects the first end of described the second electronic switch by the first resistance; The second end ground connection of described the second electronic switch, the 3rd end connect respectively super I/O chip start trigger pip end FP_PWRBTN#, by the 3rd resistance, connect the standby power of described computing machine.
2. computing machine automatic boot circuit according to claim 1, is characterized in that, described time delay module comprises the 4th resistance and the second electric capacity, and one end of described the second electric capacity connects the first end of the first electronic switch, and the other end connects one end of described the 4th resistance; The other end of described the 4th resistance connects the reset signal end RSMRST# of South Bridge chip.
3. computing machine automatic boot circuit according to claim 2, is characterized in that, described automatic boot circuit also comprises the first diode, and the negative electrode of this diode connects the 3rd end of described the first electronic switch, plus earth.
4. computing machine automatic boot circuit according to claim 3, is characterized in that, described the first electronic switch is N-channel MOS type field effect transistor, and its first end, the second end, the 3rd end are respectively grid, source electrode, drain electrode.
5. computing machine automatic boot circuit according to claim 4, is characterized in that, described the second electronic switch is NPN triode, and its first end, the second end, the 3rd end are respectively base stage, emitter, collector.
6. computing machine automatic boot circuit according to claim 5, is characterized in that, described the first diode is schottky diode.
CN201210370693.4A 2012-09-29 2012-09-29 A kind of computer automatic boot circuit Expired - Fee Related CN103713912B (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104407668A (en) * 2014-10-29 2015-03-11 大唐移动通信设备有限公司 Board card for controlling automatic electrification of board card based on X86 system architecture
CN106155250A (en) * 2015-04-17 2016-11-23 鸿富锦精密工业(武汉)有限公司 Computer reflex circuit
CN106292984A (en) * 2016-09-05 2017-01-04 深圳微步信息股份有限公司 Automatic boot circuit and automatic power-on method
CN106291438A (en) * 2015-06-09 2017-01-04 深圳市祈飞科技有限公司 Abnormal shutdown processing method and processing device and electric energy measuring equipment equipped therewith
CN107807728A (en) * 2016-09-09 2018-03-16 佛山市顺德区顺达电脑厂有限公司 Shut down discharge system

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN201242718Y (en) * 2008-07-23 2009-05-20 佛山市顺德区顺达电脑厂有限公司 Automatic startup apparatus
CN201773350U (en) * 2010-03-10 2011-03-23 深圳华北工控股份有限公司 Computer master control board power supply management module for PCTV integrated machine
CN202025308U (en) * 2011-03-02 2011-11-02 深圳市研祥软件技术有限公司 Computer and automatic boot circuit thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN201242718Y (en) * 2008-07-23 2009-05-20 佛山市顺德区顺达电脑厂有限公司 Automatic startup apparatus
CN201773350U (en) * 2010-03-10 2011-03-23 深圳华北工控股份有限公司 Computer master control board power supply management module for PCTV integrated machine
CN202025308U (en) * 2011-03-02 2011-11-02 深圳市研祥软件技术有限公司 Computer and automatic boot circuit thereof

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104407668A (en) * 2014-10-29 2015-03-11 大唐移动通信设备有限公司 Board card for controlling automatic electrification of board card based on X86 system architecture
CN104407668B (en) * 2014-10-29 2017-07-28 大唐移动通信设备有限公司 It is a kind of to control the upper electric board automatically of the board based on X86 system architectures
CN106155250A (en) * 2015-04-17 2016-11-23 鸿富锦精密工业(武汉)有限公司 Computer reflex circuit
CN106155250B (en) * 2015-04-17 2019-08-06 鸿富锦精密工业(武汉)有限公司 Computer reflex circuit
CN106291438A (en) * 2015-06-09 2017-01-04 深圳市祈飞科技有限公司 Abnormal shutdown processing method and processing device and electric energy measuring equipment equipped therewith
CN106291438B (en) * 2015-06-09 2019-06-07 深圳市祈飞科技有限公司 Abnormal shutdown processing method and processing device and electric energy measuring equipment equipped therewith
CN106292984A (en) * 2016-09-05 2017-01-04 深圳微步信息股份有限公司 Automatic boot circuit and automatic power-on method
CN107807728A (en) * 2016-09-09 2018-03-16 佛山市顺德区顺达电脑厂有限公司 Shut down discharge system

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