CN103685041B - Programmable router and routing method based on bit granularity - Google Patents
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Abstract
The invention provides a programmable virtual router and a routing method. The programmable virtual router comprises a programmable hardware board card, a PCI/PCI-E bus and a host computer, wherein the hardware board card is connected with the host computer through the bus; a data plane structure with programmable bit granularity is achieved through the programmable hardware board card; the data plane structure supports the extraction of arbitrary bit in a data packet, and supports the combination of arbitrary bit length of boundary part across the bus length, so that arbitrary domain in the data packet can be extracted and combined; parallel running of virtual router samples is achieved though the design of multi-pipelining; the host computer is used for achieving a virtual control plane, and the virtual control plane can be dynamically connected with the virtual routers in the programmable hardware board card to form a mapping relation. According to the invention, the data plane and online programming capability for processing data packets of arbitrary types can be provided.
Description
Technical field
The present invention relates to Internet technical field, and in particular to programmable router structure, more particularly to it is a kind of be based on than
The programmable router of special granularity and method for routing.
Background technology
Internet experienced the development in more than 30 years, achieve huge success, have become All Around The World indispensable
Information interchange and the approach for obtaining.With developing rapidly for computer and the communication technology, a large amount of new business and new association have been expedited the emergence of
View, such as P2P, VOD, cloud computing, social networks, mobile Internet etc.；In addition, for running in above internet development
Problem, the researchers of internet arena propose various new network architectures and improvement project, such as content name net
Network (Named Data Network), service orientation network, towards mobile network etc., new network architectural framework is compiled in name
The aspects such as location, routing forwarding all introduce new mechanism, in order to meet the demand of new agreement, the data packet format transmitted in network
The form of IP is not limited to, researcher must not be added without or reduce existing header field or introduce self-defining bag lattice
Formula.But existing router device is difficult to support these new processing data packets, this is accomplished by being put down in the data of router
Corresponding innovation is done on face so that router can support the process and forwarding of all kinds packet.
Emerge some design structures to provide the programmability of router now, their programmable ability
Determined by its internal structure with degree.Different structures has different DLL and different programming complexities.
Click, SwitchBlade, when user needs to add new processing function, are needed using the programmable structure based on module
The solution programming language such as device programming principle and C, Verilog, and re-start design and compile integration as needed, it is such
Programming structure brings higher design complexities, and needs equipment break-off when New function is added, and does not provide online
Programmability.OpenFlow using based on flow table structure can Configuration Online forwarding rule, with very high flexibility, but
The datum plane structure of OpenFlow can not change, if necessary to the new agreement related to forwarding of the addition in OpenFlow or work(
Can, such as deployment non-ip protocol or based on functions such as TCP sequence numbers shuntings if can only in the controller write software realization, it is impossible to obtain
The support of datum plane high speed forward, bag forwarding speed will become bottleneck, and be based on ten tuple programming structures of IP packets not
Enough flexible in programming can be provided.The change of packet structure from now on possibly be present at each position of packet, therefore
Need datum plane that there is the ability for processing any type of data bag.
The content of the invention
(1) technical problem
The problem to be solved in the present invention is how to provide the datum plane and online programming energy that process any type of data bag
Power.
(2) technical scheme
The present invention provides a kind of programmable virtual router, it include programmable hardware board, PCI/PCI-E buses and
Main frame, the hardware board is connected by the bus with the main frame, and by the programmable hardware board bit is realized
Granularity programmable data planar structure, the extraction of any bit in the datum plane structural support packet, support across
The combination of any bit length of boundary member of bus length, so as to arbitrarily-shaped domain is carried out extraction combination in packet, by many
Multiple virtual routers are realized in the design of streamline；The main frame is used to realize virtual control plane, the virtual control
Plane is dynamically connected to form mapping relations with the multiple virtual routers in programmable hardware board.
Optionally, the programmable hardware board includes：
Multiple input ports, for input data bag, each input port is to there is respective input rank；
Input arbitration modules, for the streamed data bag in the way of poll or WRR to each data processing unit；
Multiple data processing units, for extracting the corresponding sequential bit of packet, and process the data of fixed bit wide；
Retransmission unit, for being programmed customization forwarding.
Optionally, the programmable hardware board is FPGA boards.
Optionally, the programmable hardware board also includes crosspoint, for being determined by retransmission unit in packet
Behind forwarding port, the packet reselection output port of pair determination forwarding port.
Optionally, the input port and output port are selected in network interface and PCI/PCI-E EBIs.
Optionally, the plurality of data processing unit structure is identical, and mutually cascades.
The present invention also provides a kind of programmable method for routing, and it comprises the following steps：
1) bit granularity programmable data planar structure, the datum plane structure are realized using programmable hardware board
The arbitrarily extraction of bit in packet is supported, the combination in any bit length of boundary member across bus length is supported, so as to
Arbitrarily-shaped domain is carried out extraction combination in packet；
2) virtual control plane, the multiple virtual road in the virtual control plane and programmable hardware board are realized
Dynamically connected to form mapping relations by device.
3) by the control plane, datum plane is configured and is programmed.
Optionally, the control plane is additionally operable to generate multiple virtual machines to run different control plane agreements, virtually
Multiple virtual routers in the port and programmable hardware board of machine dynamically connect to form mapping relations.
Optionally, the step 1) further include：
10) by input port input data bag, each input port is to there is respective input rank；
11) in the way of poll or WRR streamed data bag to each data processing unit；
12) the corresponding sequential bit of packet is extracted using the data processing unit, and processes the number of fixed bit wide
According to；
13) it is programmed customization forwarding using retransmission unit.
Optionally, the step 13) further include：
131) user defines the form and data field processing mode of packet by DLL；
132) using the Extensible pipeline structure of unified definition come each data field of processing data bag, adopt condition
Expression formula is mapped to the programming scheme of TCAM come the PLC technology for realizing forwarding.
133) processing function of the inside of control is selected by the rule of user's setting.
(3) technique effect
The present invention with virtualized technological means using bit granularity is programmable by enabling router topology to provide
Online programmable, datum plane high-speed parallel forwards, can process the function of any type of data bag.
Description of the drawings
Fig. 1 represents the overall structure based on the programmable router of bit granularity of the present invention；
Fig. 2 represents the datum plane structure of the router of the present invention；
Fig. 3 represents the bag processing unit internal structure of the router of the present invention；
Fig. 4 represents the form of the process level programming of the router of the present invention；
Fig. 5 represents the internal structure of the forwarding level of the router of the present invention；
Fig. 6 represents the Programming Principle of the forwarding level of the router of the present invention；
Fig. 7 represents IP packets processing format in the dataplane；
Fig. 8 represents the process level programmed scripts form of programmed configurations IPv4 router；
Fig. 9 represents the forwarding level programmed scripts form of programmed configurations IPv4 router.
Specific embodiment
Embodiment 1：
The present invention provides a kind of programmable virtual router, it include programmable hardware board, PCI/PCI-E buses and
Main frame, the hardware board is connected by the bus with the main frame, and by the programmable hardware board bit is realized
Granularity programmable data planar structure, the extraction of any bit in the datum plane structural support packet, support across
The combination of any bit length of boundary member of bus length, so as to arbitrarily-shaped domain is extracted and combines in packet, by multithread
Multiple virtual routers are realized in the design of waterline；The main frame is used to realize virtual control plane that the virtual control to be put down
Face is dynamically connected to form mapping relations with the multiple virtual routers in programmable hardware board.
Optionally, the programmable hardware board includes：
Multiple input ports, for input data bag, each input port is to there is respective input rank；
Input arbitration modules, for the streamed data bag in the way of poll or WRR to each data processing unit；
Multiple data processing units, for extracting the corresponding sequential bit of packet, and process the data of fixed bit wide；
Retransmission unit, for being programmed customization forwarding.
Optionally, the programmable hardware board is FPGA boards.
Optionally, the programmable hardware board also includes crosspoint, for being determined by retransmission unit in packet
Behind forwarding port, the packet reselection output port of pair determination forwarding port.
Optionally, the input port and output port are selected in network interface and PCI/PCI-E buses.
Optionally, the plurality of data processing unit structure is identical, and mutually cascades.
The present invention also provides a kind of based on the programmable method for routing of bit granularity, and it comprises the following steps：
1) bit granularity programmable data planar structure, the datum plane structure are realized using programmable hardware board
The arbitrarily extraction of bit in packet is supported, the combination in any bit length of boundary member across bus length, data are supported
Arbitrarily-shaped domain can be extracted and combine in bag；
2) virtual control plane, the multiple virtual road in the virtual control plane and programmable hardware board are realized
Dynamically connected to form mapping relations by device.
3) by the control plane, datum plane is configured and is programmed.
Optionally, the control plane is additionally operable to generate multiple virtual machines to run different control plane agreements, virtually
Multiple virtual routers in the port and programmable hardware board of machine dynamically connect to form mapping relations.
Optionally, the step 1) further include：
10) by input port input data bag, each input port is to there is respective input rank；
11) in the way of poll or WRR streamed data bag to each data processing unit；
12) the corresponding sequential bit of packet is extracted using the data processing unit, and processes the number of fixed bit wide
According to；
13) it is programmed customization forwarding using retransmission unit.
Optionally, the step 13) further include：
131) user defines the form and data field processing mode of packet by DLL；
132) using the Extensible pipeline structure of unified definition come each data field of processing data bag, adopt condition
Expression formula is mapped to the programming scheme of TCAM come the PLC technology for realizing forwarding.
133) processing function of the inside of control is selected by the rule of user's setting.
Embodiment 2：
The scheme of the ASIC structures such as the present embodiment and exchange chip, network processing unit is different, using programmable hardware such as
FPGA can realize bit granularity programmable data planar structure come the function of building datum plane, this is because FPGA's is interior
Portion's logic can be defined by developer, so can ensure that each processing links is designed and portion according to our thought
Administration.
(1) general structure
Shown in Fig. 1 for programmable data plane hardware configuration, datum plane be based on programmable hardware, such as FPGA,
Packet is input in board by EBIs such as input port such as network interface, PCI, and each input port is respective defeated to having
Enqueue, packet is queued up wherein in FIFO modes.The input arbitration modules of one high speed are with poll or the side of WRR
To each virtual datum plane, that is, in the forwarding flow waterline being separated from each other, these streamlines are all isomorphisms to formula streamed data bag
's.The packet header process part of streamline is made up of mutually isostructural bag processing unit, in order to realize the bit granularity of packet
Programmability, process streamline each processing unit the corresponding sequential bit of packet can be extracted, often
Individual unit can process the data of fixed bit wide, and the processing unit of front stage is also combined into longer process width, Yong Huke
To be configured to the function of each processing unit by configuring process rule.TCAM can be selected in processing function to look into
Table, Hash matching, basic operation etc. come process bit combination into data field, the result of all processing units all can be final
Output is converged to forwarding level；In forwarding level, user can realize programming customization forwarding work(by configuring TCAM lookup forward tables
Can, but after the forwarding port of packet determines, packet is sent to crosspoint and swaps output, selection and the input of output
Port equally can select in the bus such as network interface and PCI.Hardware board is connected by PCI/PCI-E with main frame, control
The function of plane is located in main frame, and main function includes the virtualization mechanism of control plane, and the port of virtual machine and data are put down
The dynamic mapping mechanism and the configuration to datum plane and control function of panel card.Control plane can generate multiple virtual machines
To run different control plane agreements, these virtual control planes can be with the multiple virtual routers in hardware dynamically
Connect to form mapping relations.The configuration and programming of datum plane is also to be realized by control plane, and control plane can pass through
The programing function of datum plane is realized to register configuration in hardware.
(2) level production line detailed construction and programming rule are processed
Pipeline organization figure is as shown in Fig. 2 process level part is by the bag processing unit cascade of automorphis, number
Being input to process level according to bag has two paths, and one is made a look up into bag processing unit, and the operation such as judgement, result is supplied
Forwarding level judges port and the destination address of output；Also another paths are based on such consideration：The port of output judges
It is could to determine after packet header is disposed, and bus data now is without the data in packet header, it is necessary to packet header
Data are cached for output in FIFO.
Each bag processing unit realizes the process in corresponding data domain under being uniformly controlled of time-sequence control module, each module
In have many registers to store programmable information respectively, the bit wide and function of these registers be also it is different, such as two
The mask for planting input is selected, and the computing of process is selected, the operand of computing, and the purpose module of output is selected, and the result of output is selected
Select, and the side-play amount of output etc..Selection and process to data field is all based on programming control of the user to these registers
System, whole processing unit structure is as shown in figure 3, its data input includes two parts：Number to be processed is needed on Current bus
According to the data after having processed with previous stage, this two-part data can be combined according to input rule, the number after combination
According to can select matched rule and corresponding processing mode, predefined matched rule include Hash matching, TCAM search and
Relatively operate, Hash is matched for most basic match condition, the such as classification of MAC Address, the identification of Packet type, all only need to by
A certain data field is compared with specific numerical value；TCAM locating functions are used for routing table lookup, ARP table lookup etc. to be needed to carry out
The situation of high speed table lookup operation；Relatively operation is compared etc. for TTL and needs to carry out the occasion of data comparison.Result has two
Outbound course, some regular results can export next stage, the such as result of longest prefix match；The process of other rules
As a result forwarding level can be exported, the final output form and output port of these results meeting determination data bags.
As shown in figure 4, it includes 13 domains for entirety, respectively word is selected, is used for for the configuration rule form of process level
Select the processing stream water unit present position that current rule is used；Bit to be processed needed for side-play amount is used to select is defeated at two kinds
Enter data division present position；Match pattern is used to select the type of matching operation；Operation part define the type of operation with
And the numerical value of operand；Output control part is mainly used in selecting the form and outbound course of output, can per rule
Define side-play amount of the output in whole output data after oneself processing, the selection for exporting purpose is defeated for determining module
Go out to next stage or final forwarding level.
(3) level detailed construction and programming rule are forwarded
Forwarding level be made up of individual module, its structure as shown in figure 5, from each processing unit output result as this
The input of module, these inputs are included and select letter for the information of packet change and the judgement for determining output port
Breath, the inside modules also have register to distinguish this two-part data, including each side-play amount for being input into, function and process side
Formula can in a register do corresponding control.Information for changing packet is changed needed for can directly replacing in output
Data field；And the information for being used for output port judgement typically can select to determine final output end through complicated logic
Mouthful, for common router or middleboxes, these inputs can be entered in finite state machine in the way of conditional expression
Row is processed, but this mode is not easy to programmable realization, and in order to solve this problem, we employ conditional expression and reflect
The mode penetrated is solving this problem.By taking Fig. 6 as an example, input signal includes that L, M, N tri- judge signal, and each takes 1 bit
Width, as shown in the code of the leftmost side, different logical combinations cause packet loss to conditional expression, be forwarded to the network port and turn
It is dealt into the decision-makings such as control plane.Such a structure is easy to be represented by the decision tree of tree structure, such as middle figure
It is shown, and it is understood that in order to all syntagmatics for representing 3 bits need to use 23=8 tree node to represent, when than
Extra wide degree increase when, need represent nodes will index increase, this mean that needs with interstitial content identical list item
To represent so that the complexity and resources occupation rate of programming is high, in order to solve this problem so that we using TCAM three
The characteristics of state is searched carrying out the optimization of programmability, in scheme as a example by expression formula, the combination unrelated with required state
Can be substituted with the indefinite state in TCAM, thus 8 rules can be compressed to 4, and when bit width increases, pressure
Contracting ratio will further increase.Can realize in this way forwarding the programmable selection of destination interface.
In order that our structure can match with centralized procotol and control system, such as OpenFlow
Agreement, datum plane allows to be configured using stream tableau format, such as the ten tuple flow table matching domains of OpenFlow can be first
The operation of the corresponding bit of process level is converted into, and the Action domains of flow table can then be converted into TCAM sheet forms and be forwarded,
So our datum plane not only can be programmed but also can be based on centralized controller based on distributed Routing Protocol
Carry out the configuration such as flow table and realize centralized Control.
Embodiment 3：
Concrete enforceable scene of the invention includes：
Implement scene one：Commercial network, including the internet for being currently based on IPv4 and the network based on IPv6, router
The compatible current procotol of flexible programmable and standard.
Implement scene two：Transmission via net experiment porch, the innovation of network architecture needs experiment porch to be tested
Test, it has the demand of the programmable router of inherence.
Implement scene three：Data center network, in order that the network-efficient inside data center runs, researcher carries
Go out many new agreements, these agreements also propose requirement to the programmability of middleboxes.
We describe programmability by taking IPv4 routers in the most frequently used commercial network as an example, and IP bags are in datum plane
In processing format as shown in fig. 7, every 64 bit is divided into a word in figure, each word is individually by a bag processing unit
Reason, we divide the function of each word to need content to be processed with each word：Word 0 is the control word of packet, including packet length
And the input port information of bag, this partially due to be not header packet information, so without processing；Word 1 includes target MAC (Media Access Control) address
(63-16), router needs to judge whether target MAC (Media Access Control) address is dealt into local and whether is broadcast data packet, if
Broadcast packet then needs the control plane for sending；The type (31-16) for judging packet is needed in word 2, is determined if it is
IP bags or non-IP such as ARP bags；Need the numerical value (15-8) for judging TTL whether correct in word 3, need to do if correct
The operation that TTL subtracts one；Need to judge whether check value (63-48) is correct and purpose IP address are high 16 in word 4
(15-0) is sent to next stage；Word 5 needs for the input of purpose IP address low 16 (63-48 positions) and higher level to be combined into 32
The purpose IP address of position, and the lookup of LPM is carried out, lookup result output carries out the process of ARP lookups to next stage (the 6th grade).
The rule that we define is as shown in figure 8, these outputs for processing finally converge to forwarding level.
Forwarding level will determine that Signal separator out can obtain afterwards 9 kinds and judge signal, router needs according to these signals come
The process for being forwarded, user can define the forwarding purpose of packet by the rule of the TCAM look-up tables shown in Fig. 9
Port and address.The data that first rule describes to be sent from control plane can be exported directly from corresponding port, Article 2
It is defined as below to Article 7 rule, following kind of bag needs to be sent to control plane：Non-IP packet, the data of check errors
Bag, the specified control plane, packet header of being dealt into have option, TTL mistakes and LPM to search the miss capital of miss and ARP lookups
It is sent to control plane, the port output that only normal packet just can be from after lookup after LPM and ARP is searched and hit.
From detailed description above, it is proposed by the present invention based on bit granularity programmable virtual router by two parts
Composition, based in operating system software sharing control plane and based on programmable hardware datum plane is constituted.The present invention sets
Various existing and possible agreement from now on can be disposed on the programmable router topology of bit granularity of meter.
It has following characteristic：
Bit granularity may be programmed：In order to adapt to the demand of network Development, router needs to support new business and new system frame
The innovation of structure, network middleboxes can not have been innovated only in control plane, be supported with greater need for the innovation of datum plane various types of
The process of type packet.Datum plane allows the extraction of any bit, and in the boundary member across bus length any bit is allowed
The combination of length, realizes the extraction combination ability of arbitrarily-shaped domain in packet, and the data field for extracting allows user's definition process work(
Can, such as TCAM is searched, Hash matching, is compared, the operation such as computing, to realize the programmability of processing data packets；That what is wrapped turns
Send out destination interface and destination address is decided by the result in packet header, in order that the mode of bag forwarding also can be real by programming
Existing, packet header result is encoded and is determined using the tri-state search capacity of TCAM the final output of packet by datum plane.
Virtualization is supported：In order that router can allow multiple heterogeneous networks to run simultaneously, these networks both can be with
Be isomorphism can also be isomery, router is required to support that virtualization, i.e., multiple router in-stances run simultaneously.Route
Device needs the function of needing to be kept completely separate on the control plane, functional independence operation, can be respectively configured respective agreement, they it
Between be independent of each other, with good isolation；On datum plane, the data in each router in-stance can respectively carry out high speed
Process, the data after process can be regrouped in a kind of effectively mode.
Embodiment of above is merely to illustrate the present invention, and not limitation of the present invention, the such as present invention can also be used to receive
Other crops are cut, about the those of ordinary skill of technical field, without departing from the spirit and scope of the present invention, is gone back
Can make a variety of changes and modification, therefore the technical scheme of all equivalents falls within scope of the invention, the patent of the present invention
Protection domain should be defined by the claims.
Claims (10)
1. a kind of programmable virtual router, it is characterised in that including programmable hardware board, bus and main frame, the hardware
Board is connected by the bus with the main frame, and by the programmable hardware board the programmable number of bit granularity is realized
According to planar structure, the extraction of any bit in the datum plane structural support packet is supported across the border of bus length
The combination of part arbitrarily bit length, so as to arbitrarily-shaped domain is carried out extraction combination in packet, by the design reality of multiple pipeline
Existing multiple virtual routers；The main frame is used to realize virtual control plane that the virtual control plane to be hard with programmable
Multiple virtual routers in part board dynamically connect to form mapping relations；
Wherein, the port of the programmable hardware board output judge could to be determined after packet header is disposed, and now
Without the data in packet header, the data for needing packet header are cached for output bus data in FIFO.
2. programmable virtual router as described in claim 1, is further characterized in that, the programmable hardware board bag
Include：
Multiple input ports, for input data bag, each input port is to there is respective input rank；
Input arbitration modules, for the streamed data bag in the way of poll or WRR to each data processing unit；
Multiple data processing units, for extracting the corresponding sequential bit of packet, and process the data of fixed bit wide；
Retransmission unit, for being programmed customization forwarding.
3. programmable virtual router as described in claim 1, is further characterized in that, the programmable hardware board is
FPGA boards.
4. programmable virtual router as described in claim 2, is further characterized in that the programmable hardware board is also wrapped
Crosspoint is included, for after packet determines forwarding port by retransmission unit, the packet of pair determination forwarding port to be selected again
Select output port.
5. programmable virtual router as described in claim 4, the input port and output port are in network interface and bus
Selected in interface.
6. programmable virtual router as described in claim 4, is further characterized in that：The plurality of data processing unit knot
Structure is identical, and mutually cascades.
7. a kind of programmable method for routing, it is characterised in that the method comprises the following steps：
1) bit granularity programmable data planar structure, the datum plane structural support are realized using programmable hardware board
The extraction of any bit in packet, supports the combination in any bit length of boundary member across bus length, so as to data
Arbitrarily-shaped domain is carried out extraction combination in bag；
2) virtual control plane, the multiple virtual routers in the virtual control plane and programmable hardware board are realized
Dynamically connect to form mapping relations；
3) by the control plane, datum plane is configured and is programmed；
Wherein, the port of output, bus data now are determined using the programmable hardware board after packet header is disposed
Without the data in packet header, the data for needing packet header are cached for output in FIFO.
8. programmable method for routing as claimed in claim 7, is further characterized in that：It is many that the control plane is additionally operable to generation
Individual virtual machine is running different control plane agreements, the multiple virtual flow-lines in the port and programmable hardware board of virtual machine
Device dynamically connects to form mapping relations.
9. programmable method for routing as claimed in claim 7, the step 1) further include：
10) by input port input data bag, each input port is to there is respective input rank；
11) in the way of poll or WRR streamed data bag to each data processing unit；
12) the corresponding sequential bit of packet is extracted using the data processing unit, and processes the data of fixed bit wide；
13) it is programmed customization forwarding using retransmission unit.
10. programmable method for routing as claimed in claim 9, the step 13) further include：
131) user defines the form and data field processing mode of packet by DLL；
132) using the Extensible pipeline structure of unified definition come each data field of processing data bag, adopt and express condition
Formula is mapped to the programming scheme of TCAM come the PLC technology for realizing forwarding；
133) processing function of the inside of control is selected by the rule of user's setting.
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| US10389635B2 (en) * | 2017-05-31 | 2019-08-20 | Juniper Networks, Inc. | Advertising selected fabric paths for service routes in virtual nodes |
| CN107528786B (en) * | 2017-07-19 | 2019-05-14 | 杜景钦 | Intelligent router based on parallel processing and the Internet of Things application system constructed with this |
| CN108768892A (en) * | 2018-03-26 | 2018-11-06 | 西安电子科技大学 | A kind of programmable data plane based on P4 exchanges the design and realization of prototype |
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