CN103675421A - Power burr signal detection circuit and detection method thereof - Google Patents
Power burr signal detection circuit and detection method thereof Download PDFInfo
- Publication number
- CN103675421A CN103675421A CN201310215124.7A CN201310215124A CN103675421A CN 103675421 A CN103675421 A CN 103675421A CN 201310215124 A CN201310215124 A CN 201310215124A CN 103675421 A CN103675421 A CN 103675421A
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- Prior art keywords
- resistance
- electric capacity
- comparer
- voltage
- burr
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/165—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
- G01R19/16533—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values characterised by the application
- G01R19/16538—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values characterised by the application in AC or DC supplies
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/25—Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
- G01R19/2513—Arrangements for monitoring electric power systems, e.g. power lines or loads; Logging
Abstract
The invention discloses a power burr signal detection circuit and a detection method thereof. The detection circuit comprises a power supply anode, a power supply cathode, a comparator, a first capacitor, a second capacitor, a first resistor, a second resistor and a third resistor. The first input port of the comparator is connected with the power supply anode through the first capacitor. The second input port of the comparator is connected with the power supply cathode through the second capacitor. The first resistor, the second resistor and the third resistor are in series connection. The current is inputted from the first resistor, and the third resistor is grounded. The first capacitor is connected with the first input port of the capacitor through a connection point of the first resistor and the second resistor. The second capacitor is connected with the second input port of the capacitor through a connection point of the second resistor and the third resistor.
Description
Technical field
The present invention relates to embedded system technology field, relate in particular to a kind of power supply burr signal testing circuit and detection method.
Background technology
It is by quick change, to be input to supply voltage or the ground voltage of chip that power supply burr (power glitch) is attacked, some circuit unit in chip is affected, cause that one or more circuit unit enters error condition, thereby cause chip processor to be skipped or according to the operation of wrong state implementation mistake, and then make security information hiding in the chip a kind of attack means coming out gradually.Present stage, along with the widespread use of smart card, the release in information security field becomes hackers' emphasis object of attack.
In existing technology, power supply burr testing circuit generally comprises burr collection, computing, comparison and latchs 4 links.Compare and latch two links and mainly by comparer and latch, realize, and the collection of burr and computing mainly realize by resistance string.By resistance string, will after supply voltage dividing potential drop, compare to realize with fixing reference voltage the object that detects burr signal on power supply, when burr appears in supply voltage and make reference voltage that its instantaneous value sets higher or lower than us, comparer produces and interrupts alerting signal.In actual application and chip design, the voltage domain of power supply burr testing circuit and the voltage domain of being attacked are diverse.Gathering by attack voltage by resistance string when, consider that can circuit be processed the signal to attack after gathering below, now inevitably with regard to needs, consider the problems such as actual signal input range of circuit below.
By the consideration to the research of above prior art and side circuit applied environment, be very easy to find prior art and have following shortcoming:
(1) when resistance string gathers supply voltage, there is DC power.
(2) resistance string can only gather the low frequency signal on power supply, for the high-frequency signal on power supply, cannot realize in proportion and gathering.
(3) when detected power supply DC voltage scope exists very greatly and not burr, attack, for example, in powered battery situation, when supply voltage slowly changes to 2.7v from 5.5v, can increase the design difficulty of comparing element below.
Summary of the invention
In order to solve originally the experience technical matters of impact of detected power supply DC voltage change of the large and testing circuit of power supply burr testing circuit power consumption in prior art, the present invention proposes a kind of power supply burr signal testing circuit and detection method.
One aspect of the present invention, provides a kind of power supply burr signal testing circuit to comprise: positive source, power cathode, comparer, the first electric capacity, the second electric capacity, the first resistance, the second resistance and the 3rd resistance,
The first input end mouth of comparer is connected with positive source by the first electric capacity, and the second input port of comparer is connected with power cathode by the second electric capacity; The first resistance, the second resistance and the series connection of the 3rd resistance; Electric current is inputted from the first resistance, the 3rd resistance eutral grounding; The first electric capacity is connected with the tie point of the second resistance and the first input end mouth of comparer by the first resistance; The second electric capacity is connected with the tie point of the 3rd resistance and the second input port of comparer by the second resistance.
This testing circuit also comprises the 3rd electric capacity, and the first electric capacity and the second electric capacity are by the 3rd capacitances in series.
The burr signal voltage at first input end mouth place is:
wherein,
burr signal voltage for first input end mouth place;
power supply burr signal voltage; C
1be the capacitance of the first electric capacity, C
3it is the capacitance of the 3rd electric capacity.
This testing circuit also comprises reshaper and latch, and comparer is connected with latch by reshaper.
Another aspect of the present invention, provides a kind of power supply burr signal detection method to comprise:
The first electric capacity and the second electric capacity gather respectively the burr signal of positive source and power cathode; Electric current is successively by the first resistance, the second resistance and the 3rd resistance, at the tie point place of tie point place, the second resistance and the 3rd resistance of the first resistance and the second resistance, is produced as the DC offset voltage that comparer provides; Comparer obtains burr signal voltage by comparing the voltage difference of first input end mouth and the second input port.
The method also comprises: comparer also further compares burr signal voltage and alarm threshold value, and comparative result is sent to reshaper; Reshaper is converted to digital signal by comparative result; Latch latchs digital signal, and when comparative result is burr signal voltage while being greater than alarm threshold value, latch generates and interrupts alarm signal.
Power supply burr signal testing circuit of the present invention and detection method, gather the burr signal on power supply by electric capacity, can isolated DC voltage, therefore there is not DC power; And by isolated DC voltage, the DC voltage value that makes to be attacked power supply changes and can not exert an influence to the circuit of this motion, this testing circuit is used flexibly, portable strong.
Accompanying drawing explanation
Fig. 1 is the structural representation of power supply burr signal testing circuit embodiment of the present invention;
Fig. 2 is the schematic diagram that power supply burr signal of the present invention is negative sense burr signal;
Fig. 3 is the schematic diagram that power supply burr signal of the present invention is forward burr signal;
Fig. 4 is the structural representation of another embodiment of power supply burr signal testing circuit of the present invention;
Fig. 5 is the power supply burr signal testing circuit of the present invention structural representation of an embodiment again;
Fig. 6 is the structural representation of the another embodiment of power supply burr signal testing circuit of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the present invention is described in detail.
embodiment mono-
As shown in Figure 1, power supply burr signal testing circuit embodiment of the present invention comprises: positive source VCC, power cathode VSS, comparator C OMP, the first capacitor C 1 and the second capacitor C 2, the first resistance R 1, the second resistance R 2, the 3rd resistance R 3.
The first input end mouth A of COMP is connected with VCC by C1, and the second input port B of COMP is connected with VSS by C2.
R1, R2 and R3 series connection.Current Ib ias inputs from R1, R3 ground connection.C1 is connected with port A with the tie point of R2 by R1; C2 is connected with port B with the tie point of R3 by R2.
Current flowing resistance string produces respectively voltage V at port A, B
aand V
b.Voltage V
aand V
bfor comparer below provides direct current biasing, due to the existence of resistance R 2, make A, 2 of B have certain voltage difference V
tH, and this voltage difference V
tHit is just in time the voltage amplitude that needs the power supply burr signal of detection.
While there is burr signal to attack above supply voltage VCC, when capacitor C 1 and C2 collect port A, B by this burr signal, by the direct current signal of supply voltage and port A, B isolation.So the conversion of VCC DC voltage can not produce any impact to circuit below.
Testing circuit in the present embodiment also comprises reshaper and latch.Comparer is connected with latch by reshaper.
Comparer also further compares burr signal voltage and alarm threshold value, and comparative result is sent to reshaper.Reshaper is converted to digital signal by comparative result.Latch latchs digital signal, and when comparative result is burr signal voltage while being greater than alarm threshold value, latch generates and interrupts alarm signal.Afterwards, can adopt processor, according to interrupting alerting signal, each circuit unit is made to real-time conservation treatment, the information of preventing is stolen.
Particularly, for Fig. 1, be illustrated.If using the voltage of VCC output as input signal, port A is as output terminal, if R
2+ R
3> > R
1, R
1, R
2, R
3be respectively the resistance value of resistance R 1, R2, R3, capacitor C 1 and resistance R 1 form the high-pass filtering circuit of signal so, and its time constant is T
1=R
1* C
1, C
1capacitance for capacitor C 1.In like manner, if R
1+ R
2> > R
3, R3 and C2 form high-pass filtering circuit so, and its time constant is T
2=R
3* C
2, C
2capacitance for capacitor C 2.AC signal frequency on positive source VCC and power cathode VSS is higher than the bandwidth of Hi-pass filter
With
Time, the alternating voltage component on positive source and negative pole is delivered to respectively A, B 2 points.If the maximum frequency that comparer can comparator input signal is f
top, when burr circuit appears on VCC, the frequency range of the VCC burr signal that this testing circuit can detect is so f
1≤ f
vCC≤ f
top; In like manner, when testing circuit appears on VSS, the VSS burr signal frequency range that this testing circuit can detect is f
2≤ f
vSS≤ f
top.
In the present embodiment, R
1=R
3=1M Ω, R
2=10M Ω, C
1=C
2=1pf, now,
the highest frequency of the ac input signal that comparer can detect is 1GHz, and the frequency range of the burr signal that this circuit can detect is
The DC voltage of power supply VCC is 5.5V, and the voltage of VDD is 1.8V.If Ibias=0.1 μ is A, R
2=10M Ω, the amplitude threshold of the burr signal voltage that this testing circuit can detect is V
m=Ibias*R
2=1V.
In actual application environment, as shown in Figure 2, power supply burr signal is likely negative sense burr signal, adopts testing circuit as shown in Figure 1 just can detect.As shown in Figure 3, power supply burr signal is likely also forward burr signal to attack, adopts testing circuit as shown in Figure 4 just can detect.The testing circuit principle of work of Fig. 1 and Fig. 4 is identical, and the burr signal polarity just detecting is contrary.Testing circuit as shown in Figure 4, positive source is connected with the port B of comparer by capacitor C 2, and power cathode is connected with the port A of comparer by capacitor C 1.
Testing circuit in the present embodiment, gathers the burr signal on power supply by electric capacity, can isolated DC voltage, therefore there is not DC power; And by isolated DC voltage, the DC voltage value that makes to be attacked power supply changes and can not exert an influence to the circuit of this motion, this testing circuit is used flexibly, portable strong.
In addition, by trimming circuit structure, can realize the object that detects positive and negative voltage glitch signal.
embodiment bis-
In actual circuit implementation procedure, the voltage of burr signal and the operating voltage of testing circuit are the problems that must consider.When the operating voltage VDD of testing circuit is during much smaller than the voltage amplitude of burr signal, testing circuit cannot normally detect this burr signal.
In order to overcome the above problems, as shown in Figure 5 and Figure 6, the present embodiment power supply burr signal testing circuit, on the basis of above-described embodiment one, has increased by the 3rd capacitor C 3.C1, C2 connect by C3.The burr signal voltage by 3 pairs of power supply places of capacitor C carries out dividing potential drop, to reduce the burr signal voltage at input port A place.
In Fig. 5, the burr signal voltage of the A port of COMP is:
wherein,
burr signal voltage for input port A place;
burr signal voltage for VCC place; C1 is the capacitance of capacitor C 1, C
3capacitance for capacitor C 3.
In Fig. 6, the burr signal voltage of the A port of COMP is:
Fig. 6 is identical with the testing circuit principle of work in Fig. 5, and the burr voltage signal polarity just detecting is contrary.
Particularly, for Fig. 5, be illustrated.
If using VCC as input signal, port A is as output terminal, if R
2+ R
3> > R
1, R
1, R
2, R
3be respectively the resistance value of resistance R 1, R2, R3, capacitor C 1, C3 and resistance R 1 form the high-pass filtering circuit of signal so, and its time constant is T
1=R
1* (C
1+ C
3), C
1, C
3capacitance for capacitor C 1, C3.In like manner, if R
1+ R
2> > R
3, R3 and C2 form high-pass filtering circuit so, and 5 its time constants are T
2=R
3* C
2, C
2capacitance for capacitor C 2.AC signal frequency on positive source VCC and power cathode VSS is higher than the bandwidth of Hi-pass filter
With
Time, the alternating voltage component on positive source and negative pole is delivered to respectively A, B 2 points.If the maximum frequency that comparer can comparator input signal is f
top, when burr circuit appears on VCC, the frequency range of the VCC burr signal that this testing circuit can detect is so f
1≤ f
vCC≤ f
top; In like manner, when testing circuit appears on VSS, the VSS burr signal frequency range that this testing circuit can detect is f
2≤ f
vSS≤ f
top.
In the present embodiment, R
1=R
3=1M Ω, R
2=10M Ω, C
1=C
2=1pf, now,
the highest frequency of the ac input signal that comparer can detect is 1GHz, and the frequency range of the VCC burr signal that this circuit can detect is
the frequency range of the VSS burr signal that can detect is
The DC voltage of power supply VCC is 5.5V, and the voltage of VDD is 1.8V.If Ibias=0.1 μ is A, R
2=10M Ω, because capacitor C 1 and C3 exist dividing potential drop to AC signal, the amplitude threshold of the burr signal voltage that this testing circuit can detect is V
m=2*Ibias*R
2=2V.This shows that the suitable capacitance voltage ratio of choosing can make detected burr voltage threshold (2V) be greater than the operating voltage (1.8V) of circuit.
In the present embodiment, by adjusting the size of the capacitance of capacitor C 1 and C3, can adjust easily the voltage amplitude scope of the burr signal that input port A goes out, make testing circuit the burr signal that voltage amplitude is larger can normally be detected.
Based on above-mentioned testing circuit, the present invention also provides a kind of power supply burr signal detection method, comprising: the first electric capacity and the second electric capacity gather respectively the burr signal of positive source and power cathode; Electric current is successively by the first resistance, the second resistance and the 3rd resistance, at the tie point place of tie point place, the second resistance and the 3rd resistance of the first resistance and the second resistance, is produced as the DC offset voltage that comparer provides; Comparer obtains burr signal voltage by comparing the voltage difference of first input end mouth and the second input port.
Preferably, the method also comprises: the first reference voltage and the second reference voltage provide DC offset voltage by the first resistance and the second resistance for comparer respectively.
More preferably, the method also comprises: comparer also further compares burr signal voltage and alarm threshold value, and comparative result is sent to reshaper; Reshaper is converted to digital signal by comparative result; Latch latchs digital signal, and when comparative result is burr signal voltage while being greater than alarm threshold value, latch generates and interrupts alarm signal.
It should be noted that: above embodiment is only unrestricted in order to the present invention to be described, the present invention is also not limited in above-mentioned giving an example, and all do not depart from technical scheme and the improvement thereof of the spirit and scope of the present invention, and it all should be encompassed in claim scope of the present invention.
Claims (6)
1. a power supply burr signal testing circuit, is characterized in that, comprising: positive source, power cathode, comparer, the first electric capacity, the second electric capacity, the first resistance, the second resistance and the 3rd resistance,
The first input end mouth of described comparer is connected with positive source by the first electric capacity, and the second input port of described comparer is connected with power cathode by the second electric capacity;
The first resistance, the second resistance and the series connection of the 3rd resistance; Electric current is from described the first resistance input, described the 3rd resistance eutral grounding;
Described the first electric capacity is connected with the tie point of the second resistance and the first input end mouth of described comparer by described the first resistance; Described the second electric capacity is connected with the tie point of the 3rd resistance and the second input port of described comparer by described the second resistance.
2. testing circuit according to claim 1, is characterized in that, also comprises the 3rd electric capacity,
Described the first electric capacity and described the second electric capacity are by described the 3rd capacitances in series.
3. testing circuit according to claim 2, is characterized in that, the burr signal voltage at described first input end mouth place is:
4. according to the testing circuit described in claim 1-3, it is characterized in that, also comprise reshaper and latch,
Described comparer is connected with described latch by described reshaper.
5. a power supply burr signal detection method, is characterized in that, the first input end mouth of comparer is connected with positive source by the first electric capacity, and the second input port of described comparer is connected with power cathode by the second electric capacity; The first resistance, the second resistance and the series connection of the 3rd resistance; Electric current is from described the first resistance input, described the 3rd resistance eutral grounding; Described the first electric capacity is connected with the tie point of the second resistance and the first input end mouth of described comparer by described the first resistance; Described the second electric capacity is connected with the tie point of the 3rd resistance and the second input port of described comparer by described the second resistance; The method comprises:
The first electric capacity and the second electric capacity gather respectively the burr signal of positive source and power cathode;
Electric current is successively by the first resistance, the second resistance and the 3rd resistance, at the tie point place of tie point place, the second resistance and the 3rd resistance of the first resistance and the second resistance, is produced as the DC offset voltage that comparer provides;
Described comparer obtains burr signal voltage by comparing the voltage difference of first input end mouth and the second input port.
6. detection method according to claim 5, is characterized in that, described comparer is connected with described latch by described reshaper, and the method also comprises:
Described comparer is further more described burr signal voltage and alarm threshold value also, and comparative result is sent to described reshaper;
Described reshaper is converted to digital signal by described comparative result;
Described latch latchs described digital signal, and when described comparative result is described burr signal voltage while being greater than described alarm threshold value, described latch generates and interrupts alarm signal.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310215124.7A CN103675421A (en) | 2013-05-31 | 2013-05-31 | Power burr signal detection circuit and detection method thereof |
| PCT/CN2013/086267 WO2014190666A1 (en) | 2013-05-31 | 2013-10-30 | Detection circuit and detection method for power glitch signal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310215124.7A CN103675421A (en) | 2013-05-31 | 2013-05-31 | Power burr signal detection circuit and detection method thereof |
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| CN103675421A true CN103675421A (en) | 2014-03-26 |
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ID=50313587
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| CN201310215124.7A Pending CN103675421A (en) | 2013-05-31 | 2013-05-31 | Power burr signal detection circuit and detection method thereof |
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| WO (1) | WO2014190666A1 (en) |
Cited By (7)
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| CN104714193A (en) * | 2014-08-27 | 2015-06-17 | 北京中电华大电子设计有限责任公司 | High-precision low-power-consumption power glitch detection circuit |
| CN109541288A (en) * | 2017-09-21 | 2019-03-29 | 意法半导体(鲁塞)公司 | The burr of D/C voltage detects |
| CN111670366A (en) * | 2020-03-09 | 2020-09-15 | 深圳市汇顶科技股份有限公司 | Voltage attack detection circuit and chip |
| WO2020257959A1 (en) * | 2019-06-24 | 2020-12-30 | 深圳市汇顶科技股份有限公司 | Glitch signal detection circuit, security chip, and electronic apparatus |
| WO2021088516A1 (en) * | 2019-11-05 | 2021-05-14 | 大唐恩智浦半导体有限公司 | Detection circuit and integrated circuit |
| US11187731B2 (en) | 2019-08-15 | 2021-11-30 | Shenzhen GOODIX Technology Co., Ltd. | Power glitch signal detection circuit, security chip and electronic apparatus |
| US11763037B2 (en) | 2019-06-24 | 2023-09-19 | Shenzhen GOODIX Technology Co., Ltd. | Power glitch signal detection circuit, security chip and electronic apparatus |
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| US11355457B2 (en) | 2019-06-19 | 2022-06-07 | Nxp B.V. | Fully digital glitch detection mechanism with process and temperature compensation |
| US11474130B2 (en) | 2020-06-22 | 2022-10-18 | Nxp B.V. | Voltage glitch detection in integrated circuit |
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| CN104714193A (en) * | 2014-08-27 | 2015-06-17 | 北京中电华大电子设计有限责任公司 | High-precision low-power-consumption power glitch detection circuit |
| CN109541288A (en) * | 2017-09-21 | 2019-03-29 | 意法半导体(鲁塞)公司 | The burr of D/C voltage detects |
| WO2020257959A1 (en) * | 2019-06-24 | 2020-12-30 | 深圳市汇顶科技股份有限公司 | Glitch signal detection circuit, security chip, and electronic apparatus |
| US11609277B2 (en) | 2019-06-24 | 2023-03-21 | Shenzhen GOODIX Technology Co., Ltd. | Power glitch signal detection circuit and security chip |
| US11763037B2 (en) | 2019-06-24 | 2023-09-19 | Shenzhen GOODIX Technology Co., Ltd. | Power glitch signal detection circuit, security chip and electronic apparatus |
| US11187731B2 (en) | 2019-08-15 | 2021-11-30 | Shenzhen GOODIX Technology Co., Ltd. | Power glitch signal detection circuit, security chip and electronic apparatus |
| WO2021088516A1 (en) * | 2019-11-05 | 2021-05-14 | 大唐恩智浦半导体有限公司 | Detection circuit and integrated circuit |
| US11668765B2 (en) | 2019-11-05 | 2023-06-06 | Datang Nxp Semiconductors Co., Ltd. | Detection circuit and integrated circuit |
| CN111670366A (en) * | 2020-03-09 | 2020-09-15 | 深圳市汇顶科技股份有限公司 | Voltage attack detection circuit and chip |
| WO2021179128A1 (en) * | 2020-03-09 | 2021-09-16 | 深圳市汇顶科技股份有限公司 | Voltage attack detection circuit and chip |
| CN111670366B (en) * | 2020-03-09 | 2022-11-18 | 深圳市汇顶科技股份有限公司 | Voltage attack detection circuit and chip |
| US11934566B2 (en) | 2020-03-09 | 2024-03-19 | Shenzhen GOODIX Technology Co., Ltd. | Voltage attack detection circuit and chip |
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| Publication number | Publication date |
|---|---|
| WO2014190666A1 (en) | 2014-12-04 |
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Application publication date: 20140326 |
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