CN103427978A - Wireless Chinese character transmitting device based on chaotic encryption system - Google Patents

Wireless Chinese character transmitting device based on chaotic encryption system Download PDF

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Publication number
CN103427978A
CN103427978A CN2012101536356A CN201210153635A CN103427978A CN 103427978 A CN103427978 A CN 103427978A CN 2012101536356 A CN2012101536356 A CN 2012101536356A CN 201210153635 A CN201210153635 A CN 201210153635A CN 103427978 A CN103427978 A CN 103427978A
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module
wireless
chaotic
transmission
chinese character
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CN2012101536356A
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李晓媛
王永强
王远飞
赵思成
郭娜
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Harbin Vocational and Technical College
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Harbin Vocational and Technical College
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Abstract

Provided is a wireless Chinese character transmitting device based on a chaotic encryption system. Following the development of informatization, the safety problem of a digitalized communication system becomes a hot spot of research in domestic and overseas. Safety and instantaneity of information transmission play a crucial role in both a civil use field and a military use field. The wireless Chinese character transmitting device based on the chaotic encryption system aims to ensure the effect that only assigned users can receive and understand transmitted data, and is formed by combining chaotic dynamic characteristics, designing a digitalized chaotic encryption kernel and configuring wireless communication equipment. An evolutionary computation method is used for solving a multiobjective optimization problem, and good pseudorandom sequences are made to be generated. Enciphered data are used for transmitting information, and thus the fact that aerial cryptograph data cannot be decoded even being eavesdropped midway is ensured, so that the data are prevented from being eavesdropped, tampered or forged midway by attackers. A legal receiving terminal can restore plaintext data by using a corresponding decipherment algorithm, and therefore the safe and reliable transmission of information is achieved.

Description

Wireless Chinese character transmitting device based on Chaotic Encryption System
Technical field
The communication engineering field, wireless Chinese character transmitting device.
Background technology
Day by day universal along with computer and network technologies, information security become academia and business circles common study hotspot and the key issue of paying close attention to.Emerging in an endless stream of the complexity of safety function and attack means, how safe in the urgent need to researching and developing out, efficient, reliable information security technology.
In recent years, digital chaos is encrypted and have been caused that the researcher pays close attention to widely, and many scholars think that chaology and contemporary cryptology exist closely contact, the characteristic to initial condition and structural parameters extreme sensitivity had as chaos system.Along with to the deepening continuously of chaology research, digital chaotic system will be widely used in contemporary cryptology.From the new patent searching result in domestic and international chaos encryption field, domestic research aspect chaos cipher at present is also fewer, abroad more existing researchs of using chaos to be encrypted, to decipher information.But to the research based on FPGA technology chaos cipher system, the world still is in the starting stage, and the work that need to do is also a lot.
Summary of the invention
The purpose of this project is to provide a kind of the chaotic key sequence is applied in and can realizes that security performance is high, the real-time transmission, and calculation process speed is fast, and integrated level is high, portable wireless Chinese character transmitting device.The purpose of this project is achieved in that
1. chaos-based secure communication system
Chaotic communication master-plan functional block diagram as shown in Figure 1, the chaos-based secure communication system block diagram as shown in Figure 2, adopts chaos encryption core to be encrypted, and has realized the real-time transmission of information, the transmission of information relies on hardware fully and realizes, has strengthened the reliability and security of encrypting.For realizing the long range wireless transmission of information, this project has been chosen the technical grade bluetooth module.The chaos-based secure communication system comprises clock module, Baud rate generator, reseting module, PS2 controller module, LCD LCD MODULE, main control CPU module, chaotic key generation module, encrypting module, buffer module and asynchronous serial sending module.
2. chaos decode communication system
As shown in Figure 3, the chaos decode communication system comprises clock module, Baud rate generator, reseting module, PS2/LCD LCD MODULE, main control CPU module, chaos module and asynchronous serial receiver module to chaos decode communication system block diagram.
3. the hardware circuit design theory diagram of the wireless Chinese character transmitting device of chaos encryption
According to the requirement of communication system, hardware circuit is by the electric circuit constitutes such as master control fpga chip, power supply circuits, download circuit, keyboard input circuit, display circuit and wireless transmitting systems.The hardware circuit principle block diagram as shown in Figure 4.FPGA adopts the chip of the CycloneII of altera corp series, and this serial product has the advantage identical with its previous generation product.The CycloneII device adopts 90nm, and low K value dielectric technique, minimize by making silicon area, can on single-chip, support complicated digital system.Use the EP2C8Q208C8 chip, this fpga chip has 208 pins, and the IO pin has 138, so resource is abundanter, can define flexibly the IO mouth, and its configuring chip is selected EPCS4.
4. chaotic key generation modular design
Chaos cipher produces flow process: the input of (1) chaotic key initial value.8 keyboard inputs, button can be inputted 4 bits each time.32 chaotic key initial values are inputted in 8 inputs altogether, and the key initial value of inputting is stored in buffer memory.(2) after 32 initial value inputs of key, CPU produces an enable signal to the chaos module 32 initial values is delivered to the chaos module.(3) chaotic key produced gone here and there and changed, being produced parallel chaotic signal, for data encryption.The theory diagram that chaotic signal produces as shown in Figure 5.
5. chaos module
Logistic shines upon its mathematic(al) representation x N+1= μ x n[1- x n], μ(0,4), x n(0,1).When μDuring value [3.5699456,4], the Logistic mapping enters chaos state and shows complicated dynamics.Designed Logistic chaotic maps digital circuit models as shown in Figure 6 according to this equation, wherein Input is the seasonal effect in time series initial value, Shift and Sampler are for obtaining two-value output sequence quantifying unit, other modules are Logistic chaotic maps arithmetic elements, and key stream generator is output as Output.
As key stream generator, at first to consider choosing of initial key.Test by experiment and analyze, can find out that the statistical property of output sequence is affected by operational precision, equation parameter and initial value.The research of chaotic dynamics shows, when μDuring value [3.5699456,4], Logistic shines upon in chaos state, and the sequence of generation is not restrain aperiodic.But can find out in this interval to be also not all in chaos state from the Lyapunov exponents curve, and if only if μ=4The time, this mapping is only the surjection on a unit interval [0, l], and the chaos sequence of generation just has ergodic, therefore μCan not be as the initial key input of chaos encryption.When little deviation appears in initial value, track is pressed index speed and is separated, thereby cause the long-term forecast to system action, is impossible, also the sensitiveness to initial value just because of chaos system, chaos system is composed with different initial values, just can be obtained one group of different and incoherent chaos sequence.Therefore, we select the key input of the initial value of chaos system as chaos.
On the Altera development board that whole design and development process is all EP2C8Q208C8N in the chip model, complete.Take Quartus II 8.1 as operating platform we based on the Logistic equation, a kind of new digital chaos key stream generator of realization.Wherein the Logistic algorithm realizes that unit is key component, and its function is: obtain initial value, and Float Point Unit, the operative norm double-precision floating point adds, multiplication, carries out interative computation, fixed point, floating-point conversion, sequence is converted into binary sequence through quantization modules.
The accompanying drawing explanation
Fig. 1 is the master-plan functional block diagram;
Fig. 2 is chaos encryption transmitting terminal theory diagram;
Fig. 3 is chaos decode receiving terminal theory diagram;
The hardware circuit design theory diagram that Fig. 4 is the wireless Chinese character transmitting device of chaos encryption;
Fig. 5 is that chaotic signal produces theory diagram;
The Quartus II hardware circuit connection layout that Fig. 6 is the Logistic chaotic maps;
Fig. 7 is PS2 keypad protocol frame format
Fig. 8 is PS2 keyboard input module workflow diagram
Fig. 9 is that 12864 liquid crystal display mode block registers distribute
Figure 10 is 12864 liquid crystal display state transition graphs
Figure 11 is the power supply circuits theory diagram;
Figure 12 is jtag interface and AS interface download circuit theory diagram;
Figure 13 is keyboard input circuit theory diagram;
Figure 14 is the serial communication modular theory diagram;
Figure 15 is the clock source circuit theory diagram;
Figure 16 is the expansion interface theory diagram;
Figure 17 is 12864 liquid crystal display circuit theory diagrams.
Embodiment
Below in conjunction with accompanying drawing, be described further for example.
Embodiment 1:In conjunction with Fig. 1, Fig. 2, Fig. 3, design a kind of wireless Chinese character transmitting device based on Chaotic Encryption System, it is comprised of encrypting and decrypting chip and data ciphering and deciphering transmission peripheral circuit.Described encryption chip is comprised of clock module, Baud rate generator, reseting module, PS2 controller module, LCD LCD MODULE, main control CPU module, chaotic key generation module, encrypting module, buffer module and asynchronous serial sending module; Described deciphering chip is comprised of clock module, Baud rate generator, reseting module, PS2/LCD LCD MODULE, main control CPU module, chaos module and asynchronous serial receiver module; The described wireless Chinese character transmitting device based on Chaotic Encryption System is connected and carries out exchanges data with bluetooth module by the RS232 interface, makes general data be encrypted safe transmission.
The transmission flow of data: at first by the input of PS2 keyboard, be prepared for the key initial value used for data encryption, input afterwards plaintext to be transmitted, now on 12864 LCDs, can demonstrate inputted clear content simultaneously.The PS2 controller is sent clear content into encrypting module, and the key request instruction is sent in master cpu, master cpu can be according to the size of clear data, produce the Logistic chaotic key, and the chaotic key of generation is sent into to encrypting module be used for encrypting with clear content, clear content after encrypting is sent into buffer module, finally by the asynchronous serial transmitter, sends into bluetooth module enciphered data is sent.
The reception flow process of data: at first the enciphered data received by bluetooth module is delivered in the asynchronous serial receiver by the RS232 interface, now the asynchronous serial receiver can notify master cpu to have data to arrive, and enciphered data is sent into to the PS2/LCD LCD MODULE, enciphered data is shown on liquid crystal, due to what now show on liquid crystal, be the data after encrypting, so now can't obtain required information.After the encrypted data transmission sent finishes, the decruption key initial value identical with transmitting terminal by the PS2 keyboard data, decruption key initial value and the encryption ciphertext received can by together with deliver in the chaos module, complete the deciphering of ciphertext, plaintext after deciphering can be sent into again in the PS2/LCD LCD MODULE, now on 12864 liquid crystal, just can see that the transmission identical with transmitting terminal expressly.
Embodiment 2:In conjunction with Fig. 2, Fig. 3, Fig. 4, Fig. 5, design a kind of wireless Chinese character transmitting device based on Chaotic Encryption System, its composition comprises liquid crystal, PS2 keyboard, wireless Chinese character transmitting device and bluetooth, on wireless Chinese character transmitting device, the encryption chip based on the chaotic key sequence is housed, encryption chip is comprised of chaotic key generation module, main control module, data encrypting and deciphering module and asynchronous serial sending/receiving module.
Described data encrypting and deciphering module is improved Logistic stream cipher, in order to increase secret fail safe, initial key is made as to 32,8 keyboard inputs, and button can be inputted 4 bits each time.32 chaotic key initial values are inputted in 8 inputs altogether, and the key initial value of inputting is stored in buffer memory.After 32 initial value inputs of key, CPU produces an enable signal to the chaos module 32 initial values is delivered to the chaos module.The chaotic key produced is gone here and there and changed, produced parallel chaotic signal, for data encryption.
Described control module is for controlling the input of chaotic key initial value and the encryption of clear data.The encryption that the main control CPU module is used for distinguishing the input of chaotic key initial value and clear data is that the marking signal flag by the generation of PS2 keyboard realizes.The PS2 keyboard is often pressed one-touch and is produced a marking signal flag, and the counter cnt in main control CPU adds 1 automatically.When cnt equals 8, during 8 data of key-press input, produce 8 Load_key signals, complete the input of key initial value.Carry out the encryption of clear data when cnt is greater than 9, whenever carrying out a marking signal flag, produces an Enc_cmd signal, a chaotic key of corresponding generation, after chaotic key generates, generate a feedback signal Enc_status, be prepared as next clear data and encrypt.Load_key is the Enable Pin of chaos module key initial value, Enc_cmd is the Enable Pin of chaos module key stream, Enc_status is the feedback signal of chaos module, when the chaos module produces a high level of a backward Enc_status port generation of key, is used for indicating that a upper chaotic signal has generated complete.
Described asynchronous serial sending/receiving module comprises asynchronous serial sending module and two modules of asynchronous serial receiver module.The asynchronous serial sending module is delivered to serial ports for the ciphertext serial by after encrypting and is transmitted.This state machine one has 5 states: the x_Idle(free time), the x_Start(start bit), the x_Wait(wait that is shifted), the x_Shift(displacement), the x_Stop(position of rest).
The x_Idle state: when UART is reset after signal rst resets, state machine will enter this state at once.Under this state, the transmitter of UART is waiting for that a Frame sends order xmit_cmd_p always.The xmit_cmd_p signal is the processing to xmit_cmd, and xmit_cmd_p is a short pulse signal.At this moment because xmit_cmd is an external signal, outside FPGA, can not the pulse duration of xmit_cmd be limited, if xmit_cmd is effectively still effective after UART distributes a Frame, will be considered to mistakenly so, new data send order and have arrived again, and the UART transmitter will start the transmission of UART frame again, and obviously the transmission of this frame is wrong.At this, xmit_cmd has been carried out the restriction of pulse duration, xmit_cmd_p is exactly a signal after processing.As xmit_cmd_p=' 1 ', state machine proceeds to x_Start, is ready for sending start bit.
The x_Start state: under this state, the logic zero signal of the bit time width of transmitter of UART is to TXD, i.e. start bit.And then state machine proceeds to the x_Wait state.Xcnt16 is the counter of bclk.
The x_Wait state: when state machine in this state, wait for full 15 bclk of meter, enter at the 16th bclk the sample detecting that the t_sample state carries out data bit, also judge whether that the data bit length gathered has reached the length (framelen) of Frame simultaneously, if arrive, just illustrate that position of rest comes finally.Framelen is modifiable when design, is defaulted as 8 in the design, and corresponding UART is operated in 8 bit data positions, no parity check bit format.
X_Shift state: when state machine, during in this state, realize the parallel-serial conversion of outgoing data.Convert and get back to immediately the x_Wait state.
X_Stop: position of rest sends state, and when Frame is sent, state machine proceeds to this state, and sends the logical one signal in 16 bclk cycles, i.e. 1 position of rest.State machine is got back to the X_Idle state after having sent position of rest, and waits for the transmission order of another Frame.
The asynchronous serial receiver module is for receiving the ciphertext of transmission.Because serial data frame and receive clock are asynchronous, by logical one, transfer the start bit that logical zero can be regarded as a Frame to.Yet, for fear of burr impact, can access correct start bit signal, it is all to belong to logical zero just can assert that what receive is start bit that the start bit that necessarily requires to receive has half at least in the process of baud rate clock sampling.Because the inner sampling clock bclk cycle (Baud rate generator generation) is to send or receive 16 times of baud rate clock frequency, so start bit needs the logical zero at least 8 continuous bclk cycles to be received, just think that start bit receives, then data bit and parity check bit will be sampled once every 16 bclk cycles (being that each baud rate clock is sampled once).If 16 bclk cycles really of start bit are long, so ensuing data will be sampled in the midpoint of each.
Embodiment 3: in conjunction with Fig. 7, Fig. 8, Fig. 9, Figure 10, the input based on the chaotic key encryption chip and display part divide and comprise PS2 keyboard input module and 12864 LCD MODULE.
The PS2 keyboard is fulfiled a kind of bi-directional synchronization serial protocol, on each data wire, sends a data, sends out a pulse on clock line simultaneously, and keyboard can send to main frame, and main frame also can send data to equipment.But main frame always has priority on bus, it can at any time suppress to come from the communication of keyboard.
The data that send to FPGA from keyboard are read in PS2 keyboard clock trailing edge, and PS2 agreement one frame forms by 11, as shown in Figure 7.Its frame structure is 1 start bit start (being always low level), and 8 data are DATA0 ~ DATA7,1 check digit PARITY, 1 position of rest STOP (being always high level).
The PS2 keyboard only has a data port, just need a high efficiency resolution method if differentiate many buttons, the processor of keyboard can be scanned or be monitored key-press matrix constantly, if it finds that a button is pressed, discharge or pin keyboard, will send the information of scan code to computer.Scan code has two kinds of different types: " make code " and " short in size ".Just send " make code " when a key is pressed or pins, when a key is released, just send " short in size ".Each button has been assigned with unique " make code " and " short in size ".Like this, which button FPGA can be just by searching that unique scan code measures.Be executed in parallel because VHDL programmes between each treatment progress, therefore at first the data above PS2data should be gone here and there and changed, deliver in FPGA and determine that according to scan code which button is pressed again afterwards.PS2 keyboard input module workflow diagram as shown in Figure 8.
The display module that this design adopts is 12864M Chinese character image dot matrix lcd module, but Display of Chinese characters and figure, built-in 8192 Chinese characters (16 * 16 dot matrix), 128 characters (8 * 16 dot matrix) and 64 * 256 dot matrix display random access memories (GDRAM), what character library was used is ST7920 GB Chinese font code table.Input pin comprises: system clock clk, PS2 keyboard clock PS2clk and PS2 data PS2dat.Output pin is that director data is selected signal RS, and signal RW is selected in parallel read-write, parallel enable signal E, and signal PSW, reset signal RST, LCD data-signal dataout are selected in parallel series.12864 LCD MODULE show for the key initial value by the input of PS2 keyboard and clear content split screen.Owing to showing that a Chinese character needs four 16 system numbers, therefore in 12864 LCD MODULE, designed some registers, for the content of storing input with show fixedly Chinese character, the register distribution in 12864 LCD MODULE is as shown in Figure 9.
Because 12864 LCDs will show the initial key of input and plaintext two parts to be sent, therefore need realize the split screen Presentation Function of 12864 liquid crystal.For realizing the split screen Presentation Function, this modular design two state machine state and state1, come differential display initial key or plaintext to be sent by the low level of PS2dat serial data start bit as decision signal.12864 liquid crystal display state transition graphs as shown in figure 10.Part in state transition graph in dotted line is the state machine conversion that initial key shows, other parts are the state machine conversion that plaintext to be sent shows.The initial key show state owner will comprise: 12864 liquid crystal initialization, write 12864 control commands, write fixedly Chinese character and write second these states of row initial key of the first row.Sending expressly show state owner will comprise: 12864 liquid crystal initialization, write 12864 control commands, write the first row fixedly Chinese character, write the second row and send expressly, write the third line and send expressly and write fourth line and send these states of plaintext.
The beneficial effect of this project is:
1. this project is studied the stream cipher method for designing based on chaotic key, and applies it in actual Chinese character transmission encrypting system, through theory analysis and actual verification, it is long that this cryptographic algorithm has the cycle, confidentiality is high, realizes simply anti-attack strong characteristics.
2. this project is realized chaos encryption algorithm with the FPGA hardware circuit, has improved secret fail safe, has reduced the complexity of design, has improved arithmetic speed.The theoretical transmission with Chinese character information of chaos encryption is combined, and is a new trial and breakthrough.
3. this project is for improving secret fail safe, adopt the design of 32 initial keys in design process, it is also a new trial that the wireless transmission process adopts overlength distance technical grade bluetooth module, and this project has the characteristics of transmission constantly, receiving terminal can be received the ciphertext of transmission constantly, and is decrypted at any time as required.
4. the wireless Chinese character transmitting device of this Project design based on Chaotic Encryption System, by in the integrated encryption chips such as studied chaotic key block, improved Logistic enciphering algorithm module, control module, and embed in wireless Chinese character transmitting device, form a kind of safety information product with intellectual property, have that portability is carried, long-distance transmissions, characteristics that power is little, can be widely used in military field and civil area, improve the fail safe of communication.

Claims (4)

1. the wireless Chinese character transmitting device based on Chaotic Encryption System is mainly by FPGA encrypting and decrypting chip, remote Bluetooth transmission module and demonstration input equipment form, it is characterized in that by transmitting terminal input equipment input initial encryption key, transmission expressly, send to receiving terminal by the Bluetooth transmission module after encrypting via the FPGA encryption chip, input decruption key at receiving terminal by input equipment and complete the deciphering to the transmission ciphertext, obtain initial transmission expressly.
2. the wireless Chinese character transmitting device based on Chaotic Encryption System according to claim 1, whole sending/receiving system comprises transmitting end key initial value/plaintext input unit, transmitting end is display unit expressly, transmitting end chaos encryption core, the bluetooth transmitting element, the bluetooth receiving element, receiving end decruption key input unit, receiving end display unit and receiving end chaos decode core, overall design philosophy is to take fpga chip as core controller, using the input equipment of common ps2 keyboard as information, using 12864 liquid crystal as display device, the bluetooth module of usining is realized information communication encryption end to end as wireless transmitting-receiving equipments.
3. the wireless Chinese character transmitting device based on Chaotic Encryption System according to claim 1, cryptographic algorithm adopts the Logistic cryptographic algorithm after improving, with former cryptographic algorithm, compare, cryptographic algorithm after improvement, increased the length in cycle, improved the confidentiality of chaos encryption, thus the whole security performance that has improved system.
4. the wireless Chinese character transmitting device based on Chaotic Encryption System according to claim 1, adopt technical grade small power long distance Bluetooth transmission module, because the common data of encrypted content of transmission are fewer, therefore the long-distance transmissions bluetooth module adopts the transmission rate of 9600bps, on the basis of original long-distance transmissions, transmission range and stability have been increased, the transmission of carrying out information that can be real-time.
CN2012101536356A 2012-05-17 2012-05-17 Wireless Chinese character transmitting device based on chaotic encryption system Pending CN103427978A (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105303498A (en) * 2015-12-03 2016-02-03 山东蓝玫电子有限公司 Client service terminal based on wireless transmission
CN108365946A (en) * 2018-01-31 2018-08-03 国网河南省电力公司潢川县供电公司 A kind of energy internet communication security system and method based on chaos system array
CN110011783A (en) * 2019-03-21 2019-07-12 南通大学 A kind of encryption and decryption method of Chinese character
CN110299989A (en) * 2019-06-10 2019-10-01 南通大学 A kind of encryption and decryption method of Chinese and English character string
CN114221786A (en) * 2021-11-17 2022-03-22 西安空间无线电技术研究所 Novel communication hardware encryption system and method based on pulse compression

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101527823A (en) * 2009-04-10 2009-09-09 南京大学 Network video monitoring system based on FPGA chaotic encryption
CN101646167A (en) * 2009-09-04 2010-02-10 西安电子科技大学 Wireless network-accessing intelligent terminal and data processing method thereof
WO2011047035A2 (en) * 2009-10-14 2011-04-21 Chaologix, Inc. High utilization universal logic array with variable circuit topology and logistic map circuit to realize a variety of logic gates with constant power signatures
CN202602901U (en) * 2012-05-17 2012-12-12 哈尔滨职业技术学院 Wireless Chinese character transmission device based on chaotic encryption system

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101527823A (en) * 2009-04-10 2009-09-09 南京大学 Network video monitoring system based on FPGA chaotic encryption
CN101646167A (en) * 2009-09-04 2010-02-10 西安电子科技大学 Wireless network-accessing intelligent terminal and data processing method thereof
WO2011047035A2 (en) * 2009-10-14 2011-04-21 Chaologix, Inc. High utilization universal logic array with variable circuit topology and logistic map circuit to realize a variety of logic gates with constant power signatures
CN202602901U (en) * 2012-05-17 2012-12-12 哈尔滨职业技术学院 Wireless Chinese character transmission device based on chaotic encryption system

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
余菲等: "基于Logistic混沌模型的硬件加密芯片算法分析及FPGA实现", 《数字技术与应用》 *
刘念: "混沌变形DES算法的FPGA设计与实现", 《中国优秀硕士学位论文全文数据库信息科技辑(2009年)》 *
徐雅琴等: "基于混沌加密算法的文本无线传输系统设计及实现", 《北方工业大学学报》 *

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105303498A (en) * 2015-12-03 2016-02-03 山东蓝玫电子有限公司 Client service terminal based on wireless transmission
CN108365946A (en) * 2018-01-31 2018-08-03 国网河南省电力公司潢川县供电公司 A kind of energy internet communication security system and method based on chaos system array
CN108365946B (en) * 2018-01-31 2023-04-11 国网河南省电力公司潢川县供电公司 Energy internet communication safety system and method based on chaotic system array
CN110011783A (en) * 2019-03-21 2019-07-12 南通大学 A kind of encryption and decryption method of Chinese character
CN110011783B (en) * 2019-03-21 2022-02-08 南通大学 Encryption and decryption method for Chinese characters
CN110299989A (en) * 2019-06-10 2019-10-01 南通大学 A kind of encryption and decryption method of Chinese and English character string
CN110299989B (en) * 2019-06-10 2022-04-01 南通大学 Encryption and decryption method for Chinese and English character strings
CN114221786A (en) * 2021-11-17 2022-03-22 西安空间无线电技术研究所 Novel communication hardware encryption system and method based on pulse compression
CN114221786B (en) * 2021-11-17 2024-03-26 西安空间无线电技术研究所 Novel communication hardware encryption system and method based on pulse compression

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Application publication date: 20131204