CN103399741B - A kind of assembly level static path method for decomposing and device - Google Patents
A kind of assembly level static path method for decomposing and device Download PDFInfo
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- CN103399741B CN103399741B CN201310313989.7A CN201310313989A CN103399741B CN 103399741 B CN103399741 B CN 103399741B CN 201310313989 A CN201310313989 A CN 201310313989A CN 103399741 B CN103399741 B CN 103399741B
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Abstract
The invention discloses a kind of assembly level static path method for decomposing and device, the method comprises: excavate basic closed loop paths whole in assembler; Excavate basic paths whole in assembler; Combination foundation closed loop path and basic path complete path statistics; Predicate condition judgment is carried out in path after combination. This device comprises: the first computing unit, for excavating the whole basic closed loop path of assembler; The second computing unit, for excavating the whole basic path of assembler; Statistic unit, completes path statistics for combination foundation closed loop path and basic path; Judging unit, for carrying out predicate condition judgment to the path after combination. A kind of assembly level static path method for decomposing provided by the invention is realized simple, does not rely on the excitation of input data, sets about from assembly level, excavates the static path that all may exist based on dynamic combined.
Description
Technical field
The present invention relates to performance evaluation technology, relate in particular to a kind of assembly level static path method for decomposing and device.
Background technology
Path dissects (ProgramsProfiling) and occupies very consequence in performance evaluation field, it for analyzing, all execution number of times in execution routes and each path of statistics application program. These performance datas are widely used in the multinomial research work such as compile optimization.
It is comparatively unified that prior art is carried out the method for path anatomy, substantially be all combined control stream figure (ControlFlowGraph, CFG) analyze in application program and insert stake code, finally draw each paths and carry out number of times by reclaiming, calculate the performance information of stake code statistics. In existing scheme, as processed during without back edge (backedge) path, single argument method for decomposing (EfficientPathProfiling, EPP) in the process that the people such as Ball propose; While processing loop paths, improving one's methods that the people such as approximate method for decomposing and Roy that Tallam proposes proposes on this basis all obtained good effect. But in the time that application structure relative complex, loop body are more, these methods still have deficiency. Return its reason, be not difficult to find that they are all to set about processing from the behavioral scaling of upper language, and be limited to the command function of semantic analysis front end and target processor, cannot further expand range of application.
In addition, existing anatomy technology is mainly to realize based on dynamic analysis, and undue dependence input stimulus while carrying out dynamic analysis, this just causes dissecting the execution path information that the routing information drawing can not reflect program comprehensively.
Summary of the invention
The object of this invention is to provide a kind of assembly level static path method for decomposing, it does not rely on input stimulus, and has effectively completed the anatomy to static path by dynamic combined, predicative analysis etc.
For achieving the above object, on the one hand, the invention provides a kind of assembly level static path method for decomposing, the method comprises the following steps:
Excavate basic closed loop paths whole in assembler, basic closed loop path is a loop that initial and end node is identical, and does not allow to occur other loop;
Excavate basic paths whole in assembler, basic path refers to the simplest path from entrance basic block to outlet basic block, does not allow to occur loop, and do not allow to duplicate node in basic path;
Combination foundation closed loop path and basic path complete path statistics;
Predicate condition judgment is carried out in path after combination.
On the other hand, the invention provides a kind of assembly level static path and dissect device, this device comprises:
The first computing unit, for excavating the whole basic closed loop path of assembler;
The second computing unit, for excavating the whole basic path of assembler;
Statistic unit, completes path statistics for combination foundation closed loop path and basic path;
Judging unit, for carrying out predicate condition judgment to the path after combination.
A kind of assembly level static path method for decomposing provided by the invention and device are realized simple, do not rely on the excitation of input data, set about from assembly level, excavate the static path that all may exist based on dynamic combined.
Brief description of the drawings
A kind of assembly level static path method for decomposing flow chart that Fig. 1 provides for the embodiment of the present invention;
Fig. 2 (a) is a paragraph assembly example code;
Fig. 2 (b) is the corresponding basic controlling flow graph of Fig. 2 (a);
A kind of assembly level control flow graph that Fig. 3 provides for the embodiment of the present invention;
A kind of assembly level static path anatomy apparatus structure block diagram that Fig. 4 provides for the embodiment of the present invention.
Detailed description of the invention
Below by drawings and Examples, technical scheme of the present invention is described in further detail.
Before a kind of assembly level static path method for decomposing providing in the description embodiment of the present invention, need do simply to introduce for assembly level control flow graph:
Wherein node j is the rear Dominator of whole other nodes except node i by way of the control path of node i and j to suppose to exist one, so just claims node i control to rely on (controldependence) in node j. Controlling dependency graph (ControlDependenceGraph, CDG) is a directed acyclic graph (DirectedAcyclicGraph, DAG) towards intermediate language, wherein, limit set description the control dependence between basic block; Root node in node set, intermediate node are the basic blocks being gone out by predicate division of operations, and leaf node is generally the insensitive basic block of predicate. Compiler front-end generates the control flow graph (controlflowgraph, CFG) of application program, and rear end derives control dependence subgraph (controldependencesubgraph, CDSG) according to branch and cycle region. But intermediate language is gone through after the operation of the multipass such as Code schedule, code block merging, command mappings, predicate correlation operation is distributed in the even multiple basic blocks of many instructions, and this has increased assembly level and carry out the difficulty of predicative analysis.
CDG is than CFG, it is a DAG who deletes after redundancy, and being more suitable for compiler is optimized, but because construction method provided by the invention is dispatched and optimizes excavation for the excavation of auxiliary static path and towards assembly level, therefore, the present invention builds assembly level control flow graph ACFG(assemblycontroldependencegraph, ACFG) carry out Control dependence, and selectively inherit part of properties in CDG.
The performance that ACFG is abstract the execution of program flow away to, due to the existence of loop body, it is a directed cyclic graph DCG(DirectedCyclicGraph, DCG), and D (ACFG)=(V (D), E (D), φ (D)). Node set V (D)={ v1,v2,v3…vn, each node represents a unique assembly level basic block; Limit set E (D)={ e1,e2,e3…en, if ei={<vj,vk>|vj,vk∈V(D)}，eiBe one with vjFor first node, vkFor the directed edge of terminal note, and vjWith vkRelation can be summarized as following several; Correlation function φ (D), neither injection neither surjection, this means that it exists the repetition limit that direction is different.
1.vjBe called vkDirect precursor, vkBe called vjImmediate successor;
2. if node vjOut-degree be 1, node v sokThe unique follow-up of it. If node vkIn-degree be 1, node v sojIts unique forerunner;
If 3. there is path vm→vn, and vmWith vnThere is not limit ex={<vm,vn>, v somVnA forerunner (predecessor), vnVmOne follow-up (successor);
4. it is not unique that the existence of circulating path causes forerunner and follow-up relation between node, if i.e. limit ex={<vj,vk> and ey={<vk,vj> there is v so simultaneouslyjWith vkForerunner and follow-up each other.
The present invention is defined as follows data structure and stores ACFG, wherein, structure B lockPos mark assembly level basic block Wei Ge, Fidx is file index, Start, End have recorded Qi Shi Wei Ge and the Jie Shu Wei Ge of assembly level basic block in file, info variable-definition the information such as assembly level basic block include instruction number, path, place id set, place function name, place subfunction title; Structure B lockArcBox is defined ACFG limit aggregate attribute, BlockTailVex and BlockHeadVex represent respectively first node and the terminal note on a limit, BlockHLink and BlockTLink pointer are respectively used to point to next limit with first node and terminal note, the predicate condition of PInfo storage in the time that set up in front, Id is for carrying out mark and add up for path each limit; Structure B lockVexNode is defined the node that forms assembly level basic block.
Fig. 2 (a) is a paragraph assembly example code, known 5 subfunction fragments in function Sample, they formed these 5 assembly level basic blocks .A .B .C .D .E}, wherein .A is entrance basic block. Analyze after this paragraph assembly code knownly, naturally in function Sample exist static code order .A → .B → .C → .D → .E, and assembly level basic block { .B .C, .D} in, { destination address of 2,3,4} is all assembly level basic block .E, therefore for branch instruction separately, the limit collection of the control flow graph that Fig. 2 (a) is corresponding be<.A .B>,<.B .C>,<.C .D><.B .E>,<.C .E>,<.D, .E>, }, Fig. 2 (b) is corresponding basic controlling flow graph.
After basic controlling flow graph has been set up, it is carried out to predicative analysis and obtain the ACFG shown in Fig. 3, and the wherein predicate establishment condition on each limit of mark.
After ACFG has built, the present invention will count the whole static paths from entrance basic block to outlet basic block in ACFG. Ripe nomography such as depth-first algorithm, breadth First algorithm, in the time of the acyclic figure of traversal, all have great advantage on time complexity or space complexity. But ACFG is a DCG, in the time of the complicated nested circulation existing in program, self-loopa, the static path number between assembly level basic block increases by geometric progression, and this just causes traditional ergodic algorithm in the situation that of lower computation complexity, to complete very much static statistics. In order to meet the demand of path statistics in the time that can bear, space cost, a kind of method that the present invention proposes dynamic combined solves the problem of loop processed complexity, and the method as shown in Figure 1.
A kind of assembly level static path method for decomposing flow chart that Fig. 1 provides for the embodiment of the present invention. As shown in Figure 1, the method divides following four steps to realize:
Step 101, excavates whole basic closed loop paths. Closed loop path is a loop that initial and end node is identical, and its limit is defined as Arc_Loop, does not allow to occur other loop in basic closed loop path. In assembler, closed loop path generally has following two kinds of existence forms: when the destination address of the outlet branch instruction of compilation basic block point to when entry instruction from closed loop; Cross over the complicated closed loop of multiple compilation basic blocks. While processing the former, only need branch address in decision block. While processing the latter, the present invention adopts window comparison mechanism to realize, and order travels through ACFG taking each compilation basic block in function as entrance, and specific algorithm is as shown in Algorithm1. Suppose that queue Path is for storing the id that occurs assembly level basic block along road, when variable cursor is used to specify comparison, the size of window does not have, and its span is 2～size-1, the length that size is Path, and for more whether there is closed loop path in row 2～7.
Step 102, excavates whole basic paths. Path, basis refers to the simplest path from entrance basic block to outlet basic block, does not allow to occur loop, and do not allow to duplicate node in basic path. In realization, the embodiment of the present invention is to utilize depth-first algorithm to realize, and in ergodic process, ignores the limit that attribute is Arc_Loop, eliminates back edge. Depth Priority Algorithm (Depth-First-Search) is the one of searching algorithm. The node along the degree of depth traverse tree of tree, the branch of dark as far as possible search tree. When all limits of node v, all oneself was sought, and search will date back to the start node on that limit of finding node v. Till this process is performed until all nodes of finding can reach from source node. If also there is undiscovered node, to select one of them as source node and repeat above process, whole process is repeatedly carried out until all nodes are all accessed. Belong to blind search.
Step 103, combination foundation closed loop path and basic path complete path statistics. Suppose existence foundation set of paths { P1,P2,…,Pn}，Pi(i=1,2 ..., n) middle node set is { N1,…,Ni,…,Nm, wherein node Ni∈ basis closed loop { Loop1{Ni,Nj,…,Ni},Loop2{Ni,Nk,…,Ni},…,Loop{Ni,Nt,…,Ni, the set of paths that may exist is so:
Step 104, carries out predicate condition judgment to the path after combination. Above, obtained the predicate condition that in ACFG, set up on each limit, although reliability prove had been carried out in basic path on logical semantics, dynamic route combination is not considered these factors therefore still to need to carry out predicate condition analysis. The embodiment of the present invention is set up three value Karnaugh maps for each inference register Pr in deterministic process, and carries out numerical value filling along path, once data clash, judges that this path is invalid. In three value Karnaugh maps, 1 represent inference register current be true, 0 is false ,-1 represent uncertain. The strategy that route availability is judged as: the initial value of Karnaugh map is-1; Be connected the branch instruction acquiescence of assembly level basic block effectively, and in corresponding inference register list item, fill out 1 in Karnaugh map, the inference register of all the other branch instructions is defaulted as 0; In ergodic process when Conditions decision instruction, if its corresponding list item is designated as 1, so by it by the inference register Pr of amendmenti,PrjValue is labeled as complementation, and according to { Pri=0,Prj=1}，{Pri=1,Prj=0} both of these case travels through, and if-1 or 0 is continued traversal.
A kind of assembly level static path anatomy apparatus structure block diagram that Fig. 4 provides for the embodiment of the present invention. As shown in Figure 4, this device 400 comprises the first computing unit 410, the second computing unit 420, statistic unit 430 and judging unit 440.
The first computing unit 410 is for excavating the whole basic closed loop path of assembler. In assembler, closed loop path generally has following two kinds of existence forms: when the destination address of the outlet branch instruction of compilation basic block point to when entry instruction from closed loop; Cross over the complicated closed loop of multiple compilation basic blocks. While processing the former, only need branch address in decision block. While processing the latter, the present invention adopts window comparison mechanism to realize, and order travels through ACFG taking each compilation basic block in function as entrance.
The second computing unit 420 is for excavating the whole basic path of assembler. Path, basis refers to the simplest path from entrance basic block to outlet basic block, does not allow to occur loop, and do not allow to duplicate node in basic path. In realization, the embodiment of the present invention is to utilize depth-first algorithm to realize, and in ergodic process, ignores the limit that attribute is Arc_Loop, eliminates back edge.
Statistic unit 430 completes path statistics for combination foundation closed loop path and basic path. Suppose existence foundation set of paths P1, P2 ..., Pn}, Pi (i=1,2 ..., n) in node set be N1 ..., Ni,, Nm}, wherein node Ni ∈ basis closed loop { Loop1{Ni, Nj,, Ni}, Loop2{Ni, Nk,, Ni} ..., Loop{Ni, Nt ..., Ni}}, the set of paths that may exist is so:
Judging unit 440 is for carrying out predicate condition judgment to the path after combination. The embodiment of the present invention is set up three value Karnaugh maps for each inference register Pr in deterministic process, and carries out numerical value filling along path, once data clash, judges that this path is invalid. In three value Karnaugh maps, 1 represent inference register current be true, 0 is false ,-1 represent uncertain. The strategy that route availability is judged as: the initial value of Karnaugh map is-1; Be connected the branch instruction acquiescence of assembly level basic block effectively, and in corresponding inference register list item, fill out 1 in Karnaugh map, the inference register of all the other branch instructions is defaulted as 0; In ergodic process when Conditions decision instruction, if its corresponding list item is designated as 1, so by it by the inference register Pr of amendmenti,PrjValue is labeled as complementation, and according to { Pri=0,Prj=1}，{Pri=1,Prj=0} both of these case travels through, and if-1 or 0 is continued traversal.
Preferably, the embodiment of the present invention also comprises that the 3rd computing unit 450, the three computing units 450 are for adding up the whole static paths of assembly level control flow graph from entrance basic block to outlet basic block.
A kind of assembly level static path provided by the invention dissects device and realizes simply, does not rely on the excitation of input data, sets about from assembly level, has effectively completed the anatomy to static path based on predicative analysis, dynamic combined etc.
Obviously, do not departing under the prerequisite of true spirit of the present invention and scope, the present invention described here can have many variations. Therefore, all changes that it will be apparent to those skilled in the art that, within all should being included in the scope that these claims contain. The present invention's scope required for protection is only limited by described claims.
Claims (7)
1. an assembly level static path method for decomposing, is characterized in that:
Excavate basic closed loop paths whole in assembler;
Excavate basic paths whole in assembler;
Combination foundation closed loop path and basic path complete path statistics;
Predicate condition judgment is carried out in path after combination;
Described basic closed loop path is a loop that initial and end node is identical, in basic closed loop path notAllow to occur other loop;
Described basic path refers to the simplest path from entrance basic block to outlet basic block, in basic pathIn do not allow to occur loop, and do not allow to duplicate node.
2. method according to claim 1, is characterized in that: in the described assembler of excavatingIn also comprise step before whole basic closed loop path step:
Build assembly level control flow graph ACFG.
3. method according to claim 1, is characterized in that: described in excavate in assemblerWhole basic closed loop path steps adopts window comparison mechanism to realize.
4. method according to claim 1, is characterized in that: described in excavate in assemblerWhole basic path step realize by depth-first algorithm.
5. method according to claim 1, is characterized in that: described to combination after path enterRow predicate condition judgment step comprises:
For each inference register is set up three value Karnaugh maps, and carry out numerical value filling along path, work as numberWhen clashing, judge that this path is invalid.
6. assembly level static path dissects a device, it is characterized in that comprising:
The first computing unit, for excavating the whole basic closed loop path of assembler;
The second computing unit, for excavating the whole basic path of assembler;
Statistic unit, completes path statistics for combination foundation closed loop path and basic path;
Judging unit, for carrying out predicate condition judgment to the path after combination;
Described basic closed loop path is a loop that initial and end node is identical, in basic closed loop path notAllow to occur other loop;
Described basic path refers to the simplest path from entrance basic block to outlet basic block, in basic pathIn do not allow to occur loop, and do not allow to duplicate node.
7. device according to claim 6, characterized by further comprising:
The 3rd computing unit, for building assembly level control flow graph ACFG.
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| CN86107764A (en) * | 1985-12-17 | 1987-07-01 | 国际商用机器公司 | Carry out its registers and appointment by two-color fabric stone |
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| CN86107764A (en) * | 1985-12-17 | 1987-07-01 | 国际商用机器公司 | Carry out its registers and appointment by two-color fabric stone |
| US6064820A (en) * | 1998-05-27 | 2000-05-16 | Hewlett-Packard Company | Apparatus and method to incrementally update single static assignment (SSA) form |
| CN1783009A (en) * | 2004-12-03 | 2006-06-07 | 中国科学院计算技术研究所 | Hot route searching method in assembly code hot function |
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