CN103384401B - Based on synchronization acquiring device and the method thereof of first in first out structure - Google Patents
Based on synchronization acquiring device and the method thereof of first in first out structure Download PDFInfo
- Publication number
- CN103384401B CN103384401B CN201310192181.8A CN201310192181A CN103384401B CN 103384401 B CN103384401 B CN 103384401B CN 201310192181 A CN201310192181 A CN 201310192181A CN 103384401 B CN103384401 B CN 103384401B
- Authority
- CN
- China
- Prior art keywords
- fifo
- synchronizing sequence
- correlator
- output
- threshold
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Abstract
Based on synchronization acquiring device and the method thereof of first in first out structure, device comprises synchronizing sequence getter, correlator bank, FFT converter, peak signal selector, decision device.Method comprises: (1) synchronizing sequence getter obtains the synchronizing sequence of a Baud Length; (2) synchronizing sequence and local reference are made segmentation related operation by correlator bank; (3) correlation result of FFT converter to correlator bank does FFT conversion; (4) peak signal selector selects maximum amplitude value from the range value that FFT converter exports; (5) maximum amplitude value and threshold value are carried out size and are compared by threshold compataror, and comparative result is stored in FIFO register; (6) FIFO detector is under the comparative result that threshold compataror exports controls, and detects FIFO register, judges that whether synchronization acquistion is successful.The present invention has the advantage that resource occupation is few, acquisition speed fast, synchronization acquistion leakage obtains and wrong acquisition probability is low, accurate synchronization acquisition probability is high.
Description
Technical field
The invention belongs to communication technical field, further relate to the synchronization acquiring device based on first in first out structure in radio communication and method thereof.The receiving terminal that the present invention can be used for wireless communication system to received signal in synchronizing sequence carry out synchronization acquistion, realize the synchronous of receiving terminal and transmitting terminal, the correct reception of guarantee information.
Background technology
In a wireless communication system, want correctly to demodulate information, the synchronous of receiving terminal and transmitting terminal must be realized.So for wireless communication receiver, one of problem of most critical is that local reference sequences obtains synchronous with the synchronizing sequence in Received signal strength.
At present, more a kind of synchronization acquistion algorithm is used to be based on FFT-PMF segmented matched filter method, the method just can obtain frequency offseting value while searching code phase place, thus the two-dimensional search of phase place, frequency is become linear search, greatly reduces capture time.But because wireless channel environment constantly changes, the thresholding according to FFT-PMF segmented matched filter method compares, whether successfully to adjudicate synchronization acquistion, there is leakage and obtain the problem high with wrong acquisition probability.
Patented technology " a kind of method and synchronization acquistion unit correlated results being carried out to the synchronization acquistion " (applying date: May 23 in 2008 that Innofidei Technology Co., Ltd has, application number: 200810112499.X, Authorization Notice No.: CN101312375B) in disclose a kind of synchronization acquiring method.The implementation step of the method is: the first, searches in correlated results sequence, records any one range value and is more than or equal to amplitude threshold T
amp1sequence index value n corresponding to correlation; The second, index value n is postponed a time gate limit value T
time, obtain a new sequence index value n
2; 3rd, from index n
2start to search for correlated results sequence backward, first of acquisition is greater than amplitude threshold T
amp2the sequence index value corresponding to summit range value be thick sync bit.This synchronization acquistion unit comprises: (1) starting point indexed search module, for receiving correlated results sequence and searching for wherein, records any one range value and is more than or equal to amplitude threshold T
amp1sequence index value n corresponding to correlation; (2) new index generation module, for postponing a time gate limit value T by index value n
time, obtain a new sequence index value n
2; (3) summit range value search module, for from n
2start the range value sequence of searching for correlated results backward, first of acquisition is greater than amplitude threshold T
amp2the sequence index value corresponding to summit range value be thick sync bit.The method can be applicable to time delay expansion larger time synchronization acquistion to correlated results, be also applicable to simultaneously time delay expansion little time situation, more comprehensively; Simultaneously the value of the method to threshold value gives scope, furthermore present concrete numerical value, make the method realize simply convenient.The weak point that this patented technology exists is: in patent, definition is " from index n
2start to search for correlated results sequence backward, first of acquisition is greater than amplitude threshold T
amp2the sequence index value corresponding to summit range value be thick sync bit ", but due to the complexity of wireless channel environment, first of acquisition is greater than amplitude threshold T
amp2the sequence index value corresponding to summit range value might not be thick synchronous point, this patent is not whether thick sync bit is correctly verified to what obtain, adds the probability that synchronization acquistion erroneous arrest obtains, reduces the performance of communication system.
Patented technology " a kind of signal acquisition methods resisting the high-delay extension channel " (applying date: December 25 in 2007 that Innofidei Technology Co., Ltd has, application number: 200710304114.5, Authorization Notice No.: CN100518047C) in disclose a kind of synchronization acquiring method.The implementation step of the method is: the first, according to system parameters, and the thresholding T of setting auto-correlation output amplitude
ampand the width threshold T of auto-correlation output amplitude waveform
wid; The second, auto-correlation computation is carried out to described signal, searches and determine that an auto-correlation output amplitude value is greater than thresholding T
ampvery first time point; 3rd, determine that auto-correlation output amplitude value is less than thresholding T from very first time point after postponing first time period backward
ampthe second time point; 4th, from the second time point, be less than or equal to signal period T
2the second time period in search for backward, until find a crest, if the range value of this crest is greater than thresholding T
ampand the amplitude wave-shape at this crest place is at thresholding T
ampon waveform widths be greater than width threshold T
wid, then determine that time point that this crest is corresponding is the coarse synchronization position of signal; If above-mentioned condition does not meet, then forward first step Reparametrization T to
ampand T
widafter, re-start signal capture process; Or directly return second step, keep parameter T
ampand T
widconstant, then re-start signal capture process.Signal acquisition methods described in this invention, for the signal characteristic of high-delay extension channel, by determining the search cycle comprising a signal, utilize peak value Rule of judgment can find a qualified crest fast and accurately from the signal extended, thus navigate to thick sync bit, thus, to the channel circumstance of Chinese People's Anti-Japanese Military and Political College's time delay expansion, the probability of signal synchronization acquistion can be improved.The weak point that this patented technology exists is: in patent, definition " is being less than or equal to signal period T from the second time point
2the second time period in search for backward, until find a crest, if the range value of this crest is greater than thresholding T
ampand the amplitude wave-shape at this crest place is at thresholding T
ampon waveform widths be greater than width threshold T
widthen determine that time point that this crest is corresponding is the coarse synchronization position of signal "; but due to the complexity of wireless channel environment; the thick sync bit searched may be pseudo-synchronous point; the method is not tested to the thick sync bit searched; the probability that synchronization acquistion erroneous arrest can be caused to obtain raises, and reduces the performance of communication system.
Summary of the invention
The object of the invention is to the deficiency overcoming above-mentioned prior art, a kind of synchronization acquiring device based on first in first out structure and method thereof are provided, to solve the problem that wrong acquisition probability is high and leakage acquisition probability is high of prior art in synchronization acquistion, improve the performance of communication system.
For achieving the above object, synchronization acquiring device of the present invention comprises the synchronizing sequence getter, correlator bank, FFT converter, peak signal selector, the decision device that are connected by signal transmssion line.The described output of synchronizing sequence getter is connected with the input of correlator bank, the correlator that in correlator bank, solid part signal is corresponding with imaginary signals exports and is connected with the input of FFT converter after adder is added, the output of FFT converter is connected with the input of peak signal selector, the output of peak signal selector is connected with the input of decision device, and the output of decision device is connected with the input of synchronizing sequence correlator.Wherein,
Described synchronizing sequence getter, for obtaining the sequence of a sync symbols length as synchronizing sequence from the wireless signal transmission received.
Described correlator bank, comprises multiple correlator and multiple adder, and correlator, for storing local reference sequences, realizes the related operation between local reference sequences and the segment data of corresponding synchronizing sequence getter input; Export correlation result simultaneously and make accumulation process to adder.
Described FFT converter, the data for exporting adder do FFT conversion.
Described peak signal selector, selects peak maximum in the data that export from FFT converter.
Described decision device, comprises threshold compataror, FIFO register, FIFO detector; This threshold compataror is used for carrying out size to the output of peak signal selector with the threshold value that programmer rule of thumb sets and compares; This FIFO register is according to the comparative result record corresponding data of threshold compataror; This FIFO detector, according to the record data of threshold compataror comparative result and FIFO register, judges synchronization acquistion whether success, and result of determination is fed back to synchronizing sequence getter.
FIFO register in apparatus of the present invention comprises multiple FIFO components and parts and one and gate device.Between described multiple FIFO components and parts, series winding connects, and the output of each FIFO components and parts is equal and be connected with the input of gate device; The input of first FIFO components and parts is connected with the output of threshold compataror; Be connected with the input of FIFO detector with the output of gate device.
Described FIFO components and parts, for storing the data of a sync symbols length; The number of FIFO components and parts equals the number that synchronizing sequence getter receives sync symbols in wireless signal transmission synchronous head and subtracts 1.
Described and gate device, for carrying out logical AND to the data of input.
Utilize said apparatus, the concrete steps that the present invention realizes synchronization acquiring method are as follows:
(1) synchronizing sequence is obtained:
1a) synchronizing sequence getter receives the wireless signal transmission at least comprising two identical sync symbols in synchronous head;
1b) address of first data of wireless signal transmission will be received, as the starting point of target sequence;
1c) synchronizing sequence getter is from the starting point of target sequence, chooses the sequence of a sync symbols length as synchronizing sequence.
(2) segmentation:
2a) by the number of the length of synchronizing sequence divided by correlator in correlator bank, gained business and remainder represent the sequence length after segmentation, are all correlators that the multistage sequence pair of business answers in correlator bank except last correlator by length; It is last correlator that the sequence pair of remainder answers correlator bank by length;
2b) according to step 2a) in segmentation method segmentation is carried out to local reference sequences.
(3) related operation is made:
By the synchronizing sequence of same for correspondence correlator and local reference sequences dot product, obtain plural coherent signal.
(4) add operation is done:
The real part of plural coherent signal and imaginary part add up by adder respectively, obtain the cumulative sum signal of plural number.
(5) FFT conversion is done:
FFT converter does FFT conversion to cumulative sum signal, obtains converting with FFT range value one to one of counting.
(6) peak signal is selected:
The maximum of peak signal selector selecting range peak value from range value, obtains a maximum amplitude value.
(7) size of maximum amplitude value and threshold value is compared:
Threshold compataror carries out size to maximum amplitude value and threshold value and compares, if maximum amplitude value is more than or equal to threshold value, threshold compataror exports 1 as comparative result; If maximum amplitude value is less than threshold value, threshold compataror exports 0 as comparative result, and FIFO register stores the comparative result of threshold compataror; According to first in first out, export the data be stored in FIFO register.
(8) judge that whether synchronization acquistion is successful:
When the comparative result that threshold compataror exports is 1, FIFO detector detects the output of FIFO register, judges that whether synchronization acquistion is successful: if the output data of FIFO register are 1, then FIFO detector exports thick sync bit, synchronization acquistion is judged to be successfully, performs step (9); If the output data of FIFO register are 0, then synchronizing sequence getter are received the address of the next data of wireless signal transmission as the starting point of target sequence, proceeds to step 1c) re-start synchronization acquistion.
(9) communication system terminates synchronization acquistion state, enters synchronized tracking state.
The present invention compared with prior art, has the following advantages:
First, because the present invention adopts the FIFO register of first in first out structure, the comparative result that record threshold compataror exports, overcome prior art owing to capturing pseudo-synchronous point, and by problem that real synchronous point is missed, reduce the probability that synchronization acquistion leakage obtains, improve the performance of communication system.
The second, because the present invention adopts FIFO detector, when the comparative result that threshold compataror exports satisfies condition, by the output detecting FIFO register, FIFO detector judges that whether synchronization acquistion is successful; Like this judging synchronization acquistion success, while obtaining thick sync bit, thick sync bit being verified, reducing the probability that synchronization acquistion erroneous arrest obtains, improve the performance of communication system.
3rd, because the present invention adopts FIFO register and the FIFO detector of first in first out structure, under same acquisition accuracy requires, device of the present invention can adopt the shorter sync symbols of multiple Baud Length to realize, reduce the resource needed when communication system does related operation and FFT conversion thus, accelerate the processing speed of synchronization acquistion process, make synchronization acquiring device of the present invention be provided with resource occupation few, the fireballing advantage of synchronization acquistion.
4th, because synchronization acquiring method of the present invention is when judging that whether synchronization acquistion is successful, requiring to only have when the output of threshold compataror and the output of FIFO register satisfy condition simultaneously, synchronization acquistion success can be judged to be; Such decision method, overcomes the problem that wrong acquisition probability is high and leakage acquisition probability is high of prior art in synchronization acquistion, makes communication system have the high advantage of accurate synchronization acquisition probability.
Accompanying drawing explanation
Fig. 1 is the block diagram of apparatus of the present invention;
Fig. 2 is the block diagram of FIFO register in apparatus of the present invention;
Fig. 3 is the flow chart of the inventive method.
Embodiment
Below in conjunction with accompanying drawing, the present invention will be further described.
With reference to accompanying drawing 1, the inventive system comprises the synchronizing sequence getter, correlator bank, FFT converter, peak signal selector, the decision device that are connected by signal transmssion line.The input of synchronizing sequence getter receives wireless signal transmission, correlator bank comprises P correlator and P adder, the output of synchronizing sequence getter respectively with correlator 1, correlator 2, ... the input of correlator P is connected, correlator 1, correlator 2, ... the input of the adder that the output of correlator P is corresponding with correlator is connected, the output of adder is connected with the input of FFT converter, the output of FFT converter is connected with the input of peak signal selector, the output of peak signal selector is connected with the input of decision device, the output of decision device is connected with the input of synchronizing sequence correlator, the output of decision device is the output of synchronization acquiring device of the present invention.
The function of synchronizing sequence getter is, obtains the sequence of a sync symbols length as synchronizing sequence from the wireless signal transmission received.Correlator bank comprises P correlator and P adder, correlator is for storing local reference sequences, realize, to the related operation between local reference sequences and the segment data of corresponding synchronizing sequence getter input, exporting correlation result simultaneously and making accumulation process to adder.The function of FFT converter is, does FFT conversion to the data that adder exports.The function of peak signal selector is, from the data that FFT converter exports, select peak maximum.Decision device comprises threshold compataror, FIFO register, FIFO detector.The function of threshold compataror is, the threshold value rule of thumb set output and the programmer of peak signal selector is carried out size and compared; The function of FIFO register is, according to the comparative result record corresponding data of threshold compataror; The function of FIFO detector is, according to the comparative result of threshold compataror and the record data of FIFO register, judges that whether synchronization acquistion is successful, and result of determination is fed back to synchronizing sequence getter.
With reference to accompanying drawing 2, the FIFO register in apparatus of the present invention comprises h FIFO components and parts and one and gate device.The output of threshold compataror is connected with the input of FIFO components and parts 1, the output of FIFO components and parts 1 is respectively with the input of FIFO components and parts 2, be connected with the input of gate device, the output of FIFO components and parts 2 is with the input of next FIFO components and parts and be connected with the input of gate device, the output of FIFO components and parts h and being connected with the input of gate device; Be connected with the input of FIFO detector with the output of gate device.
The function of FIFO components and parts is, stores the data of a sync symbols length; The number of FIFO components and parts equals the number that synchronizing sequence getter receives sync symbols in wireless signal transmission synchronous head and subtracts 1.That logic and operation is carried out to the data of input with the function of gate device.
Because the present invention adopts the FIFO register of first in first out structure, no matter the size comparative result between the output of peak signal selector and the threshold value of threshold compataror, all comparative result is recorded in FIFO register, and in synchronization acquistion success or not afterwards judges, again detect comparative result, overcome and to exist in prior art, using index value corresponding for first the qualified range value found as thick sync bit, and stop synchronization acquistion process thus the problem missed by real thick sync bit, reduce the probability that communication system synchronization acquistion leakage obtains.
Because the present invention adopts FIFO detector, when the comparative result that threshold compataror exports satisfies condition, by the output detecting FIFO register, FIFO detector judges that whether synchronization acquistion is successful, obtain thick sync bit; Because the data length that FIFO components and parts store equals the length of a sync symbols, when the data of the output of FIFO register are 1, just illustrate that the output data of each FIFO components and parts are 1, also the range value that threshold value just appears being more than or equal in one, interval sync symbols length is just described, if the comparative result that now threshold compataror exports also is 1, the thick sync bit that FIFO detector exports just is through the accurate synchronization position of multiple authentication, reduces the probability that communication system synchronization acquistion erroneous arrest obtains.
Because the present invention adopts FIFO register and the FIFO detector of first in first out structure, under same acquisition accuracy requires, device of the present invention can adopt the shorter sync symbols of multiple Baud Length to realize, sync symbols length shortens, then the length of local reference sequences shortens, when doing related operation and FFT change, decrease the usage quantity of multiplier and adder, which reduces the resource taken, accelerate the processing speed of synchronization acquistion process, synchronization acquiring device of the present invention is made to be provided with resource occupation few, the fireballing advantage of synchronization acquistion.
Below in conjunction with accompanying drawing 3, method of the present invention is done and describes further.
Comprise 2 identical sync symbols in the embodiment of the present invention in synchronous head, and sync symbols length is the wireless signal transmission of M.Synchronizing sequence getter receives wireless signal transmission, by the address of first of wireless signal transmission data, as the starting point of target sequence, is labeled as first_point.
Step 1, obtains synchronizing sequence.
Synchronizing sequence getter, from first_point, chooses the long sequence of a M as synchronizing sequence in wireless signal transmission.
Step 2, segmentation.
Synchronizing sequence is carried out segmentation by synchronizing sequence getter according to the following formula:
Y＝M-XP
Wherein, P represents the number of correlator in correlator bank, and X represents the segmentation Baud Length of P-1 correlator before in corresponding correlator bank,
represent and round downwards, Y represents the segmentation Baud Length of P correlator in corresponding correlator bank, and M represents the length of the synchronizing sequence that synchronizing sequence getter obtains.By this segmentation method, synchronizing sequence be divide into P section.
The sync symbols that what local reference sequences adopted is in information source transmission information, is divided into P section according to above-mentioned segmentation method by local reference sequences, and is stored in by the local reference sequences after segmentation in corresponding correlator.
Step 3, makes related operation.
P correlator in correlator bank, respectively by the synchronizing sequence of this correlator corresponding and local reference sequences dot product, obtains plural coherent signal, and plural coherent signal feeding adder is dealt with.
Step 4, does add operation.
The real part of plural coherent signal and imaginary part add up by adder respectively, obtain the cumulative sum signal of plural number, and P different adder exports the individual different plural cumulative sum signal of P altogether.
Step 5, does FFT conversion.
FFT converter is made N point FFT to P cumulative sum signal and is converted, and obtains N number of range value; Wherein, N >=P, namely FFT conversion is counted and must be more than or equal to the number of correlator in correlator bank, and the specific several of N select according to the precision required for system correcting frequency offset.
Step 6, selects peak signal.
Peak signal selector selects a maximum amplitude value from N number of range value, be designated as peak, the position mark in the N point that maximum amplitude value is corresponding is after peak_local, peak_local are used for synchronization acquistion success, during signal transacting, compensate of frequency deviation uses, and does not act in the present invention.
Step 7, compares the size of maximum amplitude value and threshold value.
Maximum amplitude value peak is carried out size with threshold value and compares by threshold compataror: if peak is more than or equal to threshold value, then threshold compataror exports 1 as comparative result; If peak is less than threshold value, then threshold compataror exports 0 as comparative result, and FIFO register stores the comparative result of threshold compataror.
Threshold value is that user receives the average power of wireless signal transmission as initial value using synchronizing sequence getter, after adjusting, is pre-stored in a value of threshold compataror according to concrete wireless channel environment.User needs the sync symbols number comprised in the signal to noise ratio of consideration wireless channel environment and wireless signal transmission synchronous head when adjusting threshold value; When wireless channel environment signal to noise ratio is larger, suitably threshold value should be improved, when wireless channel environment signal to noise ratio is less, suitably threshold value should be reduced; When the sync symbols number comprised in wireless signal transmission synchronous head is less, suitably threshold value should be improved, when the sync symbols number comprised in wireless signal transmission synchronous head is more, suitably threshold value should be reduced.
In embodiments of the invention, because wireless signal transmission synchronous head adopts two sync symbols, so the FIFO components and parts that FIFO register is M by a storage data length are formed.
Step 8, judges that whether synchronization acquistion is successful.
When threshold compataror output 1 is as comparative result, FIFO detector detects the output of FIFO register, if it is 1 that FIFO register exports data, then judge synchronization acquistion success, now the position of first_point mark is thick sync bit, FIFO detector exports thick sync bit, performs step 9; If the output data of FIFO register are 0, then first_point value is added 1, point to the next data that synchronizing sequence getter receives wireless signal transmission, proceed to step 1 and re-start synchronization acquistion.
Step 9, communication system terminates synchronization acquistion state, enters synchronized tracking state.
Because synchronization acquiring method of the present invention is when judging that whether synchronization acquistion is successful, requiring to only have when the output of threshold compataror and the output of FIFO register satisfy condition simultaneously, synchronization acquistion success can be judged to be; Such decision method, not only capture thick sync bit, and according to the feature of FIFO register, to thick sync bit is that correctness is verified, overcome the problem that wrong acquisition probability is high and leakage acquisition probability is high of prior art in synchronization acquistion, make communication system have the high advantage of accurate synchronization acquisition probability.
Claims (6)
1., based on a synchronization acquiring device for first in first out structure, comprise the synchronizing sequence getter, correlator bank, FFT converter, peak signal selector, the decision device that are connected by signal transmssion line; The described output of synchronizing sequence getter is connected with the input of correlator bank, the output of each correlator is connected with the input of FFT converter after adder adds up, the output of FFT converter is connected with the input of peak signal selector, the output of peak signal selector is connected with the input of decision device, and the output of decision device is connected with the input of synchronizing sequence correlator; Wherein,
Described synchronizing sequence getter, for obtaining the sequence of a sync symbols length as synchronizing sequence from the wireless signal transmission received;
Described correlator bank, comprises multiple correlator and multiple adder, and correlator, for storing local reference sequences, realizes the related operation between local reference sequences and the segment data of corresponding synchronizing sequence getter input; Export correlation result simultaneously and make accumulation process to adder;
Described FFT converter, the data for exporting adder do FFT conversion;
Described peak signal selector, selects peak maximum in the data that export from FFT converter;
Described decision device, comprises threshold compataror, FIFO register, FIFO detector; This threshold compataror is used for comparing size to the output of peak signal selector with the threshold value of setting, these FIFO recorder trace comparative result data, this FIFO detector is according to the record data of threshold compataror comparative result and FIFO register, when the output of threshold compataror and the output of FIFO register satisfy condition simultaneously, judge synchronization acquistion success, and result of determination is fed back to synchronizing sequence getter.
2. the synchronization acquiring device based on first in first out structure according to claim 1, is characterized in that, described FIFO register comprises multiple FIFO components and parts and one and gate device; Between described multiple FIFO components and parts, series winding connects, and the output of each FIFO components and parts is equal and be connected with the input of gate device; The input of first FIFO components and parts is connected with the output of threshold compataror; Be connected with the input of FIFO detector with the output of gate device; Wherein,
Described FIFO components and parts, for storing the data of a sync symbols length; The number of FIFO components and parts equals the number that synchronizing sequence getter receives sync symbols in wireless signal transmission synchronous head and subtracts 1;
Described and gate device, for carrying out logic and operation to the data of input.
3., based on a synchronization acquiring method for first in first out structure, comprise the steps:
(1) synchronizing sequence is obtained:
1a) synchronizing sequence getter receives the wireless signal transmission at least comprising two identical sync symbols in synchronous head;
1b) address of first data of wireless signal transmission will be received, as the starting point of target sequence;
1c) synchronizing sequence getter is from the starting point of target sequence, chooses the sequence of a sync symbols length as synchronizing sequence;
(2) segmentation:
2a) by the number of the length of synchronizing sequence divided by correlator in correlator bank, gained business and remainder represent the sequence length after segmentation, are all correlators that the multistage sequence pair of business answers in correlator bank except last correlator by length; It is last correlator that the sequence pair of remainder answers correlator bank by length;
2b) according to step 2a) described in segmentation method segmentation is carried out to local reference sequences;
(3) related operation is made:
By the synchronizing sequence of same for correspondence correlator and local reference sequences dot product, obtain plural coherent signal;
(4) add operation is done:
The real part of plural coherent signal and imaginary part add up by adder respectively, obtain the cumulative sum signal of plural number;
(5) FFT conversion is done:
FFT converter does FFT conversion to cumulative sum signal, obtains converting with FFT range value one to one of counting;
(6) peak signal is selected:
The maximum of peak signal selector selecting range peak value from range value, obtains a maximum amplitude value;
(7) size of maximum amplitude value and threshold value is compared:
Threshold compataror carries out size to maximum amplitude value and threshold value and compares, if maximum amplitude value is more than or equal to threshold value, threshold compataror exports 1 as comparative result; If maximum amplitude value is less than threshold value, threshold compataror exports 0 as comparative result, and FIFO register stores the comparative result of threshold compataror; According to first in first out, export the data be stored in FIFO register;
(8) judge that whether synchronization acquistion is successful:
When the comparative result that threshold compataror exports is 1, FIFO detector detects the output of FIFO register, judges that whether synchronization acquistion is successful: if the output data of FIFO register are 1, then FIFO detector exports thick sync bit, synchronization acquistion is judged to be successfully, performs step (9); If the output data of FIFO register are 0, then synchronizing sequence getter are received the address of the next data of wireless signal transmission as the starting point of target sequence, proceeds to step 1c) re-start synchronization acquistion;
(9) communication system terminates synchronization acquistion state, enters synchronized tracking state.
4. the synchronization acquiring method based on first in first out structure according to claim 3, is characterized in that, step 2b) described in local reference sequences adopts is a sync symbols in information source transmission information.
5. the synchronization acquiring method based on first in first out structure according to claim 3, it is characterized in that, threshold value described in step (7) refers to, user receives the average power of wireless signal transmission as initial value using synchronizing sequence getter, after adjusting according to concrete wireless channel environment, be pre-stored in a value of threshold compataror.
6. the synchronization acquiring method based on first in first out structure according to claim 3, is characterized in that, the thick sync bit described in step (8) refers to, the position that target sequence starting point is corresponding.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310192181.8A CN103384401B (en) | 2013-05-13 | 2013-05-13 | Based on synchronization acquiring device and the method thereof of first in first out structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310192181.8A CN103384401B (en) | 2013-05-13 | 2013-05-13 | Based on synchronization acquiring device and the method thereof of first in first out structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103384401A CN103384401A (en) | 2013-11-06 |
| CN103384401B true CN103384401B (en) | 2015-11-11 |
Family
ID=49492077
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310192181.8A Expired - Fee Related CN103384401B (en) | 2013-05-13 | 2013-05-13 | Based on synchronization acquiring device and the method thereof of first in first out structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN103384401B (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103634095B (en) * | 2013-12-20 | 2017-01-18 | 北京华力创通科技股份有限公司 | Timed capturing device and method for satellite mobile communication receiving terminal |
| CN107070496B (en) * | 2017-04-13 | 2019-03-26 | 西安电子科技大学 | Real-time synchronization acquisition equipment and method based on partial matched filter algorithm |
| CN107063311A (en) * | 2017-04-21 | 2017-08-18 | 江西飞尚科技有限公司 | A kind of dynamic measurement system method of single coil vibrating sensor |
| CN115134064B (en) * | 2021-03-27 | 2024-01-16 | 华为技术有限公司 | Data synchronization method and electronic equipment |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101951273A (en) * | 2010-09-14 | 2011-01-19 | 中国科学院上海微系统与信息技术研究所 | Long code word acquisition method for wireless sensor network |
| CN102412862A (en) * | 2010-09-21 | 2012-04-11 | 中国科学院上海微系统与信息技术研究所 | Direct sequence spread spectrum (DSSS) communication pseudo code capture method used in wireless sensor network (WSN) |
-
2013
- 2013-05-13 CN CN201310192181.8A patent/CN103384401B/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101951273A (en) * | 2010-09-14 | 2011-01-19 | 中国科学院上海微系统与信息技术研究所 | Long code word acquisition method for wireless sensor network |
| CN102412862A (en) * | 2010-09-21 | 2012-04-11 | 中国科学院上海微系统与信息技术研究所 | Direct sequence spread spectrum (DSSS) communication pseudo code capture method used in wireless sensor network (WSN) |
Non-Patent Citations (3)
| Title |
|---|
| Chen, Shi;Zhang, Tianqi;He, Danna;Gao, Hongxing.NLFM-DSS signal acquisition method based on DPT and PMF-FFT.《2012 5th International Congress on Image and Signal Processing》.IEEE,2012, * |
| Liu Chang;Zhang Jun;Yanbo Zhu;Pan Qingge.Analysis and optimization of PMF-FFT acquisition algorithm for high-dynamic GPS signal.《2011 IEEE 5th International Conference on Cybernetics and Intelligent Systems (CIS)》.IEEE,2011, * |
| 基于PMF-FFT的高动态多进制扩频信号的捕获算法;黄烈超，张天骐，杜晓华，白娟;《计算机应用研究》;20110930;第28卷(第9期);3407-3413 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103384401A (en) | 2013-11-06 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN100341377C (en) | Cell searching method in asyncronous wideband code division multiple access system | |
| JP2005500737A5 (en) | ||
| US10911178B2 (en) | System and method for blind detection of numerology | |
| CN112203347B (en) | Continuous phase modulation preamble design and synchronization method and device thereof | |
| CN103384401B (en) | Based on synchronization acquiring device and the method thereof of first in first out structure | |
| CN103078660B (en) | Method for reducing capturing time of spreading code in large dynamic range | |
| CN109005137A (en) | The frame synchornization method and system of ofdm system receiver | |
| JPH09261120A (en) | Synchronization acquisition method and equipment for correlation demodulation | |
| CN104065397A (en) | Method and device for synchronously capturing pseudo codes in real time | |
| CN100415029C (en) | Apparatus and method for estimating initial frequency offset in an asynchronous mobile communication system | |
| CN111835381A (en) | Low signal-to-noise ratio spread spectrum signal capturing method with variable symbol rate | |
| CN105871530B (en) | A kind of timing tracking method of anti-high dynamic frequency deviation variation | |
| CN1523795A (en) | Method for obtaining OFDM system coarse synchronizing using PN code synchronous channel | |
| CN102185628A (en) | Spread spectrum code phase capture equipment based on adaptive power accumulation and capture method thereof | |
| CN104980184A (en) | Method and equipment for cell search of TD-SCDMA (Time Division-Synchronization Code Division Multiple Access) system | |
| CN1201500C (en) | Synchronization capture method of downline in CDMA system | |
| CN1588834A (en) | Frequency deviation evaluation device and method | |
| CN100521565C (en) | A cell searching method and device for TD-SCDMA system | |
| CN102271004B (en) | DwPTS positioning method and system thereof | |
| CN105530064A (en) | Frame tagging sequence design based on compound codes | |
| CN1960226B (en) | Apparatus for performing initial synchronization and frame synchronization in mobile communications system and method thereof | |
| CN109327240A (en) | A kind of code capture method of spread-spectrum signal | |
| CN114039827B (en) | Synchronization method and device for continuous phase modulation based on multi-level PN sequence | |
| CN101312375B (en) | Method for relative result synchronous acquisition and synchronous acquisition unit therefor | |
| CN111355568B (en) | Differential processing method and device for synchronous code with time repetition characteristic |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20151111 Termination date: 20170513 |