CN103248593B - Offset estimation and removing method and system - Google Patents
Offset estimation and removing method and system Download PDFInfo
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- CN103248593B CN103248593B CN201210028872.XA CN201210028872A CN103248593B CN 103248593 B CN103248593 B CN 103248593B CN 201210028872 A CN201210028872 A CN 201210028872A CN 103248593 B CN103248593 B CN 103248593B
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Abstract
The present invention provides a kind of offset estimation to be included with eliminating system, the system：Receiver, to receive baseband signal；Analog-digital converter, connects the analog-signal transitions of receiver and the baseband signal for receiving receiver into single byte signal x (n)；Zero passage detection module, the absolute value for connecting analog-digital converter and the single byte signal x (n) being inputted carries out differential, and the signal y (n) of zero passage detection module output is a string of pulse signals related to base-band signal frequency；Decimation filter, connects and receives the pulse signal inputted by zero passage detection module, and export the signal of N times of symbol rate；DC detecting module, the signal for the N times of symbol rate that decimation filter is inputted is converted into 1 times of parallel N roads symbol rate signal, carries out sample-synchronous and selective filter simultaneously to N roads signal again afterwards；Frequency deviation estimating modules, frequency offset is converted to by the output of DC detecting module.
Description
Technical field
The present invention relates to digital wireless communication field, especially field of signal processing, and in particular to one kind is used for communication system
In system, Low Medium Frequency zero passage detection receiver receives offset estimation and the elimination of signal.
Background technology
In electronic communication, particularly mobile communication, more and more using coherent demodulation method, to improve communication system
Performance.Such as in the WCDMA of one of 3G (Third Generation) Moblie (3rd Generation, referred to as " 3G ") standard
In (Wideband Code Division Multiple Access, referred to as " WCDMA ") GSM, base station and movement
Up-downgoing channel between platform employs the signal detecting method of coherent demodulation.
One of precondition of coherent demodulation is that the demodulation carrier wave of receiving terminal must be same with frequency with the modulation carrier wave of transmitting terminal
Phase.And in actual applications, due to a variety of causes so that the demodulation carrier wave of receiving terminal is it cannot be guaranteed that modulation carrier wave with transmitting terminal
Keep completely the same.First, the condition such as technical merit and emitter, the volume of receiver and cost all limits transmitting-receiving two-end sheet
The indexs such as the precision and stability of ground crystal oscillator；Secondly, for the wireless environment of mobile communication, the relative shifting of transmitter and receiver
Extra frequency departure between transmitter and receiver can be caused by moving caused Doppler effect.Such as, in 3G mobile communication
In system, when relative moving speed reaches 120km/h, if carrier frequency is near 2GHz, it will correspondingly produce about
250Hz Doppler frequency shift.This will be more significant in satellite communication.Pin using frequency deviation in this regard, in actual applications, generally estimated
Meter and correcting method are corrected due to transmitting-receiving frequency deviation caused by the reasons such as wireless channel, with suitable for coherent demodulation technology,
Improve systematic function.
In a wireless communication environment, the multipath fading caused by multipath transmisstion, will cause the distortion of wireless signal, no
But there is large-scale rapid fluctuation in amplitude, and can be superimposed random difference, and this causes current mobile communications system, especially when
During using phase modulation technique, such as two-phase key modulation (Binary PhaseShift Keying, referred to as " BPSK "), four phase keys are adjusted
System (Quaternary Phase Shift Keying, referred to as " QPSK "), receives the demodulation performance of signal to phase place change very
It is sensitive.Therefore in the current mobile communication systems, it is how abnormal to phase caused by wireless channel propagation using technologies such as channel estimations
Become and accurately estimate and correct, to improve signal demodulation performance.However, the technology such as channel estimation also requires that the frequency of receiving-transmitting sides
Partially in certain scope.In fact, when frequency deviation is higher, the degree of accuracy of channel estimation and performance will drastically decline.Therefore, exist
Under multi-path channel environment, correcting frequency deviation is also carried out in the urgent need to offset estimation and correction, and then improve channel estimation accuracy
And systematic function.
It can be seen that, in a wireless communication system, in the GSM particularly under multi-path channel environment, offset estimation and
Correcting method is all vital for receiving and dispatching synchronous, coherent demodulation and channel estimation.
The content of the invention
The technical problem to be solved in the present invention is that provide a kind of baseband signal direct current biasing offsets with IF signal frequency
Between corresponding relation, pass through reponse system, correction of frequency skew method.
The present invention solves above-mentioned technical problem by such technical scheme：
A kind of offset estimation and elimination system are provided, the system includes：
Receiver, to receive baseband signal；
Analog-digital converter, receive that receiver receives by baseband signal, and by its analog-signal transitions into single-bit
Signal x (n)；
Zero passage detection module, to connecting and receiving the single-bit signal x (n) of analog-digital converter input, and single-bit is believed
The absolute value of number x (n) data signals carries out differential, and the signal y (n) of zero passage detection module output is a string and base-band signal frequency
Related pulse signal；
Decimation filter, connects and receives the pulse signal inputted by zero passage detection module, and export the letter of N times of symbol rate
Number；
DC detecting module, the signal for the N times of symbol rate that decimation filter is inputted, i.e., export via decimation filter
Signal, is converted into 1 times of parallel N roads symbol rate signal, carries out sample-synchronous simultaneously to N roads signal again afterwards and selectivity is filtered
Ripple；
Frequency deviation estimating modules, frequency offset is converted to by the output of DC detecting module.
As an improvement, DC detecting module includes sample-synchronous module, to find out optimum sampling path, most preferably adopts
The signal to noise ratio in sample path is optimal.
The present invention also provides a kind of offset estimation and comprised the following steps with eliminating the frequency deviation estimating method of system, this method：
A receiver is provided, to receive baseband signal；
An analog-digital converter is provided, by the analog-signal transitions of baseband signal into single byte signal x (n)；
A zero passage detection module is provided, the single byte signal x (n) inputted to analog-digital converter absolute value carries out differential,
The signal y (n) of zero passage detection module output is a string of pulse signals related to base-band signal frequency；
One decimation filter is provided, the pulse signal inputted by zero passage detection module is connected and receive, and export N times of symbol
The signal of rate；
A direct current detection module is provided, the signal for the N times of symbol rate that decimation filter is inputted is converted into parallel N roads 1
Times symbol rate signal, carries out sample-synchronous and selective filter simultaneously to N roads signal again afterwards；
One frequency deviation estimating modules are provided, the output of DC detecting module is converted into frequency offset.
As an improvement, the function that zero passage detection module is realized is as follows：Y (n)=diff (abs (x (n))), to input
Single byte signal x (n) absolute value differential, zero passage detection module output signal y (n) be a string and frequency input signal phase
The pulse signal of pass.
As an improvement, DC detecting module is first by the signal of N times of symbol rate of input (i.e. via decimation filter
The signal of output) 1 times of parallel N roads symbol rate signal is converted into, sample-synchronous and selection are carried out simultaneously to N roads signal again afterwards
Property filtering, the formula of serioparallel exchange is as follows：yn(k)=x (n+Nk), n=1,2...N, wherein, x (n+Nk) is via extraction filter
The signal of ripple device output, yn(k) be conversion after parallel signal.
As an improvement, DC detecting module includes sample-synchronous module, to find out optimum sampling path, most preferably adopts
The signal to noise ratio in sample path is optimal, and its slip related algorithm is：
K in above formula is slides related length, and x is the input signal that 1bit quantifies, and P is then local targeting sequencing, long
Spend for M, xnFor each parallel 1 times of the n-th tunnel symbol rate signal.
As an improvement, the determination methods in optimum sampling path are to ask most to be worth first in each path, then more N number of
The result in path.
As an improvement, while optimum sampling path is calculated, selective filter is carried out to N circuit-switched datas.
As an improvement, FM signal is converted into corresponding amplitude letter after zero passage detection and decimation filter
Number, the amplitude of response is vIF-v and vIF+v, and wherein vIF is known quantity, will eliminate vIF data alternatively property wave filter
Input, when the sign bit of data changes, the data v (k-1) before and after the moment, what v (k) was characterized is exactly that two frequency modulation are believed
Number corresponding range value, processing mode is：
DcEst (k)=(1- α) × dcEst (k-1)+α × symDc (k)
At the time of the k moment is that the symbol of input signal there occurs change, the symDc (k) in above formula is corresponding for the k moment
The amplitude difference of two FM signals, that is, signal direct current biasing, filter out evaluated error by low pass filter, obtain final
Direct current biasing estimate dcEst, the α in above formula determines the bandwidth of low pass filter, the final output of selective filter
Depending on optimum sampling path.
As an improvement, the output of DC detecting module is converted to frequency offset, processing side by appraising frequency bias module
Method is as follows：
Fs is the ADC sample frequencys of system, and dcGain is then the DC current gain of decimation filter.
Compared with prior art, the present invention has advantages below：, can using direct current/frequency deviation estimating method of the present invention
To realize multidiameter delay bit synchronous and real-time direct current/frequency deviation compensation carried out per Lu Douke.Direct current/offset estimation of the present invention
It is used to adjust the frequency of receiver by the accumulation of multiple data frames to improve the whole performance for receiving system.
Brief description of the drawings
Fig. 1 is the block schematic illustration of offset estimation of the present invention and removing method.
Fig. 2 is the configuration diagram of offset estimation of the present invention and the DC detecting module in removing method.
Fig. 3 is the configuration diagram of offset estimation of the present invention and sample-synchronous module in removing method.
Fig. 4 is the structural representation of offset estimation of the present invention and selective filter module in removing method.
Embodiment
The embodiment that the invention will now be described in detail with reference to the accompanying drawings.
In Low Medium Frequency zero passage detection receiver, the direct current that the frequency shift (FS) of signal has been directly changed into baseband signal is inclined
Move.Need to detect the flip-flop of baseband signal by special method, reduce frequency shift (FS) to sign synchronization, sample-synchronous
And the influence of signal demodulation.
The present invention is just to provide the corresponding relation between a kind of baseband signal direct current biasing and IF signal frequency skew, leads to
Cross reponse system, the method for correction of frequency skew.
The present invention is estimated in the baseband signal that Low Medium Frequency zero passage detection receiver is received using the method for parallel detection
Direct current biasing, corresponding frequency shift (FS) is converted into by direct current biasing, using between reponse system cancellation receiver and emitter
Frequency departure.As shown in Figure 1.Wherein, analog-digital converter ADC to by analog-signal transitions into single byte signal (1-bit), with
Follow-up zero passage detection module is facilitated to carry out zero passage detection.How much is number of times of the signal through zero crossing in unit interval, can be for
Weigh the height of frequency.Frequency-shift keying ripple zero passage points it is different with different carrier frequency, therefore detection zero passage points can obtain on
The difference of frequency, here it is the basic thought of cross zero detecting method.The function that zero passage detection module is realized is as follows：
Y (n)=diff (abs (x (n)))
To the 1bit data x (n) of input absolute value differential, zero passage detection module output signal y (n) be a string with it is defeated
Enter the related pulse signal of signal frequency.
Decimation filter has two effects, one is to the integration of input signal (frequency pulse), it is understood that to ask
It is average；The second is to the signal down-sampling after integration, the data rate of output is N times of character rate.Frequency pulse is by integration
Then it is converted into corresponding amplitude information.High-frequency correspondence amplitude, low frequency correspondence low amplitude value.
As shown in Fig. 2 DC detecting module is (defeated i.e. via decimation filter by the signal of N times of symbol rate of input first
The signal gone out) it is converted into 1 times of parallel N roads symbol rate signal.Sample-synchronous and selectivity are carried out simultaneously to N roads signal again afterwards
Filtering.The formula of serioparallel exchange is as follows：
yn(k)=x (n+Nk), n=1,2...N
Wherein, x (n+Nk) is the signal exported via decimation filter, yn(k) be conversion after parallel signal.
The purpose of sample-synchronous module is to find out optimum sampling path, and the signal to noise ratio in optimum sampling path is optimal.Therefore, should
The corresponding direct current estimate in path is also optimal value.Shown in Fig. 3 is exactly sample-synchronous module.The module is first to input signal
1bit quantizations are carried out, complexity is reduced in the case where not influenceing performance.The correlation with local targeting sequencing is recycled, is found out
Optimal sample path.
Slide related formula as follows：
K in above formula is the related length of slip.X is the input signal that 1bit quantifies.P is then local targeting sequencing, long
Spend for M.
Above formula be optimum sampling path judgement formula, ask most be worth in each path first, then more N number of path knot
Really.
While optimum sampling path is calculated, selective filter is carried out to N circuit-switched datas.Selective filter in this patent
Only the data for occurring sign bit change are filtered.For MSK or fsk signal, two can be simply interpreted as
The combination of FM signal：FIF+f and fIF-f.The two FM signals are converted into after zero passage detection and decimation filter
Corresponding range signal, the amplitude of response is vIF-v and vIF+v, and wherein vIF is known quantity.To eliminate vIF data as
The input of selective filter, when the sign bit of data changes, what the data (v (k-1), v (k)) before and after the moment were characterized
It is exactly two corresponding range values of FM signal.
DcEst (k)=(1- α) × dcEst (k-1)+α × symDc (k)
The k moment is that the symbol of input signal is changed.SymDc (k) in above formula is k moment corresponding two tune
The amplitude difference of frequency signal, that is, signal direct current biasing.Evaluated error is filtered out by low pass filter, final direct current is obtained
Bias estimate dcEst.α in above formula determines the bandwidth of low pass filter.The final output of selective filter is depended on
Optimum sampling path.After sample-synchronous terminates, it is only necessary to which the data to optional sampling path carry out direct current biasing estimation.
The output of DC detecting module is converted to frequency offset by appraising frequency bias module, and calculation formula is as follows：
Fs is the ADC sample frequencys of system, and dcGain is then the DC current gain of decimation filter.
Because whole detection process needs certain convergence time, it is possible to use one or more data frame estimates frequency
Partially, after waiting Data Convergence, then the local frequency of receiver is adjusted, reduce frequency shift (FS) with this receives to Low Medium Frequency zero passage detection
The influence of machine demodulation performance.
Above-mentioned embodiment is summed up, the present invention is utilized：
Direct current/appraising frequency bias：Frequency deviation is carried out using decimation filter output and direct current and the corresponding relation of frequency deviation real
When estimate, and utilize BREATHABLE BANDWIDTH FILTER TO CONTROL tracking velocity and precision；
Parallel detection/optimum sampling Path selection：Using parallel processing, while estimation and compensating multiple hypothesis positions and adopting
Sample sequence, and using output result and synchronize；
Selective filter：The input data of direct current estimation is selected using selective filter, the number of influence precision is excluded
According to the degree of accuracy of raising direct current/frequency offset estimation.
Utilize direct current/frequency deviation estimating method of the present invention, it is possible to achieve multidiameter delay bit synchronous and enter per Lu Douke
The real-time direct current of row/frequency deviation compensation.Direct current/offset estimation of the present invention is used to adjust receiver by the accumulation of multiple data frames
Frequency entirely receives the performance of system so as to improve.
The foregoing is only the present invention better embodiment, protection scope of the present invention not using above-mentioned embodiment as
Limit, as long as equivalent modification that those of ordinary skill in the art are made according to disclosed content or change, should all include power
In protection domain described in sharp claim.
Claims (10)
1. a kind of offset estimation is with eliminating system, it is characterised in that the system includes：
Receiver, to receive baseband signal；
Analog-digital converter, receives the baseband signal that receives of receiver, and by its analog-signal transitions into single-bit signal x
(n)；
Zero passage detection module, the single-bit signal x (n) to connecting and receiving analog-digital converter input, and by single-bit signal x
(n) absolute value of data signal carries out differential, and the signal y (n) of zero passage detection module output is a string and base-band signal frequency phase
The pulse signal of pass；
Decimation filter, connects and receives the pulse signal inputted by zero passage detection module, and export the signal of N times of symbol rate；
DC detecting module, the signal for the N times of symbol rate that decimation filter is inputted, i.e., the letter exported via decimation filter
Number, 1 times of parallel N roads symbol rate signal is converted into, sample-synchronous and selective filter are carried out simultaneously to N roads signal again afterwards；
Frequency deviation estimating modules, frequency offset is converted to by the output of DC detecting module.
2. offset estimation according to claim 1 is with eliminating system, it is characterised in that it is same that DC detecting module includes sampling
Module is walked, to find out optimum sampling path, the signal to noise ratio in optimum sampling path is optimal.
3. a kind of frequency deviation estimating method of the offset estimation described in claim 1 with eliminating system, it is characterised in that this method bag
Include following steps：
A receiver is provided, to receive baseband signal；
An analog-digital converter is provided, by the analog-signal transitions of baseband signal into single byte signal x (n)；
A zero passage detection module is provided, the single byte signal x (n) inputted to analog-digital converter absolute value carries out differential, zero passage
The signal y (n) of detection module output is a string of pulse signals related to base-band signal frequency；
One decimation filter is provided, the pulse signal inputted by zero passage detection module is connected and receive, and exports N times of symbol rate
Signal；
A direct current detection module is provided, the signal for the N times of symbol rate that decimation filter is inputted is converted into 1 times of parallel N roads symbol
Number rate signal, carries out sample-synchronous and selective filter simultaneously to N roads signal again afterwards；
One frequency deviation estimating modules are provided, the output of DC detecting module is converted into frequency offset.
4. a kind of frequency deviation estimating method as claimed in claim 3, it is characterised in that the function that zero passage detection module is realized is such as
Under：Y (n)=diff (abs (x (n))), to the single byte signal x (n) of input absolute value differential, the output of zero passage detection module
Signal y (n) be a string of pulse signals related to frequency input signal.
5. a kind of frequency deviation estimating method as claimed in claim 4, it is characterised in that DC detecting module is first by the N of input
The signal of times symbol rate is converted into 1 times of parallel N roads symbol rate signal, N roads signal is carried out simultaneously again afterwards sample-synchronous and
Selective filter, the formula of serioparallel exchange is as follows：yn(k)=x (n+Nk), n=1,2 ... N, wherein, x (n+Nk) is via extraction
The signal of wave filter output, yn(k) be conversion after parallel signal.
6. a kind of frequency deviation estimating method as claimed in claim 5, it is characterised in that DC detecting module includes sample-synchronous mould
Block, to find out optimum sampling path, the signal to noise ratio in optimum sampling path is optimal, and its slip related algorithm is：
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K in above formula is slides related length, and x is the input signal that 1bit quantifies, and P is then local targeting sequencing, and length is
M, xnFor each parallel 1 times of the n-th tunnel symbol rate signal.
7. a kind of frequency deviation estimating method as claimed in claim 6, it is characterised in that the determination methods in optimum sampling path are first
First ask and be most worth in each path, then more N number of path result.
8. a kind of frequency deviation estimating method as claimed in claim 7, it is characterised in that while optimum sampling path is calculated,
Selective filter is carried out to N circuit-switched datas.
9. a kind of frequency deviation estimating method as claimed in claim 8, it is characterised in that FM signal passes through zero passage detection and extraction
After wave filter, corresponding range signal is converted into, the amplitude of response is vIF-v and vIF+v, and wherein vIF is known quantity, will be disappeared
Except the input of vIF data alternatively property wave filter, when the sign bit of data changes, the data v before and after the moment
(k-1) what, v (k) was characterized is exactly two corresponding range values of FM signal, and processing mode is：
DcEst (k)=(1-a) × dcEst (k-1)+α × symDc (k)
At the time of the k moment is that the symbol of input signal there occurs change, the symDc (k) in above formula is corresponding two for the k moment
The amplitude difference of FM signal, that is, signal direct current biasing, filter out evaluated error by low pass filter, obtain final straight
α in stream biasing estimate dcEst, above formula determines the bandwidth of low pass filter, and the final output of selective filter depends on
In optimum sampling path.
10. a kind of frequency deviation estimating method as claimed in claim 9, it is characterised in that the output of DC detecting module passes through frequency
Inclined estimation block is converted to frequency offset, and processing method is as follows：
Fs is the ADC sample frequencys of system, and dcGain is then the DC current gain of decimation filter.
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| EP3278471B1 (en) * | 2015-04-02 | 2019-07-31 | Telefonaktiebolaget LM Ericsson (publ) | A wireless communication node and a method for processing a signal in said node |
| CN105812303B (en) * | 2016-03-15 | 2019-03-01 | 苏州卓智创芯电子科技有限公司 | A kind of GFSK base-band digital receiver and its baseband synchronization and demodulation method |
| US11375908B2 (en) | 2016-10-21 | 2022-07-05 | Huawei Technologies Co., Ltd. | Blood pressure detection signal sampling and compensation method and apparatus, and blood pressure signal collection system |
| JP6772048B2 (en) * | 2016-12-14 | 2020-10-21 | ルネサスエレクトロニクス株式会社 | Rate judgment device, rate judgment method and receiver |
| US10079660B2 (en) * | 2017-01-25 | 2018-09-18 | Samsung Electroncis Co., Ltd. | System and method of tracking and compensating for frequency and timing offsets of modulated signals |
| CN108768910B (en) * | 2018-07-05 | 2023-05-23 | 上海晟矽微电子股份有限公司 | Frequency offset determining device and method |
| IT201900002785A1 (en) * | 2019-02-26 | 2020-08-26 | Teko Telecom S R L | BASE RADIO STATION AND WIRELESS TELECOMMUNICATION PROCESS FOR HIGH MOBILITY SCENARIOS |
| CN113079438A (en) * | 2020-01-06 | 2021-07-06 | 北京小米移动软件有限公司 | Loudspeaker protection method, loudspeaker protection device and storage medium |
| CN113783816B (en) * | 2021-10-27 | 2024-01-26 | 国芯科技(广州)有限公司 | Frequency offset estimation method in GFSK receiver |
| CN114143411A (en) * | 2021-11-26 | 2022-03-04 | 天津光电通信技术有限公司 | Meteorological fax digital receiving system based on FPGA |
| CN114915524B (en) * | 2022-04-21 | 2023-09-22 | 中国电子科技集团公司第十研究所 | DC offset real-time compensation method, device, equipment and storage medium |
| CN114978833B (en) * | 2022-05-23 | 2023-06-13 | 重庆大学 | QPSK modulation signal offset compensation method based on combined modulation waveform |
| CN116455460B (en) * | 2023-06-16 | 2023-08-25 | 成都星联芯通科技有限公司 | Low-frequency direct current component filtering method, demodulator and satellite communication equipment |
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