CN103024308A - Common image surface imaging method based on CMOS (complementary metal oxide semiconductor) package - Google Patents
Common image surface imaging method based on CMOS (complementary metal oxide semiconductor) package Download PDFInfo
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- CN103024308A CN103024308A CN2012105432093A CN201210543209A CN103024308A CN 103024308 A CN103024308 A CN 103024308A CN 2012105432093 A CN2012105432093 A CN 2012105432093A CN 201210543209 A CN201210543209 A CN 201210543209A CN 103024308 A CN103024308 A CN 103024308A
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Abstract
The invention discloses a common image surface imaging method based on CMOS (complementary metal oxide semiconductor) package. Partition imaging layout is performed on imaging induction areas of a light induction chip, the light induction chip is divided into at least two imaging induction areas, the adjacent imaging induction areas are separated from each other by a spacer, each imaging induction area corresponds to an optical channel, different scene information or different spectral information of the same scene is simultaneously imaged on the light induction chip by respectively independent optical channels, the light induction chip is connected with an internal lead bonding area of a substrate dam through a gold wire, photoelectric conversion processes of pixels of the imaging induction areas are mutually independent, and photoelectric conversion signals of the imaging induction areas are uniformly processed by a peripheral support circuit. The method meets the integral structure design requirements of system microminiaturization on size and volume, the requirement of instantaneity of stereoscopic vision imaging is met, and poor imaging effects of imaging area junctions caused by image surface division completely depending on multiple optical paths are avoided.
Description
Technical field
The present invention relates to common image planes formation method, relate in particular to a kind of common image planes formation method based on the CMOS encapsulation.
Background technology
Altogether the bionical stereoscopic vision of image planes imaging need to be obtained multiple image and splices and process.Obtain multiple image information, prior art has three kinds: a kind of is to adopt single CIS(CMOS imageing sensor) take by the time sequence; The second is to adopt a plurality of CIS to gather simultaneously image; The third is to rely on multi-optical channel to carry out common image planes imaging fully.
The inventor finds to exist at least in the prior art following shortcoming and defect in realizing process of the present invention:
First method is difficult to satisfy altogether image planes imaging stereoscopic vision detection real-time application demand because common CIS is single photosensitive area structure by time sequence shooting; Second method can't realize the Miniaturization Design demand of system because a plurality of CIS of employing have increased the complexity of system; The third method is owing to the physical edge effect of each lens in the light path, and the intersection imaging effect is relatively poor between divided image planes.
Summary of the invention
The invention provides a kind of common image planes formation method based on the CMOS encapsulation, the method has realized that real-time is used and the demand of system's Miniaturization Design to surveying, and has improved the imaging effect of cutting apart the image planes intersection, sees for details hereinafter and describes:
A kind of common image planes formation method based on the CMOS encapsulation said method comprising the steps of:
(1) the imaging induction zone at the photoinduction chip divides the picture layout into, be divided at least two imaging induction zones, adjacent imaging induction zone is separated from each other by spacer region, the corresponding optical channel of each described imaging induction zone, the different spectral informations of different scene informations or Same Scene by separately independently described optical channel be imaged onto simultaneously on the described photoinduction chip;
(2) with gold thread described photoinduction chip is connected with the inner lead bonding district of substrate dykes and dams;
(3) the pixel photoelectric conversion process of each described imaging induction zone is separate, and the photoelectric conversion signal unification of each described imaging induction zone is processed by the peripheral support circuit.
Separate being specially of pixel photoelectric conversion process of each described imaging induction zone:
Each imaging induction zone is equivalent to an independently photoelectric coupled device, adopts row parallel data processing mode respectively corresponding optical channel information to be carried out opto-electronic conversion.
Described the peripheral support circuit is often referred to logic control and the signal of imaging induction zone and processes, and comprising: clock circuit, sequential logic control circuit, programmable circuit and analog to digital converter.
The photoelectric conversion signal unification of each described imaging induction zone is processed by the peripheral support circuit and is specially:
Image information in each optical channel transmission on the photoinduction chip of same frame images on the corresponding imaging induction zone, described the peripheral support circuit is calculated simultaneously to the photoelectric conversion signal of each imaging induction zone, thereby has realized altogether image planes imaging of the integrative packaging CMOS of zoning.
Spacing distance is 0.5～1mm between described two induction zones.
The beneficial effect of technical scheme provided by the invention is: adopt a photoinduction chip to realize that multi-optical channel is total to the image planes imaging detection and has satisfied the overall construction design requirement of system's microminaturization on size and volume; In addition, carry out zoning's integrative packaging in the image sensing district of chip, reached the requirement of real-time of stereo vision imaging, also avoided relying on fully multi-pass to carry out image planes and cut apart the relatively poor image effect of imaging area intersection that brings.Use the present invention and can realize altogether image planes minitype bionic stereoscopic vision detection of multichannel fully, altogether image planes formation method of a kind of zoning integrative packaging is provided.
Description of drawings
Fig. 1 is zoning's cmos imager structure principle chart;
Fig. 2 is two-region layout structure cmos imaging schematic diagram;
Fig. 3 is cmos image sensor chip basic structure;
Fig. 4 is the flow chart based on the common image planes formation method of CMOS encapsulation.
In the accompanying drawing, the list of parts of each label representative is as follows:
1: the photoinduction chip; 2: the imaging induction zone;
3: spacer region; 4: gold thread;
5: the inner lead bonding district; 6: the substrate dykes and dams;
2-1,2-2,2-3,2-4,7-1 and 7-2: imaging induction zone.
Embodiment
For making the purpose, technical solutions and advantages of the present invention clearer, below embodiment of the present invention is described further in detail.
Referring to Fig. 1 and Fig. 4, in order to realize that real-time is used and the demand of system's Miniaturization Design to surveying, improve the imaging effect of cutting apart the image planes intersection, the embodiment of the invention provides a kind of common image planes formation method based on the CMOS encapsulation, sees for details hereinafter and describes:
101: the imaging induction zone at photoinduction chip 1 divides the picture layout into, be divided at least two imaging induction zones 2, adjacent imaging induction zone 2 is separated from each other by spacer region 3, each imaging induction zone 2 corresponding optical channels, the different spectral informations of different scene informations or Same Scene by separately independently optical channel be imaged onto simultaneously on the photoinduction chip 1;
During specific implementation, the quantity of imaging induction zone and size are set according to the needs in the practical application, and referring to Fig. 1, photoinduction chip 1 is divided into four imaging induction zones, be respectively imaging induction zone 2-1,2-2,2-3 and 2-4, the size of each imaging induction zone can be identical or different.
Take the binocular imaging district as example, as shown in Figure 2, the imaging induction zone of photoinduction chip 1 is divided into 2 equal-sized physics imaging areas at same semi-conducting material, first imaging induction zone is 7-1, second imaging induction zone is 7-2, spacing distance is 0.5～1mm between two induction zones, each zone is furnished with amplifier respectively and noise controller is processed the signal of telecommunication, but the simulation preliminary treatment of two photosensitive areas and analog to digital conversion circuit are in the unified layout of chip and encapsulation, so still be equivalent in logic a cmos imaging transducer.
102: with gold thread 4 photoinduction chip 1 is connected with the inner lead bonding district 5 of substrate dykes and dams 6;
103: the pixel photoelectric conversion process of each imaging induction zone 2 is separate, and the photoelectric conversion signal unification of each imaging induction zone 2 is processed by the peripheral support circuit.
Wherein, separate being specially of pixel photoelectric conversion process of each imaging induction zone 2: each imaging induction zone 2 is equivalent to an independently photoelectric coupled device, adopts row parallel data processing mode respectively corresponding optical channel information to be carried out opto-electronic conversion.
Wherein, the peripheral support circuit is often referred to logic control and the signal of imaging induction zone and processes, and comprising: clock circuit, sequential logic control circuit, programmable circuit and analog to digital converter etc.
Wherein, the photoelectric conversion signal unification of each imaging induction zone 2 is processed by the peripheral support circuit and is specially: although this method has been carried out regional division to the imaging induction zone, but whole electric and logic control still is equivalent to a cmos imaging transducer, (for example: carrying out omni-directional image when gathering image on the corresponding imaging induction zone 2 in the image information of each optical channel transmission on the photoinduction chip 1 of same frame, the corresponding imaging induction zone 2 of each optical channel, the image information that imaging induction zone 2 collects forms omni-directional image at same cmos imaging transducer), the peripheral support circuit is calculated simultaneously to the photoelectric conversion signal of each imaging induction zone 2, thereby has realized altogether image planes imaging technique of the integrative packaging CMOS of zoning.
Cmos image sensor chip basic structure as shown in Figure 3, image is imaged onto respectively on corresponding imageing sensor 7-1 and the 7-2 through the two-way light path, after inspiring electronics, amplify through selecting directly to carry out electric charge by the amplifier read signal, suppress noise signal through noise controller simultaneously, then each pixel information is integrated.The requirement of real-time that is total to the detection of image planes imaging stereoscopic vision under the mini system requirement had both been satisfied in this design, had also avoided relying on fully multi-optical channel to carry out common image planes and had cut apart the relatively poor imaging effect that brings.
According to design principle of the present invention, when the CIS photosensitive region adopts the two-region layout structure, the optical dimensions of cmos sensor spare is less than 2 * (1/20～1/12) inches, package dimension mounts less than 4 * 5～6(PCB), chip intends adopting two miniature lithium battery power supplies, voltage 3V, quiescent current is less than 20mA, every district pixel resolution is 64 * 64 or 128 * 128, two intervals are every about 0.5～1mm, adopt row parallel data processing mode respectively corresponding light path information to be carried out opto-electronic conversion, spectrum covers black and white image and coloured image, and the logic control of each imaging induction zone and signal processing are in the unified layout of chip and encapsulation.For the significant problem of fixed pattern noise that causes because of mismatch between cmos pixel and row, intend adopting double-sampling to eliminate fixed pattern noise in the pixel, add simultaneously the offset compensation technology to suppress the fixed pattern noise between each row.Adopt this subregion sensitization, row parallel data processing framework to efficiently solve altogether image planes three-dimensional imaging problem of multipath, satisfying on the basis simple in structure, that high-speed data is processed, reduce the design complexities of the modules such as analog to digital converter, timing sequencer, improve Product's Ease of Use and level of integrated system.
It will be appreciated by those skilled in the art that accompanying drawing is the schematic diagram of a preferred embodiment, the invention described above embodiment sequence number does not represent the quality of embodiment just to description.
The above only is preferred embodiment of the present invention, and is in order to limit the present invention, within the spirit and principles in the present invention not all, any modification of doing, is equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (5)
1. the common image planes formation method based on the CMOS encapsulation is characterized in that, said method comprising the steps of:
(1) the imaging induction zone at the photoinduction chip divides the picture layout into, be divided at least two imaging induction zones, adjacent imaging induction zone is separated from each other by spacer region, the corresponding optical channel of each described imaging induction zone, the different spectral informations of different scene informations or Same Scene by separately independently described optical channel be imaged onto simultaneously on the described photoinduction chip;
(2) with gold thread described photoinduction chip is connected with the inner lead bonding district of substrate dykes and dams;
(3) the pixel photoelectric conversion process of each described imaging induction zone is separate, and the photoelectric conversion signal unification of each described imaging induction zone is processed by the peripheral support circuit.
2. a kind of common image planes formation method based on CMOS encapsulation according to claim 1 is characterized in that separate being specially of pixel photoelectric conversion process of each described imaging induction zone:
Each imaging induction zone is equivalent to an independently photoelectric coupled device, adopts row parallel data processing mode respectively corresponding optical channel information to be carried out opto-electronic conversion.
3. a kind of common image planes formation method based on CMOS encapsulation according to claim 1, it is characterized in that, described the peripheral support circuit is often referred to logic control and the signal of imaging induction zone and processes, and comprising: clock circuit, sequential logic control circuit, programmable circuit and analog to digital converter.
4. according to claim 1 or 3 described a kind of common image planes formation methods based on CMOS encapsulation, it is characterized in that the photoelectric conversion signal unification of each described imaging induction zone is processed by the peripheral support circuit and is specially:
Image information in each optical channel transmission on the photoinduction chip of same frame images on the corresponding imaging induction zone, described the peripheral support circuit is calculated simultaneously to the photoelectric conversion signal of each imaging induction zone, thereby has realized altogether image planes imaging of the integrative packaging CMOS of zoning.
5. a kind of common image planes formation method based on the CMOS encapsulation according to claim 1 is characterized in that spacing distance is 0.5～1mm between described two induction zones.
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107278329A (en) * | 2017-05-26 | 2017-10-20 | 深圳市汇顶科技股份有限公司 | Pixel sensor cell and image capturing device |
| CN107820618A (en) * | 2017-09-30 | 2018-03-20 | 深圳市汇顶科技股份有限公司 | Sensing pixels unit and optical fingerprint sensor |
| CN109643523A (en) * | 2017-07-14 | 2019-04-16 | 深圳市汇顶科技股份有限公司 | Pixel circuit and image sensing |
| CN109839357A (en) * | 2019-01-15 | 2019-06-04 | 南京矢航信息技术有限公司 | A kind of double spectrum imaging device based on CMOS image planes cutting techniques |
| CN115908242A (en) * | 2022-09-22 | 2023-04-04 | 深圳市明测科技有限公司 | Chip gold wire whole line detection method and system for multi-channel image fusion |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1433630A (en) * | 2000-03-02 | 2003-07-30 | 奥林巴斯光学工业株式会社 | Small-sized image pickup module |
| US20070258006A1 (en) * | 2005-08-25 | 2007-11-08 | Olsen Richard I | Solid state camera optics frame and assembly |
| EP2061081A2 (en) * | 2007-11-14 | 2009-05-20 | Fujifilm Corporation | Imaging apparatus and imaging method |
| CN102201421A (en) * | 2011-04-22 | 2011-09-28 | 上海宏力半导体制造有限公司 | CMOS (Complementary Metal Oxide Semiconductor) image sensor and forming method thereof |
| CN102316347A (en) * | 2010-07-06 | 2012-01-11 | 夏普株式会社 | The shooting testing fixture of 3D camera module and shooting check method thereof, 3D camera module and shooting correction method thereof |
-
2012
- 2012-12-13 CN CN2012105432093A patent/CN103024308A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1433630A (en) * | 2000-03-02 | 2003-07-30 | 奥林巴斯光学工业株式会社 | Small-sized image pickup module |
| US20070258006A1 (en) * | 2005-08-25 | 2007-11-08 | Olsen Richard I | Solid state camera optics frame and assembly |
| EP2061081A2 (en) * | 2007-11-14 | 2009-05-20 | Fujifilm Corporation | Imaging apparatus and imaging method |
| CN102316347A (en) * | 2010-07-06 | 2012-01-11 | 夏普株式会社 | The shooting testing fixture of 3D camera module and shooting check method thereof, 3D camera module and shooting correction method thereof |
| CN102201421A (en) * | 2011-04-22 | 2011-09-28 | 上海宏力半导体制造有限公司 | CMOS (Complementary Metal Oxide Semiconductor) image sensor and forming method thereof |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107278329A (en) * | 2017-05-26 | 2017-10-20 | 深圳市汇顶科技股份有限公司 | Pixel sensor cell and image capturing device |
| WO2018214150A1 (en) * | 2017-05-26 | 2018-11-29 | 深圳市汇顶科技股份有限公司 | Pixel sensing unit and image capturing device |
| US20180342546A1 (en) * | 2017-05-26 | 2018-11-29 | Shenzhen GOODIX Technology Co., Ltd. | Pixel Sensing Unit and Image Capturing Device |
| US10930684B2 (en) * | 2017-05-26 | 2021-02-23 | Shenzhen GOODIX Technology Co., Ltd. | Pixel sensing unit and image capturing device |
| CN109643523A (en) * | 2017-07-14 | 2019-04-16 | 深圳市汇顶科技股份有限公司 | Pixel circuit and image sensing |
| CN109643523B (en) * | 2017-07-14 | 2022-01-14 | 深圳市汇顶科技股份有限公司 | Pixel circuit and image sensing system |
| CN107820618A (en) * | 2017-09-30 | 2018-03-20 | 深圳市汇顶科技股份有限公司 | Sensing pixels unit and optical fingerprint sensor |
| CN107820618B (en) * | 2017-09-30 | 2022-05-17 | 深圳市汇顶科技股份有限公司 | Sensing pixel unit and optical fingerprint sensor |
| CN109839357A (en) * | 2019-01-15 | 2019-06-04 | 南京矢航信息技术有限公司 | A kind of double spectrum imaging device based on CMOS image planes cutting techniques |
| CN115908242A (en) * | 2022-09-22 | 2023-04-04 | 深圳市明测科技有限公司 | Chip gold wire whole line detection method and system for multi-channel image fusion |
| CN115908242B (en) * | 2022-09-22 | 2023-10-03 | 深圳市明测科技有限公司 | Chip gold thread whole line detection method and system for multichannel image fusion |
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Application publication date: 20130403 |