CN102841808A - Computer system and method for improving efficiency of computer system - Google Patents
Computer system and method for improving efficiency of computer system Download PDFInfo
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- CN102841808A CN102841808A CN2011101674648A CN201110167464A CN102841808A CN 102841808 A CN102841808 A CN 102841808A CN 2011101674648 A CN2011101674648 A CN 2011101674648A CN 201110167464 A CN201110167464 A CN 201110167464A CN 102841808 A CN102841808 A CN 102841808A
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Abstract
The invention provides a computer system and a method for improving efficiency of computer system. The method is applicable to a multi-core processing unit. The method comprises the following steps of: detecting working states of a plurality of cores of a multi-core processing unit wafer through a detection unit, transmitting the working states of the cores to a management unit, and setting the number of the cores to be closed through the management unit, and then transmitting a setting instruction to the multi-core processing unit through the management unit, and closing the first group of cores under idle states.
Description
[technical field]
The present invention is about a kind of method and system of managing multinuclear heart processing unit, particularly a kind of enhancing efficiency method and computer system thereof that is used for computer system.
[background technology]
Desktop computer and other data processing systems all comprise CPU (CPU) usually; In order to carry out arithmetical operation, logical operation, control function and other Data Processing; And be directed against present many computer applications is that processor is intensive; For example three-dimensional (3D) scene is drawn, in three-dimensional (3D) image processing, because the combination of describing all to comprise hundreds of or thousands of pels of each image object represents, for reaching image instantaneity and integrality; With pel definition, location, pinup picture, painted, drawing, its calculated amount can be out of the processing power of CPU (CPU) in must at the appointed time limiting.
For reducing the load of CPU (CPU); And lifting processing speed; The specific function processing unit is used to the data that auxiliary centre processing unit (CPU) is handled comparatively complicated and instantaneity; The characteristics of specific function processing unit are to have a plurality of cores (Cores), can import information simultaneously and carry out calculation process, and for example GPU (GPU) imports the pel information simultaneously and gets into a plurality of cores and carry out computing; The demand that can meet instantaneity and integrality; Therefore this type of multinuclear heart processing unit begins to be applied in the personal computer system, and the CPU (CPU) that adopts unitary core to handle originally also begins to develop the framework of the multinuclear heart in recent years, uses to promote processing speed and operation efficiency.
The usefulness of multinuclear heart processing unit depends on frequency of operation; The frequency of operation of whole multinuclear heart processing unit is then got minimum frequency of operation value as a whole for the trouble free service frequency of the whole cores of detecting; Therefore just by and large; The core executable frequency of operation of multinuclear heart processing unit on it all is higher than the frequency of operation of arrangement, but because the restriction of chip management system, multinuclear heart processing unit can't promote and be higher frequency of operation.
In addition, in most applications were carried out, the demand that information is handled was so not huge, so the core on the part multinuclear heart processing unit is to be in idle state, did not carry out computing, was unfortunate very.
[summary of the invention]
In view of above problem; The invention reside in provides the enhancing efficiency of computer system method and computer system thereof, uses to solve and commonly uses multinuclear heart processing unit and can't promote the problem that often is in idle state for the core on higher frequency of operation and the part multinuclear heart processing unit.
The enhancing efficiency method that the present invention discloses computer system sees through the operating state that a detecting unit is detected a plurality of cores (Cores) on the multinuclear heart processing unit wafer; And convert a state signal into and be sent to administrative unit; Then set these core amounts of desiring to close, and convert a setting signal into administrative unit.Administrative unit transmits setting signal core processing unit wafer at the most, closes the one first group of core that is idle state.
The computer system that the present invention discloses comprises a multinuclear heart processing unit, a detecting unit and an administrative unit, and wherein detecting unit and multinuclear heart processing unit electrically connect, and administrative unit electrically connects multinuclear heart processing unit and detecting unit.The duty of a plurality of cores of detecting unit detecting multinuclear heart processing unit, and convert a state signal into and be sent to administrative unit.Administrative unit is set the core amounts desire to close according to the state signal, and converts a setting signal into and be sent to multinuclear heart processing unit, to close one first group of core that duty is an idle state.
Effect of the present invention is; Seeing through the detecting mode closes the core that is idle state of multinuclear heart processing unit; Improving the frequency of operation of multinuclear heart processing unit wafer, and then promote the overall operation usefulness of computer system, reach the purpose of optimized performance.
About characteristic of the present invention, the real work and effect, cooperate the graphic most preferred embodiment of doing to specify as follows now.
[description of drawings]
Fig. 1 is the synoptic diagram of computer system of the present invention.
Fig. 2 is according to method implementation step process flow diagram of the present invention.
The flow chart of steps that Fig. 3 detects for detecting unit of the present invention.
Fig. 4 sets the process flow diagram of closing kernel instruction for administrative unit of the present invention.
Fig. 5 is for closing the synoptic diagram of idle core according to setting command according to multinuclear heart processing unit of the present invention.
[embodiment]
Fig. 1 is the synoptic diagram according to computer system of the present invention, and native system 1 has at least one multinuclear heart processing unit 10, one detecting units 20 and an administrative unit 30, and detecting unit 20 electrically connects multinuclear heart processing unit 10.In addition, administrative unit 30 electrically connects with multinuclear heart processing unit 10 and detecting unit 20 respectively, and administrative unit 30 comprises one and shows a module 301 and a setting module 302.
Fig. 2 is according to method implementation step process flow diagram of the present invention, and at first, native system 1 sees through the duty of a plurality of cores on the detecting unit 20 detecting multinuclear heart processing units 10, and its detecting flow process please cooperates the contained steps flow chart of Fig. 3 simultaneously.
Detecting unit 20 judges at first on multinuclear heart processing unit 10 whether a plurality of cores have one first group of core 101 for idle state and one second group of core is arranged is operating state; As for not; Then wait a cycling time, for example 5 seconds, detect again; So be familiar with this operator, can corresponding adjustment be worth cycling time according to the actual design demand; As for being, then detecting unit 20 calculates the overall operation frequency of present multinuclear heart processing unit 10, and first group of core 101 on detecting multinuclear heart processing unit 10 wafers, and the number of second group of core and numbering.Detecting unit 20 will be detected the result and convert a state signal to, and be sent to administrative unit 30.
Please close the steps flow chart of kernel instruction simultaneously with reference to the setting of figure 4; The demonstration module 301 of user in administrative unit 30 obtains the information of detecting; And see through the instruction that core is closed in 302 settings of setting module, setting module 302 provides two kinds to set model selections: the first setting pattern and the second setting pattern.
The first setting pattern is: the user can select core number and the numbering desiring to close, and produce one close core instruction; The second setting pattern is: the user sets a preset frequency of operation, calculates and desires to reach the core number that this frequency of operation institute must close by setting module 302, is closed the instruction of core by administrative unit 30 generations.Administrative unit 30 produces the instruction of closing a core, converts a setting signal to, and is sent to multinuclear heart processing unit 10, and multinuclear heart processing unit 10 is closed corresponding duty according to setting signal and is first group of idle core 101.
Fig. 5 is for closing the synoptic diagram of duty for first group of idle core according to multinuclear heart processing unit of the present invention according to setting command.When multinuclear heart processing unit 10 is closed the work clothes attitude for idle first group of core 101; Because of the frequency of operation of whole multinuclear heart processing unit 10 is got minimum frequency of operation value as a whole for the trouble free service frequency of the whole cores of detecting; When the core number of opening reduces; Multinuclear heart processing unit wafer can be detected new trouble free service frequency values frequency of operation value as a whole again, so the frequency of operation value of multinuclear heart processing unit 10 will improve, and and then promotes usefulness.
Though embodiments of the invention disclose as stated; So be not in order to limit the present invention; Anyly have the knack of related art techniques person; Do not breaking away from the spirit and scope of the present invention, such as according to the described shape of application range of the present invention, structure, characteristic and quantity when can doing a little change, therefore scope of patent protection of the present invention must be looked the appended claim person of defining of this instructions and is as the criterion.
Claims (10)
1. the enhancing efficiency method of a computer system is characterized in that, may further comprise the steps:
Detect the duty of a plurality of cores of a multinuclear heart processing unit with a detecting unit, and convert a state signal into;
This detecting unit transmits this state signal to an administrative unit;
Set these core amounts of desiring to close with this administrative unit, and convert a setting signal into; And
This administrative unit transmits this setting signal to this multinuclear heart processing unit, and closes that this duty is one first group of core of an idle state in these cores.
2. the enhancing efficiency method of computer system according to claim 1 is characterized in that, wherein detects the step of duty of these cores of this multinuclear heart processing unit, more comprises:
This detecting unit judges that one second group of core of these cores is an operating state, and judges that this first group of core of these cores is this idle state;
This detecting unit calculates a frequency of operation value of these cores; And
This first group of core of this this multinuclear heart processing unit of detecting unit detecting and the quantity and the numbering of this second group of core.
3. the enhancing efficiency method of computer system according to claim 2 is characterized in that, the step that wherein transmits this state signal to this administrative unit more comprises:
This first group of core of this this multinuclear heart processing unit of detecting unit transmission and quantity, numbering and this frequency of operation of this second group of core are to this administrative unit.
4. the enhancing efficiency method of computer system according to claim 1 is characterized in that, the step of wherein setting these core amounts of desiring to close with this administrative unit more comprises:
Set module with one and optionally close this first group of core.
5. the enhancing efficiency method of computer system according to claim 4 is characterized in that, the step of wherein setting these core amounts of desiring to close with this administrative unit more comprises:
Set the preset frequency of operation that module is set this multinuclear heart processing unit with this;
This administrative unit is calculated these core amounts of desiring to close; And
Optionally close this first group of core with this setting module.
6. a computer system is characterized in that, includes:
One multinuclear heart processing unit comprises a plurality of cores;
One detecting unit electrically connects this multinuclear heart processing unit, the duty of these these cores of detecting unit detecting, and convert a state signal into; And
One administrative unit electrically connects this multinuclear heart processing unit and this detecting unit, and this administrative unit receives this state signal, and sets these core amounts of desiring to close according to this state signal, and converts a setting signal into;
Wherein, this administrative unit transmits this setting signal to this multinuclear heart processing unit, to close at least one this core that this duty is an idle state.
7. computer system according to claim 6 is characterized in that, wherein this administrative unit comprises:
One shows module, this state signal of reception, and should show a corresponding operating state, this idle state and the numbering that shows these cores of module; And
One sets module, optionally closes at least one this core that is this idle state.
8. computer system according to claim 7 is characterized in that, wherein this setting module more comprises:
One first setting pattern in order to this core numbering that is this idle state of selecting to desire to close, and converts this setting signal into.
9. computer system according to claim 7 is characterized in that, wherein this setting module more comprises:
One second setting pattern, in order to set a preset frequency of operation, this second setting pattern is according to should preset frequency of operation calculating required core amounts of closing and convert this setting signal into.
10. computer system according to claim 7 is characterized in that, wherein this setting module more comprises:
One first setting pattern in order to this core numbering that is this idle state of selecting to desire to close, and converts this setting signal into; And
One second setting pattern, in order to set a preset frequency of operation, this second setting pattern receives a setting value, according to should preset frequency of operation calculating required core amounts of closing and convert this setting signal into.
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