CN102832201B - Test structure and test method - Google Patents
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- CN102832201B CN102832201B CN201110161459.6A CN201110161459A CN102832201B CN 102832201 B CN102832201 B CN 102832201B CN 201110161459 A CN201110161459 A CN 201110161459A CN 102832201 B CN102832201 B CN 102832201B
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Abstract
The invention discloses a test structure. The test structure comprises multiple row conductive layers, multiple column conductive layers, a first selection unit, a second selection unit, a first test port and a second test port, wherein the row conductive layers and the column conductive layers of adjacent layers are crossly arranged and electrically connected in crossed positions through conductive plugs with different distances from the edges of the row conductive layers or the column conductive layers; the first selection unit is connected with the row conductive layers respectively and used for selecting one of the row conductive layers for communicating an electric signal; the second selection unit is connected with the column conductive layers respectively and used for selecting one of the column conductive layers for communicating the electric signal; the first test port is connected with the first selection unit; and the second test port is connected with the second selection unit. The invention further provides a test method using the test structure. Minimal distance between each conductive plug and the edge of each conductive layer can be tested by using the test structure, so that the area of a test base plate is saved, and the test efficiency is improved.
Description
Technical field
The present invention relates to semiconductor fabrication process, particularly for test structure and the method for testing of testing conductive connector and conductive layer edge minimum spacing.
Background technology
Along with very lagre scale integrated circuit (VLSIC) (Ultra Large Scale Integration, ULSI) fast development, the manufacturing process of integrated circuit becomes and becomes increasingly complex with meticulous, the width of the conductive layer such as polysilicon gate, metal interconnection wire becomes more and more thinner, and the spacing at conductive plunger and conductive layer edge also becomes more and more less.Because the position of the conductive plunger of actual fabrication may there occurs skew compared with the position of conductive plunger in layout design, in layout design process, if the position of conductive plunger is too near conductive layer edge, so actual fabrication conductive plunger with part may be only had between conductive layer to be connected or conductive plunger deviate from the region of conductive layer completely, contact resistance between conductive plunger and conductive layer will increase, and affects the normal work of device or circuit.In order to prevent the region that deviate from conductive layer because of conductive plunger from causing device or circuit cisco unity malfunction, need to formulate layout design rules to the position of conductive plunger and conductive layer.
About the design rule of the position between conductive plunger and conductive layer, industry has carried out many trials.The patent No. is that the american documentation literature of US6804808 discloses and a kind ofly adopts excessive conductive plunger to carry out the design rule connected between the conductive layers.Owing to employing excessive conductive plunger, even if the position of the conductive plunger of actual fabrication may there occurs skew compared with the position of conductive plunger in layout design, also there is partially conductive connector still to connect upper and lower two conductive layers, upper and lower two conductive layers is electrically connected.But this design rule needs to make excessive conductive plunger, adds cost, and utilizes this design rule that conductive plunger can not be avoided to deviate from conductive layer area.
Summary of the invention
The problem that the present invention solves is to provide a kind of test structure for testing conductive connector and conductive layer edge minimum spacing and method of testing, as long as test out conductive plunger and the minimum spacing needed for conductive layer edge, in layout design process, make the spacing at the position of conductive plunger and conductive layer edge be greater than minimum spacing, just can solve pad and offset out conductive layer area, affect the problem of conductive layer interconnection.
For solving the problem, technical solution of the present invention provides a kind of test structure, comprise several rows conductive layer and row conductive layer, the row conductive layer of adjacent layer and the cross arrangement of row conductive layer, at crossover location by being electrically connected with the conductive plunger of row conductive layer or row conductive layer edge different spacing; First selected cell and the second selected cell, described first selected cell is connected respectively with several rows conductive layer, for selecting wherein conductive layer to be line by line communicated with the signal of telecommunication, described second selected cell is connected respectively with some row conductive layers, is communicated with the signal of telecommunication for selecting wherein rows of conductive layer; First test port and the second test port, described first test port is connected with the first selected cell, and described second test port is connected with the second selected cell.
Optionally, described row conductive layer be metal level on grid, grid, top layer metallic layer one deck wherein or which floor.
Optionally, described row conductive layer be metal level on grid, grid, top layer metallic layer one deck wherein or which floor.
Optionally, the row conductive layer being positioned at same layer is at least two row.
Optionally, the row conductive layer of described crossover location, row conductive layer, conductive plunger form test cell, and in some test cells that the capable conductive layer of same layer a line wherein connects, the spacing at the edge of conductive plunger and row conductive layer is different; In some test cells that the capable conductive layer of same layer another row wherein connects, the spacing at the edge of conductive plunger and row conductive layer is different.
Optionally, in the some test cells be connected with same a line conductive layer, the spacing at the edge of conductive plunger and row conductive layer arranges by the mode of arithmetic progression.
Optionally, in the some test cells be connected with same a line conductive layer, the spacing at the edge of conductive plunger and row conductive layer arranges by the mode of arithmetic progression.
Optionally, be often electrically connected by the first switch element between conductive layer and the first test port line by line, described first selected cell realizes selecting wherein conductive layer to be line by line communicated with the signal of telecommunication by controlling described first switch element.
Optionally, described first switch element is MOS transistor.
Optionally, be electrically connected between every rows of conductive layer and the second test port by second switch unit, described second selected cell realizes selecting wherein rows of conductive layer to be communicated with the signal of telecommunication by controlling second switch unit.
Optionally, described second switch unit is MOS transistor.
Technical solution of the present invention also provides a kind of method of testing using described test structure.
Compared with prior art, the present invention has the following advantages:
Several rows conductive layer and row conductive layer is comprised in the test structure of the embodiment of the present invention, the row conductive layer of adjacent layer and the cross arrangement of row conductive layer, at crossover location by being electrically connected with the conductive plunger of row conductive layer or row conductive layer edge different spacing, the row conductive layer of a crossover location, row conductive layer, conductive plunger forms a test cell, the first selected cell utilizing connection to be expert on conductive layer and the second selected cell be connected on row conductive layer are selected needing the test cell of test, only need a described test structure just can test out conductive plunger and the minimum spacing needed for conductive layer edge in layout design, and the number of pads that described test structure needs is few, save the area of test base, the minimum spacing at plurality of layers conductive plunger and conductive layer edge can be measured once by programming, improve detection efficiency.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of a kind of test structure in prior art;
Fig. 2 is the structural representation of a kind of test structure of the embodiment of the present invention;
Fig. 3 is the structural representation of the another kind of test structure of the embodiment of the present invention;
Fig. 4 is the cross-sectional view of a kind of test structure of the embodiment of the present invention.
Embodiment
In order to the minimum spacing needed for testing conductive connector and conductive layer edge, inventor provide a kind of test structure, concrete schematic diagram please refer to Fig. 1.Described test structure 10 comprises pad 11, pad 12 and comprises the test module 20 of some test cells 21.Described test cell 21 comprises the first conductive layer 22, is positioned at one or more conductive plungers 23 on the first conductive layer 22 surface, is positioned at second conductive layer 24 on described conductive plunger 23 surface.Each test cell 21 in test module 20 is in series by the first conductive layer 22 or the second conductive layer 24, wherein, the test cell being positioned at test cell one end of series connection connects pad 11, and the test cell being positioned at the test cell other end of series connection connects pad 12.In same test structure, in all test cells 21, the spacing at conductive plunger 23 and the first conductive layer 22 edge is definite value.When external test voltage is connected to pad 11 and pad 12, by leakage current between the two and reference current being compared, judge whether conductive plunger partly or completely departs from the region of the first conductive layer.When there being test structure described in several, in each test structure, the spacing at conductive plunger and the first conductive layer edge is different, by testing all test structures, just can test out conductive plunger and the minimum spacing needed for the first conductive layer edge in layout design.
But utilize described test structure one can only test the spacing at a kind of conductive plunger and the first conductive layer edge, if the quantity needing conductive plunger and the different conductive layers edge minimum spacing of testing is M, the spacing at conductive plunger and conductive layer edge will survey N class value, described test structure just needs M*N, pad at least needs M*N+1, and the area occupying test base will be very large.
Inventor further provides a kind of test structure for this reason, comprise several rows conductive layer and row conductive layer, the row conductive layer of adjacent layer and the cross arrangement of row conductive layer, at crossover location by being electrically connected with the conductive plunger of row conductive layer or row conductive layer edge different spacing, be positioned at the row conductive layer of crossover location, row conductive layer, conductive plunger formation test cell; First selected cell and the second selected cell, described first selected cell is connected respectively with several rows conductive layer, for selecting wherein conductive layer to be line by line communicated with the signal of telecommunication, described second selected cell is connected respectively with some row conductive layers, is communicated with the signal of telecommunication for selecting wherein rows of conductive layer; First test port and the second test port, described first test port is connected with the first selected cell, and described second test port is connected with the second selected cell.
For enabling above-mentioned purpose of the present invention, feature and advantage more become apparent, and are described in detail the specific embodiment of the present invention below in conjunction with accompanying drawing.
First embodiment
First embodiment of the invention provides a kind of test structure, concrete structure schematic diagram please refer to Fig. 2, described test structure comprises some row conductive layers 610,620,630,640 and several rows conductive layer 801,802, described some row conductive layers are positioned at same layer, described several rows conductive layer is positioned at another layer, described row conductive layer and the cross arrangement of row conductive layer, at crossover location by being electrically connected with the conductive plunger of row conductive layer edge or row conductive layer edge different spacing, wherein, the row conductive layer of crossover location, row conductive layer, conductive plunger formation test cell is positioned at; First selected cell 910 and the second selected cell 920, described first selected cell 910 is connected respectively with several rows conductive layer 801,802, the signal of telecommunication is communicated with for selecting one of them row conductive layer, described second selected cell 920 is connected respectively with some row conductive layers 610,620,630,640, is communicated with the signal of telecommunication for selecting one of them row conductive layer; First test port F1 ' and the second test port F2 ', described first test port F1 ' is connected with the first selected cell 910, and described second test port F2 ' is connected with the second selected cell 920.
In the present embodiment, described row conductive layer 610,620,630,640 is grid.In other embodiments, described row conductive layer is metal level, the top layer metallic layer one deck wherein on grid, grid.The quantity of row conductive layer can be 10,15 or more, and because the quantity of row conductive layer is more, also more for the distance values measured, the minimum spacing at the conductive plunger recorded and conductive layer edge is also more accurate.
In the present embodiment, described row conductive layer 801,802 is the first metal layer on grid.In other embodiments, described row conductive layer is metal level, the top layer metallic layer one deck wherein on grid, grid.
The row conductive layer being positioned at same layer is at least two row, and in some test cells that a line wherein connects, the spacing at the edge of conductive plunger and row conductive layer is different; In some test cells that another row wherein connects, the spacing at the edge of conductive plunger and row conductive layer is different.
In the present embodiment, in the some test cells 710 be connected with row conductive layer 801, conductive plunger 701 is different with the spacing at the edge of row conductive layer 610,620,630,640, and arrange by the mode of arithmetic progression, such as spacing is 10nm, 20nm, 30nm, 40nm; In the some test cells 720 be connected with row conductive layer 802, conductive plunger 702 is different with the spacing at the edge of row conductive layer 802, arranges by the mode of arithmetic progression.
Wherein, the conductive plunger in each test cell is at least one, and in the present embodiment, the conductive plunger in each test cell is two.
Described first selected cell 910 is communicated with the signal of telecommunication by selection row conductive layer with a row conductive layer with the second selected cell 920, thus makes test structure test a test cell be made up of the row conductive layer of correspondence, row conductive layer, conductive plunger.
The pad C2 that described first selected cell 910 comprises first switch element S31, S32 consistent with row conductive layer quantity and the pad C1 be connected with the first switch element S31, is connected with the first switch element S32, is often electrically connected by the first switch element between conductive layer and the first test port line by line.In the present embodiment, described first switch element is MOS transistor, and source/drain is connected row conductive layer and the first test port F1 ' respectively, and grid connects corresponding pad.
Described second selected cell 920 comprises the second switch cell S 41 consistent with row conductive layer quantity, S42, S43, S44 and the pad D1 be connected with second switch cell S 41, the pad D2 be connected with second switch cell S 42, the pad D3 be connected with second switch cell S 43, the pad D4 that is connected with second switch cell S 44, is electrically connected between every rows of conductive layer and the second test port by second switch unit.In the present embodiment, described second switch unit is MOS transistor, and source/drain is connecting column conductive layer and the second test port F2 ' respectively, and grid connects corresponding pad.
Described first test port F1 ' and the second test port F2 ' is for being arranged on the pad on test base.
The present invention also provides a kind of method of testing of the test structure used in the present embodiment, specifically comprise: control voltage is applied to the pad C1 of the first selected cell 910 and pad D1 of the second selected cell 920, make the MOS transistor S31 conducting of the first selected cell 910, the MOS transistor S41 conducting of the second selected cell 920; Detection voltage is applied to the first test port F1 ' and the second test port F2 ', owing to only having the MOS transistor S41 conducting of MOS transistor S31 and second selected cell 920 of first selected cell 910 simultaneously, leakage current can only pass through the test cell be made up of the row conductive layer 801 of correspondence, row conductive layer 610, conductive plunger 701; By the leakage current detected and reference current being compared, judge whether the conductive plunger of this test cell and the spacing at row conductive layer or row conductive layer edge are less than minimum spacing; Then control voltage is applied to next assembly welding dish, tests next detecting unit, by that analogy, complete the test of whole test structure.
The order of wherein testing can be tested by rows, also can test by row arrangement.
Because the position of the conductive plunger of actual fabrication can offset compared with the position of conductive plunger in layout design, if the conductive plunger of actual fabrication only has part to be connected with between row conductive layer or row conductive layer or conductive plunger deviate from the region of row conductive layer or row conductive layer completely, contact resistance between conductive plunger and row conductive layer or row conductive layer will increase, the leakage current detected will be less than reference current, just can learn that the conductive plunger of this test cell and the spacing at row conductive layer or row conductive layer edge are less than minimum spacing.
In the present embodiment, in the test cell 710 be connected with row conductive layer 801, conductive plunger 701 is different with the spacing at row conductive layer 610,620,630,640 edge, by testing all test cells 610, just can obtain a distance values, when conductive plunger 701 is at least this distance values with the spacing at row conductive layer 610,620,630,640 edge, the leakage current recorded is just identical with reference current, the minimum range of described distance values needed for conductive plunger described in layout design and gate edge.
In the present embodiment, in the test cell 720 be connected with row conductive layer 802, conductive plunger 702 is different with the spacing of row conductive layer 802, by testing all test cells 720, just can obtain a distance values, when conductive plunger 702 is at least this distance values with the spacing at row conductive layer 802 edge, the leakage current recorded is just identical with reference current, the minimum range of described distance values needed for the first metal layer edge on conductive plunger described in layout design and grid.
When the quantity of the conductive plunger and different conductive layers edge minimum spacing that need test is M, the spacing at conductive plunger and conductive layer edge will survey N class value, utilize the test structure of the embodiment of the present invention, only need a test structure and M+N+2 pad, greatly save the area of test base, and utilize the test structure in the embodiment of the present invention, the probe consistent with number of pads is placed on pad simultaneously, control voltage and test voltage is made to be applied on each test cell successively by programming, so just can test out the minimum spacing at conductive plunger and two conductive layers edge once, improve detection efficiency.
Second embodiment
Second embodiment of the invention provides another kind of test structure, and concrete structure schematic diagram please refer to Fig. 3.Described test structure comprises some row conductive layers 110, 120, 130, 140, 310, 320, 330, 340 and several rows conductive layer 301, 302, 501, 502, described row conductive layer 110, 120, 130, 140 are positioned at same layer, described row conductive layer 310, 320, 330, 340 are positioned at another layer, described row conductive layer 301, 302 are positioned at same layer, described row conductive layer 501, 502 are positioned at another layer, described row conductive layer and the cross arrangement of row conductive layer, at crossover location by being electrically connected with the conductive plunger of row conductive layer edge or row conductive layer edge different spacing, wherein, be positioned at the row conductive layer of crossover location, row conductive layer, conductive plunger forms test cell, first selected cell 410 and the second selected cell 420, described first selected cell 410 is connected respectively with several rows conductive layer 301,302,501,502, the signal of telecommunication is communicated with for selecting wherein conductive layer line by line, described second selected cell 420 is connected respectively with some row conductive layers 110,120,130,140, is communicated with the signal of telecommunication for selecting wherein rows of conductive layer, first test port F1 and the second test port F2, described first test port F1 is connected with the first selected cell 410, and described second test port F2 is connected with the second selected cell 420.
Cross-sectional view along the described test structure of hatching Z1 please refer to Fig. 4, specifically comprise: the first stratose conductive layer 110 being positioned at test base 100 surface, be positioned at the ground floor conductive plunger 201 on described first stratose conductive layer 110 surface, 202, 203, be positioned at the capable conductive layer 301 of ground floor on ground floor conductive plunger 201 surface, be positioned at the capable conductive layer 302 of ground floor on ground floor conductive plunger 202 surface, be positioned at the second stratose conductive layer 310 on ground floor conductive plunger 203 surface, be positioned at the second layer conductive plunger 401 on described second stratose conductive layer 310 surface, 402, be positioned at the capable conductive layer 501 of the second layer on described second layer conductive plunger 401 surface, be positioned at the capable conductive layer 502 of the second layer on described second layer conductive plunger 402 surface.
Described row conductive layer is metal level on grid, grid, top layer metallic layer wherein which floor.In the present embodiment, the first stratose conductive layer 110,120,130,140 is grid, and the second stratose conductive layer 310,320,330,340 is the first metal layer on grid.Described second stratose conductive layer 310,320,330,340 lays respectively at the top of the first stratose conductive layer 110,120,130,140, is connected between the second stratose conductive layer with the first stratose conductive layer by conductive plunger 203.In other embodiments, the number of plies of row conductive layer, more than two-layer, can reach eight layers at most, is electrically connected between described row conductive layer by conductive plunger.The quantity of each stratose conductive layer can be 10,15 or more, and because the quantity of row conductive layer is more, the distance values that can measure is also more, and the minimum spacing at the conductive plunger recorded and conductive layer edge is also more accurate.
Described row conductive layer is metal level on grid, grid, top layer metallic layer wherein which floor.In the present embodiment, the capable conductive layer 301,302 of ground floor is the first metal layer on grid, and the capable conductive layer 501,502 of the second layer is top layer metallic layer.In other embodiments, the number of plies of row conductive layer, more than two-layer, can reach eight layers at most.
Wherein, the row conductive layer being positioned at same layer is at least two row, and with some test cells that wherein conductive layer is connected line by line, the spacing at the edge of conductive plunger and row conductive layer is different; With some test cells that wherein another every trade conductive layer is connected, the spacing at the edge of conductive plunger and row conductive layer is different.
In the present embodiment, in the some test cells 310 be connected with the capable conductive layer of ground floor 301, the spacing at the edge of ground floor conductive plunger 201 and the first stratose conductive layer 110,120,130,140 is different, arrange by the mode of arithmetic progression, such as spacing is 10nm, 20nm, 30nm, 40nm; In the some test cells 320 be connected with the capable conductive layer of ground floor 302, ground floor conductive plunger 202 is different with the spacing at the edge of the first row conductive layer 302, arranges by the mode of arithmetic progression; In the some test cells 510 be connected with the capable conductive layer of the second layer 501, the spacing at the edge of second layer conductive plunger 401 and the second stratose conductive layer 310,320,330,340 is different, arranges by the mode of arithmetic progression; In the some test cells 520 be connected with the capable conductive layer of the second layer 502, second layer conductive plunger 402 is different with the spacing at the edge of the capable conductive layer of the second layer 502, arranges by the mode of arithmetic progression.
Wherein, the conductive plunger in each test cell is at least one, and in the present embodiment, the conductive plunger in each test cell is two.
Described first selected cell 410 is communicated with the signal of telecommunication by selection row conductive layer with a row conductive layer with the second selected cell 420, thus makes test structure test a test cell be made up of the row conductive layer of correspondence, row conductive layer, conductive plunger.
Described first selected cell 410 comprises first switch element S11, S12, S13, S14 consistent with row conductive layer quantity and the pad B1 be connected with the first switch element S11, the pad B2 be connected with the first switch element S12, the pad B3 be connected with the first switch element S13, the pad B4 that is connected with the first switch element S14, often line by line between conductive layer and the first test port by the first switch element electrical connection.In the present embodiment, described first switch element is MOS transistor, and source/drain is connected row conductive layer and the first test port F1 respectively, and grid connects corresponding pad.
Described second selected cell 420 comprises the second switch cell S 21 consistent with row conductive layer quantity, S22, S23, S24 and the pad A1 be connected with second switch cell S 21, the pad A2 be connected with second switch cell S 22, the pad A3 be connected with second switch cell S 23, the pad A4 that is connected with second switch cell S 24, is electrically connected between each row conductive layer and second test port by second switch unit.In the present embodiment, described second switch unit is MOS transistor, and source/drain is connected row conductive layer and the second test port F2 respectively, and grid connects corresponding pad.
Described first test port F1 and the second test port F2 is the pad be arranged on test base.
The present invention also provides a kind of method of testing of the test structure used in the present embodiment, specifically comprise: control voltage is applied to the pad B1 of the first selected cell 410 and pad A1 of the second selected cell 420, make the MOS transistor S11 conducting of the first selected cell 410, the MOS transistor S21 conducting of the second selected cell 420; Detection voltage is applied to the first test port F1 and the second test port F2, owing to only having the MOS transistor S21 conducting of MOS transistor S11 and second selected cell 420 of first selected cell 410 simultaneously, leakage current can only pass through the test cell be made up of the row conductive layer 301 of correspondence, row conductive layer 110, conductive plunger 201; By the leakage current detected and reference current being compared, judge whether the conductive plunger of this test cell and the spacing at row conductive layer or row conductive layer edge are less than minimum spacing; Then control voltage is applied to next assembly welding dish, tests next detecting unit, by that analogy, complete the test of whole test structure.
The order of wherein testing can be tested by rows, also can test by row arrangement.
Because the position of the conductive plunger of actual fabrication there occurs skew compared with the position of conductive plunger in layout design, if the conductive plunger of actual fabrication only has part to be connected with between row conductive layer or row conductive layer or conductive plunger deviate from the region of row conductive layer or row conductive layer completely, contact resistance between conductive plunger and row conductive layer or row conductive layer will increase, the leakage current detected will be less than reference current, just can learn that the conductive plunger of this test cell and the spacing at row conductive layer or row conductive layer edge are less than minimum spacing.
In the present embodiment, in the test cell 310 be connected with the capable conductive layer 301 of ground floor, the spacing at ground floor conductive plunger 201 and the first stratose conductive layer 110,120,130,140 edge is different, by testing all test cells 310, just can obtain a distance values, when the spacing at ground floor conductive plunger and the first stratose conductive layer edge is at least this distance values, the leakage current recorded is just identical with reference current, the minimum range of described distance values needed for ground floor conductive plunger in layout design and gate edge.
In the present embodiment, in the test cell 320 be connected with the capable conductive layer 302 of ground floor, ground floor conductive plunger 202 is different with the spacing at ground floor capable conductive layer 302 edge, by testing all test cells 320, just can obtain a distance values, when the spacing at ground floor conductive plunger and the capable conductive layer edge of ground floor is at least this distance values, the leakage current recorded is just identical with reference current, the minimum range of described distance values needed for the first metal layer edge on ground floor conductive plunger in layout design and grid.
In the present embodiment, in the test cell 510 be connected with the capable conductive layer 501 of the second layer, the spacing at second layer conductive plunger 401 and the second stratose conductive layer 310,320,330,340 edge is different, by testing all test cells 510, just can obtain a distance values, when the spacing at second layer conductive plunger and the second stratose conductive layer edge is at least this distance values, the leakage current recorded is just identical with reference current, the minimum range of described distance values needed for the first metal layer edge on second layer conductive plunger in layout design and grid.
In the present embodiment, in the test cell 520 be connected with the capable conductive layer 502 of the second layer, second layer conductive plunger 402 is different with the spacing at the edge of the capable conductive layer of the second layer 502, by testing all test cells 520, just can obtain a distance values, when the spacing at second layer conductive plunger and the capable conductive layer edge of the second layer is at least this distance values, the leakage current recorded is just identical with reference current, the minimum range of described distance values needed for second layer conductive plunger in layout design and top layer metallic layer edge.
When the quantity of the conductive plunger and different conductive layers edge minimum spacing that need test is M, the spacing at conductive plunger and conductive layer edge will survey N class value, utilize the embodiment of the present invention, only need a test structure and M+N+2 pad, greatly save the area of test base, and utilize the test structure in the embodiment of the present invention, the probe consistent with number of pads is placed on pad simultaneously, control voltage and test voltage is made to be applied on each test cell successively by programming, so just can test out the minimum spacing at plurality of layers conductive plunger and conductive layer edge once, improve detection efficiency.
One of ordinary skill in the art will appreciate that all or part of step of the various methods of above-described embodiment can carry out by program the hardware that instruction is correlated with to have come, this program can store in a computer-readable storage medium, and storage medium can comprise: read-only memory (ROM), random access memory (RAM), disk or CD etc.
Although the present invention with preferred embodiment openly as above; but it is not for limiting the present invention; any those skilled in the art without departing from the spirit and scope of the present invention; the Method and Technology content of above-mentioned announcement can be utilized to make possible variation and amendment to technical solution of the present invention; therefore; every content not departing from technical solution of the present invention; the any simple modification done above embodiment according to technical spirit of the present invention, equivalent variations and modification, all belong to the protection range of technical solution of the present invention.
Claims (12)
1. a test structure, is characterized in that, comprises several rows conductive layer and row conductive layer, the row conductive layer of adjacent layer and the cross arrangement of row conductive layer, at crossover location by being electrically connected with the conductive plunger of row conductive layer or row conductive layer edge different spacing; First selected cell and the second selected cell, described first selected cell is connected respectively with several rows conductive layer, for selecting wherein conductive layer to be line by line communicated with the signal of telecommunication, described second selected cell is connected respectively with some row conductive layers, is communicated with the signal of telecommunication for selecting wherein rows of conductive layer; First test port and the second test port, described first test port is connected with the first selected cell, and described second test port is connected with the second selected cell.
2. test structure as claimed in claim 1, is characterized in that, described row conductive layer be metal level on grid, grid, top layer metallic layer one deck wherein or which floor.
3. test structure as claimed in claim 1, is characterized in that, described row conductive layer be metal level on grid, grid, top layer metallic layer one deck wherein or which floor.
4. test structure as claimed in claim 1, it is characterized in that, the row conductive layer being positioned at same layer is at least two row.
5. test structure as claimed in claim 4, it is characterized in that, the row conductive layer of described crossover location, row conductive layer, conductive plunger form test cell, in some test cells that wherein the capable conductive layer of same layer a line wherein connects, the spacing at the edge of conductive plunger and row conductive layer is different; In some test cells that the capable conductive layer of same layer another row wherein connects, the spacing at the edge of conductive plunger and row conductive layer is different.
6. test structure as claimed in claim 5, it is characterized in that, in the some test cells be connected with same a line conductive layer, the spacing at the edge of conductive plunger and row conductive layer arranges by the mode of arithmetic progression.
7. test structure as claimed in claim 5, it is characterized in that, in the some test cells be connected with same a line conductive layer, the spacing at the edge of conductive plunger and row conductive layer arranges by the mode of arithmetic progression.
8. test structure as claimed in claim 1, it is characterized in that, every first switch element that passes through between conductive layer and the first test port is line by line electrically connected, and described first selected cell realizes selecting wherein conductive layer to be line by line communicated with the signal of telecommunication by controlling described first switch element.
9. test structure as claimed in claim 8, it is characterized in that, described first switch element is MOS transistor.
10. test structure as claimed in claim 1, it is characterized in that, be electrically connected by second switch unit between every rows of conductive layer and the second test port, described second selected cell realizes selecting wherein rows of conductive layer to be communicated with the signal of telecommunication by controlling second switch unit.
11. test structures as claimed in claim 10, it is characterized in that, described second switch unit is MOS transistor.
12. 1 kinds use the method for testing as the test structure of claim 1 ~ 11 any one, it is characterized in that, comprising:
Control voltage is applied to a pad of described first selected cell and a pad of described second selected cell, detection voltage is applied to described first test port and described second test port, leakage current detected, wherein, the row conductive layer of the correspondence that flows through of described leakage current, row conductive layer and conductive plunger form test cell;
Described leakage current and reference current are compared, judges whether the spacing at conductive plunger in described test cell and row conductive layer or row conductive layer edge is less than minimum spacing;
If described leakage current is less than described reference current, then judge that the conductive plunger of described test cell and the spacing at row conductive layer or row conductive layer edge are less than minimum spacing.
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| US6804808B2 (en) * | 2002-09-30 | 2004-10-12 | Sun Microsystems, Inc. | Redundant via rule check in a multi-wide object class design layout |
| US20040135231A1 (en) * | 2003-01-15 | 2004-07-15 | International Business Machines Corporation | An arrangement for testing semiconductor chips while incorporated on a semiconductor wafer |
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