CN102820237B - The method for measurement of metal thickness in semiconductor device - Google Patents
The method for measurement of metal thickness in semiconductor device Download PDFInfo
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- CN102820237B CN102820237B CN201110156411.6A CN201110156411A CN102820237B CN 102820237 B CN102820237 B CN 102820237B CN 201110156411 A CN201110156411 A CN 201110156411A CN 102820237 B CN102820237 B CN 102820237B
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Abstract
The invention provides the method for measurement of metal thickness in a kind of semiconductor device, comprise the following steps: the test structure with reservation shape and size is provided; After cmp, the thickness of metal in this test structure of X ray reflection device measuring is used.According to method for measurement of the present invention, achieve the accurate monitoring of metal layer thickness after to metal level CMP, what thus directly can judge whether to exist metal closures crosses grinding problem, and then clear and definite W-Al cushions CMP, and whether technique is qualified.In addition, what select in embodiments of the invention is measurement to metal closures thickness, and this method for supervising also can be expanded to monitoring for other semiconductor device parts by Spirit Essence according to the present invention by those skilled in the art.
Description
Technical field
The present invention relates to the method for measurement of metal thickness in a kind of semiconductor device, more particularly, relate to the process monitoring methods after a kind of second generation high-k/metal gate metal closures chemical-mechanical planarization.
Background technology
Along with the successful Application of high K/ metal gate engineering in 45 nm technology node, become the following technology node of sub-30 nanometer indispensable key modules chemical industry journey.After only adhering to high K/ at present, the Intel company of metal gate (gate last) route achieves successfully in 45 nanometers and 32 nanometer volume productions.Follow the Samsung of IBM industry alliance in recent years closely, Taiwan Semiconductor Manufacturing Co., the emphasis developed before is also turned to gatelast engineering by the first metal gate (gate first) of high K/ by the industry giants such as Infineon.
For Gate last engineering, by industry most challenge thought to the exploitation of chemical-mechanical planarization (CMP) technique.In gate last engineering, first generation technology needs 2 road CMP, is polysilicon opening polishing nitride (poly opening polish nitrideCMP), i.e. POP CMP and metal gate (metal gate) CMP respectively.In second-generation technology, except above-mentioned twice CMP, add the requirement of W-Al resilient coating (buffer) CMP, Fig. 1 is shown in by schematic diagram.As shown in Fig. 1 (a), first on semiconductor substrate 1 isolated area 2 and source-drain area 3 is formed, form the grid structure 4 comprising sidewall afterwards, then the interlayer insulating film 5 of overlies gate structure 4 is formed, next step forms opening in interlayer insulating film 5, then plated metal 6 over the entire structure.For obtained structure, next step carries out CMP, as shown in Fig. 1 (b), carries out CMP, until the top of grid structure.Current metal gate is the metal material of metal A l base, comprises Al, AlTi etc.For being called for short conveniently, this step of address CMP is that W-Al cushions CMP at present.This CMP is after metal gate CMP, through contact through hole is etched above source-drain area, then by CVD technique, barrier layer (Ti/TiN) and metal, such as tungsten (W) are inserted in through hole, pass through CMP again, remove unnecessary metal, form metal closures.This CMP not only proposes lot of challenges to CMP technology, also whether in range of tolerable variance, it is also proposed brand-new requirement to how monitoring this CMP.
Generally do not monitor after common metal CMP or adopt optical measurement means measure metal near thickness of insulating layer metal CMP technique is monitored.Optical instrument cannot be directly adopted to be that the light that sends due to light source cannot penetrating metal material to the reason that metal measures; If adopt optical measurement means, also metal CMP process can only be monitored by the mode of thickness of insulating layer near indirect inspection metal.Therefore traditional optical measures on the process monitoring of means after metal CMP and receives very big restriction.For this reason, after W-Al cushions CMP, be badly in need of a kind of undamaged to wafer, directly can judge whether CMP process had grinding problem (over polish) to metal closures to metal closures thickness method for rapidly monitoring, and then whether clear and definite W-Al buffering CMP is qualified.
Summary of the invention
Therefore, the object of the invention is to propose a kind of after metal CMP to the method that the thickness of residual metallic measures, determine whether this CMP process excessively carries out, meanwhile, this method for measurement can not bring damage to wafer.
The invention provides the method for measurement of metal thickness in a kind of semiconductor device, comprise the following steps: the test structure with reservation shape and size is provided; After cmp, the thickness of metal in this test structure of X ray reflection device measuring is used.
Wherein, comprise the following steps before measuring process: for the wafer of given model, carry out slice analysis after the cmp process, determine the excursion of metal closures metal layer thickness, and according to the measurement target of metal thickness and the range of tolerable variance of thickness after section result definition CMP.
Wherein, the figure of this test structure is the metal closures line structure on band barrier layer, and it has predetermined pattern density, this pattern density be defined as W fill in line width and W fill between the ratio of width.
Wherein, this test structure be positioned at inside wafer individual chips unit line of cut on or individual chips unit inner.
Wherein, this metal level is the metallic stacked structure on band barrier layer.
Wherein, this laminated construction is Ti/TiN/W.
Wherein, this test structure is rectangle or square.
Wherein, this test structure is of a size of the one in 20um × 20um, 30um × 30um, 50um × 50um.
Wherein, wherein the density range of this test structure is 10%-100%.
Wherein, the density range of this test structure is 50%.
Wherein, described metal is tungsten or copper or its composition.
Wherein, described CMP is that W-Al cushions CMP.
According to method for measurement of the present invention, achieve the accurate monitoring of metal layer thickness after metal carries out CMP, thus directly can judge whether the grinding problem excessively that there is metal closures, and then clear and definite W-Al cushions CMP, and whether technique is qualified.In addition, what select in embodiments of the invention is measurement to metal closures thickness, and this method for supervising also can be expanded to monitoring for other semiconductor device parts by Spirit Essence according to the present invention by those skilled in the art.
Object of the present invention, and in these other unlisted objects, met in the scope of the application's independent claims.Embodiments of the invention limit in the independent claim, and specific features limits in dependent claims thereto.
Accompanying drawing explanation
Technical scheme of the present invention is described in detail referring to accompanying drawing, wherein:
Fig. 1 shows W-Al general at present and cushions CMP schematic diagram;
Fig. 2 shows XRR measuring technique schematic diagram of the present invention;
Fig. 3 shows the shape and size schematic diagram of the resolution chart in one embodiment of the invention; And
Fig. 4 shows the structural representation of the resolution chart in one embodiment of the invention.
Embodiment
Describe feature and the technique effect thereof of technical solution of the present invention in detail in conjunction with schematic embodiment referring to accompanying drawing, disclose after proposing to adopt XRR measurement technology to cushion CMP to W-Al and monitor, and provide corresponding test structure.It is pointed out that structure like similar Reference numeral representation class.
The method for measurement that the present invention proposes based on X ray reflection technology (X-ray reflectivity is called for short XRR) solves above-mentioned technical problem.This technology is just in the starting stage in the application of integrated circuit industry circle, is a kind of process monitoring means having very much development potentiality.Its general principle is according to Fresnel principle, X ray is reached sample surfaces at a certain angle, reflection and refraction is there is in X-ray at dielectric surface, the X ray of refraction reflects again when passing dielectric layer arrival and another medium interface, its X ray reflected get back to former dielectric surface reflect after from surface out, detector calculates relevant thickness and density by measuring this two beam X-rays phase difference.The X ray reflected from film carries thin-film information, and this technology effectively can measure thickness and the density of complicated plural layers.Its outstanding strong penetrability feature of X ray not only makes measurement process not be subject to the restriction of metal and nonmetallic materials, and it is loaded down with trivial details to overcome the modeling of optical measurement laminate film, the technical bottleneck of unstable result etc.For XRR technology, more many modeling and the measurements being more conducive to different film thickness and density in laminate film structure of lamination.The laminated construction mentioned in the present invention is can be preferably Ti/TiN/W; The method has measurement speed soon simultaneously, and result is advantage accurately.
Be the XRR measuring technique schematic diagram in one embodiment of the present of invention shown in Fig. 2, the X ray sent from x-ray source 200 reflexes to X-ray detector 300 through wafer 100.
The CMP of carrying out in the present embodiment is that W-Al cushions CMP, but in the CMP of other types, can use the metal layer thickness method for supervising in the present invention too.W-Al cushions the process monitoring object after CMP: by XRR means, measure the thickness of test structure metal closures layer, judge that between metal closures depression (dishing) that CMP process produces or metal wire, whether in the reasonable scope corrosion (erosion) defect, reaches and cushion to W-Al the object that CMP carries out effective monitoring with this.The method for supervising of the present embodiment comprises the following steps:
1. select test structure, selected structure has reservation shape and size, and such as test structure shape and size are selected as follows: shape can put to the proof square or rectangular structure, and size aXb includes but not limited to 20umX20um; 30umX30um; 50umX50um etc., the accompanying drawing of test structure shown in Figure 3, it is of a size of aXb, and the Reference numeral 6 that black bar refers to represents metal closures line.
Selected test structure preferably has certain figure and density: figure is the metal closures line structure on band barrier layer in the present embodiment, and figure can also be weld pad, source electrode, drain electrode, grid etc. in other embodiments.This graphic structure is from metal closures wire casing etching, with technique below synchronous manufactured out, its schematic enlarged-scale view is shown in Fig. 4, wherein resolution chart is top view, enlarged drawing on the right side of Fig. 4 is the front view to left-hand broken line encircled portion, wherein the width of metal closures line 6 is c, and the width between metal closures line 6 is d, and the thickness of metal closures line 6 is e; Pattern density is defined as width, i.e. c/d between metal closures line width/metal closures line, density range 10%-100%, and example can put to the proof 50%; For the pattern density of 50%, the concrete size of c is as the criterion with the metal closures line width (CD) of actual product.
Selected test structure is preferably at such as upper/lower positions: on the line of cut of inside wafer individual chips unit or individual chips unit inner.Be normally with reference to starting point with calibration point, arrange these resolution charts at line of cut; Picture to be carried out according to actual domain in chip unit inside, be drawn in non-device district or dummy pattern district.
2. for the wafer of given model, carry out slice analysis after the cmp process, determine the excursion of the thickness e of metal closures line metal level 6, and according to the measurement target of metal thickness and the range of tolerable variance of thickness after section result definition CMP.Adopt SEM or TEM means, by DOE (design of experimental) experiment, after W-Al cushions CMP, slice analysis is carried out to the wafer of a certain product type, determines the excursion of metal closures metal layer thickness e, see Fig. 4; According to the measurement target of metal layer thickness after actual slice result reasonable definition W-Al buffering CMP, and the range of tolerable variance of thickness (SPEC); Those skilled in the art should be noted that: DOE experiment purpose finds W-Al to cushion the acceptable excursion of metal layer thickness after CMP exactly;
3. after cmp, use the thickness of metal in this test structure of X ray reflection device measuring.After W-Al cushions CMP, use the thickness e of metal closures line 6 in XRR device measuring test structure, if one-tenth-value thickness 1/10 (range of tolerable variance is determined by the 2nd step) in range of tolerable variance, can think that W-Al cushions CMP qualified; As crossed metal thickness not in range of tolerable variance, can think that W-Al cushions CMP defective, needing to adjust this technique.In practice, such as 65 nanometer technologies, the thickness of metal level can be typically in the scope of 1000 ± 30 dusts.
According to method for measurement of the present invention, achieve the accurate monitoring of metal layer thickness after metal carries out CMP, thus directly can judge whether the grinding problem excessively that there is metal closures, and then clear and definite W-Al cushions CMP, and whether technique is qualified.In addition, what select in embodiments of the invention is measurement to metal closures thickness, and this method for supervising also can be expanded to monitoring for other semiconductor device parts by Spirit Essence according to the present invention by those skilled in the art.
Although the present invention is described with reference to one or more exemplary embodiment, those skilled in the art can know without the need to departing from the scope of the invention and make various suitable change and equivalents to device architecture.In addition, can be made by disclosed instruction and manyly may be suitable for the amendment of particular condition or material and not depart from the scope of the invention.Therefore, object of the present invention does not lie in and is limited to as realizing preferred forms of the present invention and disclosed specific embodiment, and disclosed device architecture and manufacture method thereof will comprise all embodiments fallen in the scope of the invention.
Claims (10)
1.
a method for measurement for metal thickness in semiconductor device, comprises the following steps:
the test structure with reservation shape and size is provided;
after cmp, use X ray reflection equipment, measure the thickness of metal in this test structure by measuring two bundle reflection X-ray phase differences, metal is the laminated construction of Ti/TiN/W.
2.
the method for measurement of metal thickness in semiconductor device as claimed in claim 1, wherein comprise the following steps before measuring process: for the wafer of given model, carry out slice analysis after the cmp process, determine the excursion of metal closures metal layer thickness, and according to the measurement target of metal thickness and the range of tolerable variance of thickness after section result definition CMP.
3.
the method for measurement of metal thickness in semiconductor device as claimed in claim 1, wherein the figure of this test structure is the metal closures line structure on band barrier layer, it has predetermined pattern density, and this pattern density is defined as the ratio of width between metal closures line width and metal closures.
4.
the method for measurement of metal thickness in semiconductor device as claimed in claim 1, wherein, on the line of cut that this test structure is positioned at inside wafer individual chips unit or individual chips unit inner.
5.
the method for measurement of metal thickness in semiconductor device as claimed in claim 1, wherein, this metal is the metallic stacked structure on band barrier layer.
6.
the method for measurement of metal thickness in semiconductor device as claimed in claim 1, wherein, this test structure is rectangle or square.
7.
the method for measurement of metal thickness in semiconductor device as claimed in claim 1, wherein, this test structure is of a size of the one in 20um × 20um, 30um × 30um, 50um × 50um.
8.
the method for measurement of metal thickness in semiconductor device as claimed in claim 3, wherein the density range of this test structure is 10%-100%.
9.
the method for measurement of metal thickness in semiconductor device as claimed in claim 8, wherein, the density range of this test structure is 50%.
10.
the method for measurement of metal thickness in semiconductor device as claimed in claim 1, wherein, described CMP is that W-Al cushions CMP.
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| JP2967159B2 (en) * | 1990-06-18 | 1999-10-25 | 日本電信電話株式会社 | Film thickness measurement method |
| US6754305B1 (en) * | 1999-08-02 | 2004-06-22 | Therma-Wave, Inc. | Measurement of thin films and barrier layers on patterned wafers with X-ray reflectometry |
| JP4340040B2 (en) * | 2002-03-28 | 2009-10-07 | 富士通マイクロエレクトロニクス株式会社 | Manufacturing method of semiconductor device |
| JP2005015885A (en) * | 2003-06-27 | 2005-01-20 | Ebara Corp | Substrate processing method and apparatus |
| CN101992422B (en) * | 2009-08-25 | 2012-07-25 | 中芯国际集成电路制造(上海)有限公司 | Process control method and system of copper chemical mechanical polishing |
| CN102810492B (en) * | 2011-06-03 | 2015-08-05 | 中国科学院微电子研究所 | Process monitoring methods after metal gate CMP |
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