CN102820014A - Driving method and driving circuit for liquid crystal display, and liquid crystal display - Google Patents
Driving method and driving circuit for liquid crystal display, and liquid crystal display Download PDFInfo
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- CN102820014A CN102820014A CN2012103031977A CN201210303197A CN102820014A CN 102820014 A CN102820014 A CN 102820014A CN 2012103031977 A CN2012103031977 A CN 2012103031977A CN 201210303197 A CN201210303197 A CN 201210303197A CN 102820014 A CN102820014 A CN 102820014A
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Abstract
The embodiment of the invention provides a driving method and a driving circuit for a liquid crystal display, and the liquid crystal display. The method comprises the following steps of: dividing the time of any frame into two operation time buckets in a line inversion or dot inversion driving mode; and in one operation time bucket, sequentially enabling odd-line scanning lines, and writing odd-line data signals into odd-line pixels, and in the other operation time bucket, sequentially enabling even-line scanning lines, and writing even-line data signals into even-line pixels. The odd-line scanning lines and the even-line scanning lines of the liquid crystal display are driven respectively, the driving of each time is finished within 1/2 of the time length of one frame, and the load capacitance of the pixels is not required to be converted from positive voltage to negative voltage within one operation time bucket, and is most just converted from the positive voltage or the negative voltage to reference level, so that reduction in the power consumption of the data logic of the liquid crystal display can be learned according to a power consumption formula.
Description
Technical field
The present invention relates to lcd technology, relate to a kind of driving method, driving circuit and LCD of LCD particularly.
Background technology
Power consumption is an important performance indexes of LCD, and one of them important ingredient is the logic power consumption of data-signal.
In the LCD; Common storage capacitors comprises grid MM CAP (Cs on gate) and public pole MM CAP (Cs on common); Both difference are that the grid MM CAP is to utilize grid (gate) cabling, and the public pole MM CAP is to utilize the public electrode cabling.Each thin film transistor (TFT) (TFT) is connected with MM CAP Cst, represents the point of a demonstration, and a basic display unit (pixel) needs three such points to represent red (R), green (G), blue (B) three primary colors respectively; The Thin Film Transistor-LCD of 1024 * 768 resolution (TFT LCD) needs 1024 * 768 * 3 such points altogether.By the waveform that gate driving (Gate Driver) is seen off, the TFT with each row opens in regular turn, lets whole row's source drive (Source Driver) simultaneously the point of a full line is charged to required separately voltage, shows different gray levels.When this delegation's charging was accomplished, gate driving was just closed voltage, and the gate driving of next line is just opened voltage then, was charged by the point of identical row's source drive to next line again; So go down in regular turn, when the point of the last column of having substituted the bad for the good, just once more since the first row charging.The LCD of 1024 * 768 resolution always has the grid cabling of 768 row, 1024 * 3=3072 bar source electrode cabling; The LCD of the renewal frequency of 60Hz; The demonstration time of each picture is about 1/60=16.67ms; Because the grid cabling that consists of 768 row of picture is about 16.67ms/768=21.7 μ s so distribute to the switching time of each bar grid cabling, source drive is in the time of 21.7 μ s; Pixel electrode is discharged and recharged required voltage, demonstrate corresponding GTG.
Display voltage in the LCD is divided into two kinds of polarity, a positive polarity, a negative polarity; The voltage of pixel electrode is higher than the voltage of public electrode, is referred to as positive polarity, and the voltage of pixel electrode is lower than the voltage of public electrode, is referred to as negative polarity; Positive polarity or negative polarity all can have the GTG of one group of same brightness.So when the pressure reduction absolute value of two-layer electrode up and down is fixedly the time, no matter be that the voltage of pixel electrode is high, or the voltage of public electrode height, the GTG that is showed is living.But liquid crystal molecule turning under both of these case is fully opposite, through counter-rotating constantly, can avoid turning to when being fixed on a direction characteristic destruction of being caused when liquid crystal molecule always.In other words, when display frame is motionless always, still can by positive-negative polarity do not stop alternately, it is motionless to reach display frame, simultaneously the liquid crystal molecule result of characteristic that is not destroyed.Existing counter-rotating implementation comprises frame counter-rotating, row counter-rotating, row counter-rotating, some counter-rotating etc.
As shown in Figure 1, MM CAP Cst is arranged between pixel electrode and the public electrode, and load capacitance C.The power consumption formula of data-signal is P=Cf (Δ V)
2, wherein, the change frequency f of the size of load capacitance C and data-signal is constant.For existing row counter-rotating and some counter-rotating implementation, in the time of a frame, the voltage that puts on MM CAP Cst two ends changes between positive voltage Vp and negative voltage Vn continually, Δ V=Vp-Vn; The absolute value of positive voltage Vp and negative voltage Vn is basic identical.
In order to reduce the logic power consumption, in the prior art that has, the plug-in storer of embedded chip of stopping using only uses ram in slice accessing image data and code.Perhaps; In the prior art that has; Drive bistable state earlier to the extremely preset original state of palm property nematic crystal; The grey menu data of again desire being upgraded write in the pixel, and the effect voltage with pixel makes zero then, write the corresponding stable state of these grey menu data so that this bistable state returns to palm property nematic crystal.
There is following problem in prior art: write in the process of data-signal to LCD, the voltage of load capacitance needs between generating positive and negative voltage, to switch continually, and the power consumption that causes writing data-signal is excessive.
Summary of the invention
The present invention aims to provide a kind of driving method, driving circuit and LCD of LCD; Be used for solving prior art; Write in the process of data-signal to LCD; The voltage of load capacitance need switch between generating positive and negative voltage continually, causes writing the excessive defective of power consumption of data-signal.
For solving the problems of the technologies described above, embodiments of the invention provide a kind of driving method of LCD, comprising: in the type of drive of be expert at counter-rotating or some counter-rotating, time of arbitrary frame is divided into two running time sections; In a said running time section, open the odd line interlace line successively, the odd-numbered line data-signal is write the odd-numbered line pixel, and in another said running time section, open the even number line sweep trace successively, the even number line data-signal is write the even number line pixel.
In the described method, the said odd line interlace line of opening successively comprises: scan each odd line interlace line successively from top to the bottom of said LCD; The said even number line sweep trace of opening successively comprises: scan each even number line sweep trace successively from top to the bottom of said LCD.
In the described method; When the odd line interlace device that is connected with each said odd line interlace line during more than one; Drive each said odd line interlace device successively, open the said odd line interlace line that self connects successively by each said odd line interlace device and write said odd-numbered line data-signal with odd-numbered line pixel to correspondence; When the even number line scanner that is connected with each said even number line sweep trace during more than one; Drive each said even number line scanner successively, open the said even number line sweep trace that self connects successively by each said even number line scanner and write the even number line data-signal with even number line pixel to correspondence.
In the described method, in a said running time section, adopt counter to each said odd line interlace device performed scan operation count; In another said running time section, adopt said counter to each said even number line scanner performed scan operation count.
In the described method, in a said running time section, the every counting of said counter once, corresponding said odd line interlace device is carried out scan operation, and makes whole said odd line interlace devices in this running time section, carry out scan operation; In another said running time section, the every counting of said counter once, corresponding said even number line scanner to scan operation, and make whole said even number line scanners in this running time section, carry out scan operation.
A kind of driving circuit, it is with the mode driving liquid crystal device of row counter-rotating or some counter-rotating, and this driving circuit comprises: the scanning logic unit is used for the time of a frame is divided into two running time sections; The odd line interlace device is used in a said running time section, opening the odd line interlace line successively, and the odd-numbered line data-signal is write the odd-numbered line pixel; The even number line scanner is used in another said running time section, opening the even number line sweep trace successively, and the even number line data-signal is write the even number line pixel.
In the described driving circuit; Said odd line interlace device and/or even number line scanner are more than one; And this driving circuit also comprises: counter, be used in a said running time section, and performed scan operation is counted to each said odd line interlace device; And in another said running time section, performed scan operation is counted to each said even number line scanner.
In the described driving circuit; Said counter also comprises: the frequency multiplication module; Be used in a said running time section; The counting of said counter is set, make each said counting corresponding a said odd line interlace device carry out scan operation, and make whole said odd line interlace devices in this running time section, carry out scan operation; And in another said running time section, the counting of said counter is set, make each said counting corresponding a said even number line scanner to scan operation, and make whole said even number line scanners in this running time section, carry out scan operation.
A kind of LCD comprises driving circuit, driving circuit, and with the mode driving liquid crystal device of row counter-rotating or some counter-rotating, this driving circuit comprises: the scanning logic unit is used for the time of a frame is divided into two running time sections; The odd line interlace device is used in a said running time section, opening the odd line interlace line successively, and the odd-numbered line data-signal is write the odd-numbered line pixel; The even number line scanner is used in another said running time section, opening the even number line sweep trace successively, and the even number line data-signal is write the even number line pixel.
The beneficial effect of technique scheme of the present invention is following: odd line interlace line and even number line sweep trace to LCD drive respectively; Because driving each time is in about 1/2nd length of the time of a frame, to accomplish; The load capacitance of pixel does not need to accomplish continually the conversion that is pressed onto negative voltage from positive electricity in a running time section; And just accomplished between the positive voltage or the conversion of (being at most to be pressed onto reference level) between the negative voltage from positive voltage or negative electricity, therefore can know the power consumption of the data logic that has reduced LCD according to the power consumption formula.
Description of drawings
The structural representation of Fig. 1 remarked pixel;
Fig. 2 representes that sweep trace is connected synoptic diagram with IC;
Fig. 3 represent a kind of on LCD the method flow synoptic diagram of display data signal;
Fig. 4 representes the scan operation synoptic diagram in the running time section;
Fig. 5 representes the synoptic diagram that is connected between a plurality of horizontal scanning lines and a plurality of IC;
Fig. 6 representes to carry out in two running time sections the sequential chart of repeatedly scan operation;
Fig. 7 is illustrated in the synoptic diagram of the driving of accomplishing in 1/2nd length of time of a frame;
Odd line interlace line 1
Even number line sweep trace 2
MM CAP 4
Data line 5
Thin film transistor (TFT) 9
Embodiment
For technical matters, technical scheme and advantage that the present invention will be solved is clearer, will combine accompanying drawing and specific embodiment to be described in detail below.
As shown in Figure 1, the structure of pixel comprises load capacitance 3, MM CAP 4, data line 5, gate line 6, public electrode 7, pixel electrode 8, thin film transistor (TFT) 9, source electrode 10; But should be understood that the source electrode 10 here is merely schematically, in the reality, for thin film transistor (TFT) 9, source/drain can transposition.
As shown in Figure 2; The sweep trace of panel is divided into odd line interlace line 1 and even number line sweep trace 2, all is connected with integrated circuit (IC), and panel odd-numbered line and even number line are separately driven; Comprise: odd line interlace line 1 is connected with gate driving IC1, even number line sweep trace 2 is connected with gate driving IC2.Gate driving IC1 is the odd line interlace device, and gate driving IC2 is the even number line scanner.
The embodiment of the invention provide a kind of on LCD the method for display data signal, as shown in Figure 3, this method comprises:
And in another said running time section, open even number line sweep trace 2 successively, the even number line data-signal is write the even number line pixel.
Use the technical scheme that is provided; Odd line interlace line 1 to LCD drives respectively with even number line sweep trace 2; Because driving each time is in 1/2nd length of the time of a frame, to accomplish; As shown in Figure 7; The load capacitance 3 of pixel need not accomplished the conversion that is pressed onto negative voltage from positive electricity in a running time section, and has just accomplished the perhaps conversion of (being at most to be pressed onto reference level from positive voltage or negative electricity) between the negative voltage between the positive voltage, therefore can know the power consumption of the data logic that has reduced LCD according to the power consumption formula.The time of one frame is divided into two five equilibriums, forms two running time sections of a frame, in each running time section, drive odd line interlace line 1 and even number line sweep trace 2 respectively behind the five equilibrium.Odd-numbered line data-signal or even number line data-signal are the pulse sweep signals; Wherein, the pulse sweep signal is higher than reference level, perhaps is lower than reference level.
Certainly, those skilled in the art should be understood that when total number of scanning lines is odd number and uneven number, according to the ratio of parity rows the time of one frame divided to get final product, and do not require and accomplish accurate bisection.
In a preferred embodiment, as shown in Figure 4, step 302 specifically comprises:
The said odd line interlace line 1 of opening successively comprises: scan each odd line interlace line 1 successively from top to the bottom of said LCD;
The said even number line sweep trace 2 of opening successively comprises: scan each even number line sweep trace 2 successively from top to the bottom of said LCD.
In other words, data-signal has been divided into two parts in the time of a frame, and what a part was corresponding is odd-numbered line pixel electrode 8, and what another part was corresponding is even number line pixel electrode 8; In time, write corresponding odd-numbered line data at preceding field, in later half frame time, write corresponding even number of lines certificate.
The power consumption formula P=Cf (Δ V) of load capacitance 3
2, wherein, load capacitance 3 is confirmed with the signal change frequency.Adopt the technology of the foregoing description, data-signal, has reduced much for the some counter-rotating implementation of prior art at the changing value Δ V of field in the time, has therefore reduced the power consumption of data logics.
In an application scenarios, use the technology that is provided, comprising:
Step 1 carries out the time of a frame to form two running time sections behind two five equilibriums, and each running time section is the time of half frame;
In other words, between 0 and 1, switch, write data-signal and switch and subtend odd-numbered line pixel still is the even number line pixel through the value of counter; For follow-up each frame also so cycling.
As shown in Figure 5, the odd line interlace device that is connected with each said odd line interlace line 1 can be more than one, perhaps, with the even number line scanner that each said even number line sweep trace 2 is connected can be more than one.
In a preferred embodiment; When the odd line interlace device that is connected with each said odd line interlace line 1 during more than one; Drive each said odd line interlace device successively, open the said odd line interlace line 1 that self connects successively by each said odd line interlace device and write said odd-numbered line data-signal with odd-numbered line pixel to correspondence;
When the even number line scanner that is connected with each said even number line sweep trace 2 during more than one; Drive each said even number line scanner successively, open the said even number line sweep trace 2 that self connects successively by each said even number line scanner and write the even number line data-signal with even number line pixel to correspondence.
Panel at LCD is bigger; Under the resolution condition with higher; Can divide once more odd line interlace line 1 and even number line sweep trace 2; Odd line interlace line 1 connects a plurality of gate driving IC1 (odd line interlace device), and even number line sweep trace 2 connects a plurality of gate driving IC2 (even number line scanner); In the scanning process, still earlier successively to each odd line interlace line 1 charging, and then to each even number line sweep trace 2 chargings.
In a preferred embodiment, in a said running time section, adopt counter to each said odd line interlace device performed scan operation count;
In another said running time section, adopt said counter to each said even number line scanner performed scan operation count.
In the time of a frame, adopt counter that cycle count is carried out in the performed scan operation of each scanner in each said running time section.
Number according to odd line interlace device and even number line scanner; The meter digital of counter is set; With the counting that control signal such as vertical signal initial pulse (STVP) to counter output carry out multiple frequence, said STVP is the signal of a pin of the logical drive of TFT LCD.
In a preferred embodiment, in a said running time section, the every counting of said counter once, corresponding said odd line interlace device is carried out scan operation, and makes whole said odd line interlace devices in this running time section, carry out scan operation;
In another said running time section, the every counting of said counter once, corresponding said even number line scanner to scan operation, and make whole said even number line scanners in this running time section, carry out scan operation.
As shown in Figure 6, in a running time section, the odd line interlace device is carried out scan operation according to sequential, sees sweep signal S successively off
G1, S
G3, S
G5..., and S
G2n-1
If the number of odd line interlace device is more than one; That is, above-mentioned sweep signal is seen off respectively by each odd line interlace device, to open TFT and to receive data-signal from corresponding data line; In a running time section, whole odd line interlace devices all should be accomplished and see sweep signal off;
In another said running time section, the even number line scanner is carried out scan operation according to sequential, sees sweep signal S successively off
G2, S
G4, S
G6..., and S
G2n
If the number of even number line scanner is more than one; That is, above-mentioned sweep signal is seen off respectively by each even number line scanner, to open TFT and to receive data-signal from corresponding data line; In this another running time section, whole even number line scanners all should be accomplished and see sweep signal off.Use the technology that is provided, in an application scenarios, the odd line interlace device is more than one, and the even number line scanner is more than one; LCD with 1024 * 768 resolution is an example, and 1 total 768/2=384 is individual for the odd line interlace line, and 2 total 768/2=384 are individual for the even number line sweep trace.
Be without loss of generality, set a scanner and be connected, then have 12 odd line interlace devices with 32 sweep traces, and 12 even number line scanners.
The time of one frame is carried out forming 2 running time sections behind the five equilibrium, and each said running time section is divided into 12 sub-running time sections again, each child-operation time period be a frame time 1/24, and distribute to a scanner;
Counter can write down 12+12=24 number altogether.
Comprise:
Step 1, the counting of counter are that counter drives each odd line interlace device successively in 0 ~ 11 the process, are driven the odd line interlace line 1 that self connects successively by each odd line interlace device.Wherein,
At counting is 0 o'clock, and the odd-numbered line pixel that connects to the 1st odd line interlace line 1 writes data-signal;
At counting is 1 o'clock, and the odd-numbered line pixel that connects to the 2nd odd line interlace line 1 writes data-signal;
By that analogy, until being 11 o'clock at counting, the odd-numbered line pixel that connects to the 12nd odd line interlace line 1 writes data-signal;
The preceding field of the time of one frame finishes.
At counting is 12 o'clock, writes data-signal to the 1st even number line pixel;
At counting is 13 o'clock, writes data-signal to the 2nd even number line pixel;
By that analogy, until being, write data-signal at 23 o'clock to the 12nd even number line pixel at counting;
The later half frame end of the time of one frame.
One embodiment of the present of invention also provide a kind of driving circuit, and it is with the mode driving liquid crystal device of row counter-rotating or some counter-rotating, and this driving circuit comprises:
The scanning logic unit is used for the time of a frame is divided into two running time sections;
The odd line interlace device is used in a said running time section, opening odd line interlace line 1 successively, and the odd-numbered line data-signal is write the odd-numbered line pixel;
The even number line scanner is used in another said running time section, opening even number line sweep trace 2 successively, and the even number line data-signal is write the even number line pixel.
In a preferred embodiment, odd line interlace device and/or even number line scanner are more than one, and this driving circuit also comprises:
Counter is used in a said running time section, and performed scan operation is counted to each said odd line interlace device, and in another said running time section, performed scan operation is counted to each said even number line scanner.
In a preferred embodiment, counter also comprises:
The frequency multiplication module; Be used in a said running time section; The counting of said counter is set, make each said counting corresponding a said odd line interlace device carry out scan operation, and make whole said odd line interlace devices in this running time section, carry out scan operation; And
In another said running time section, the counting of said counter is set, make each said counting corresponding a said even number line scanner to scan operation, and make whole said even number line scanners in this running time section, carry out scan operation.
One embodiment of the present of invention also provide a kind of LCD, and are as shown in Figure 2, comprise driving circuit, and driving circuit comprises:
The scanning logic unit is used for the time of a frame is divided into two running time sections;
The odd line interlace device is used in a said running time section, opening odd line interlace line 1 successively, and the odd-numbered line data-signal is write the odd-numbered line pixel;
The even number line scanner is used in another said running time section, opening even number line sweep trace 2 successively, and the even number line data-signal is write the even number line pixel.
In a preferred embodiment, also comprise:
Counter is used in a said running time section, and performed scan operation is counted to each said odd line interlace device, and in another said running time section, performed scan operation is counted to each said even number line scanner.
In a preferred embodiment, counter also comprises:
The frequency multiplication module; Be used in a said running time section; The counting of said counter is set, make each said counting corresponding a said odd line interlace device carry out scan operation, and make whole said odd line interlace devices in this running time section, carry out scan operation; And
In another said running time section, the counting of said counter is set, make each said counting corresponding a said even number line scanner to scan operation, and make whole said even number line scanners in this running time section, carry out scan operation.
Adopt the advantage after this programme to be: in 1/2nd length of time of a frame; Open the odd line interlace line 1 or the even number line sweep trace 2 of LCD; Because opening each time is completion in 1/2nd length of time of a frame; The load capacitance 3 of pixel need not accomplished the conversion that is pressed onto negative voltage from positive electricity in a running time section; Be pressed onto the conversion of reference level and only need accomplish, so can reduce the power consumption of the data logic of LCD from positive voltage or negative electricity.
The above is a preferred implementation of the present invention; Should be pointed out that for those skilled in the art, under the prerequisite that does not break away from principle according to the invention; Can also make some improvement and retouching, these improvement and retouching also should be regarded as falling into protection scope of the present invention.
Claims (9)
1. the driving method of a LCD is characterized in that, this method comprises:
In the type of drive of counter-rotating or some counter-rotating of being expert at, time of arbitrary frame is divided into two running time sections;
In a said running time section, open the odd line interlace line successively, the odd-numbered line data-signal is write the odd-numbered line pixel, and in another said running time section, open the even number line sweep trace successively, the even number line data-signal is write the even number line pixel.
2. method according to claim 1 is characterized in that,
The said odd line interlace line of opening successively comprises: scan each odd line interlace line successively from top to the bottom of said LCD;
The said even number line sweep trace of opening successively comprises: scan each even number line sweep trace successively from top to the bottom of said LCD.
3. method according to claim 2 is characterized in that,
When the odd line interlace device that is connected with each said odd line interlace line during more than one; Drive each said odd line interlace device successively, open the said odd line interlace line that self connects successively by each said odd line interlace device and write said odd-numbered line data-signal with odd-numbered line pixel to correspondence;
When the even number line scanner that is connected with each said even number line sweep trace during more than one; Drive each said even number line scanner successively, open the said even number line sweep trace that self connects successively by each said even number line scanner and write the even number line data-signal with even number line pixel to correspondence.
4. method according to claim 3 is characterized in that,
In a said running time section, adopt counter to each said odd line interlace device performed scan operation count;
In another said running time section, adopt said counter to each said even number line scanner performed scan operation count.
5. method according to claim 4 is characterized in that,
In a said running time section, the every counting of said counter once, corresponding said odd line interlace device is carried out scan operation, and makes whole said odd line interlace devices in this running time section, carry out scan operation;
In another said running time section, the every counting of said counter once, corresponding said even number line scanner to scan operation, and make whole said even number line scanners in this running time section, carry out scan operation.
6. driving circuit, it is characterized in that with the mode driving liquid crystal device of row counter-rotating or some counter-rotating this driving circuit comprises:
The scanning logic unit is used for the time of a frame is divided into two running time sections;
The odd line interlace device is used in a said running time section, opening the odd line interlace line successively, and the odd-numbered line data-signal is write the odd-numbered line pixel;
The even number line scanner is used in another said running time section, opening the even number line sweep trace successively, and the even number line data-signal is write the even number line pixel.
7. driving circuit according to claim 6 is characterized in that, said odd line interlace device and/or even number line scanner are more than one, and this driving circuit also comprises:
Counter is used in a said running time section, and performed scan operation is counted to each said odd line interlace device, and in another said running time section, performed scan operation is counted to each said even number line scanner.
8. driving circuit according to claim 7 is characterized in that, said counter also comprises:
The frequency multiplication module; Be used in a said running time section; The counting of said counter is set, make each said counting corresponding a said odd line interlace device carry out scan operation, and make whole said odd line interlace devices in this running time section, carry out scan operation; And
In another said running time section, the counting of said counter is set, make each said counting corresponding a said even number line scanner to scan operation, and make whole said even number line scanners in this running time section, carry out scan operation.
9. LCD, it comprises each the described driving circuit like claim 6 to 8.
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| CN105931607A (en) * | 2016-05-31 | 2016-09-07 | 昆山龙腾光电有限公司 | Driving method of display panel and liquid crystal display device |
| WO2018202150A1 (en) * | 2017-05-05 | 2018-11-08 | 惠科股份有限公司 | Display panel driving method, driving device and display device |
| CN113870757A (en) * | 2020-06-30 | 2021-12-31 | 京东方科技集团股份有限公司 | Driving method and driving circuit of display panel and display device |
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