CN102663497A - Self routing unit circuit and control method thereof - Google Patents
Self routing unit circuit and control method thereof Download PDFInfo
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- CN102663497A CN102663497A CN2012100976734A CN201210097673A CN102663497A CN 102663497 A CN102663497 A CN 102663497A CN 2012100976734 A CN2012100976734 A CN 2012100976734A CN 201210097673 A CN201210097673 A CN 201210097673A CN 102663497 A CN102663497 A CN 102663497A
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Abstract
The invention discloses a self routing unit circuit and a control method thereof. The circuit of the present invention is suitable for a large-scale interconnected neural network system. The synaptic connection of a front neuron and three or more back neurons employ the self routing circuit unit. Three or more branches in parallel connection are provided, and each parallel branch is formed by one or more bipolar resistive memristors. Each branch has a different structure, with differences of the number of the resistive memristors, the connection directions of polarities and parallel and series connection modes, the self routing unit circuit corresponding to specific voltage is formed. According to the circuit of the invention, the circuit can automatically choose to transmit a signal to the back neurons, the circuit is simple, a structure is small and large-scale integration is facilitated; the circuit is a non volatile circuit, and once set, the circuit is not needed to be reset again when a condition is unchanged.
Description
Technical field
The present invention relates to a kind of routing unit circuit, relate in particular to a kind of be applicable in the extensive interconnected nerve network system from the routing unit circuit.
Background technology
Digital machine is the important products of the human scientific-technical progress of twentieth century, and the influence that it produced is embodied in the every aspect of people's life.Than digital machine, neuro-computer has very big potentiality at aspects such as intellectuality, large-scale calculations ability, storage and calculating are integrated, probably becomes the strong replacer of digital machine.In nerve network system, its elementary cell formula neuron one by one, have between the neuron interconnected on a large scale, this interconnected cynapse that is called, signal in the past neuron connects through cynapse and is delivered to the back neuron.Just make neuro-computer have very strong calculating, identification, storage capacity just because of these large-scale cynapses connections.Preceding neuron need link to each other with a plurality of backs neurons, and selectively backward neuron transmit signal, these cynapses connections can be regarded the routing unit circuit as; As shown in Figure 1; Neuron before the N0 representative, N1 to Nn are the back neuron, and W1 to Wn is the routing unit circuit.But; Neuron and the immature and complicated circuit of a plurality of neuronic cynapse interconnection techniques in back before of the prior art; And the back neuron that preceding neuron can not automatically be selected to transmit signal to those transmits signal, therefore seriously restricted the development and the application of nerve network system.
Summary of the invention
To the problem that above prior art exists, it is a kind of from the routing unit circuit that the present invention provides, thereby solve the large-scale problem that connects and independently select transmission path in the nerve network system.
It is a kind of from the routing unit circuit that one object of the present invention is to provide.
Of the present invention from the routing unit circuit; In extensive interconnected nerve network system, neuron is connected with the neuronic cynapse in back more than two before being used for, and comprising: positive input terminal and negative input end; Positive input terminal links to each other with preceding neuron, and negative input end links to each other with the back neuron; At the branch road that has two or more the parallel connection identical between two ports with the back neuron number; Every parallel branch is made up of one or more bipolar resistive random memristor; Every branch road has various structure, and the difference and forming of closure and series-parallel system that becomes number, the polarity of memristor along with resistance has with the specific voltage signal corresponding a kind of from the routing unit circuit.
Bipolar memristor of the present invention can be that tantalum oxide resistance-variable storing device, hafnia resistance-variable storing device, titania resistance-variable storing device etc. have a kind of in the various resistance-variable storing devices that the many-valued resistance of bipolar operation becomes, also can be other storeies that have similar above-mentioned device bipolar operation and have non-volatile many-valued storage characteristics.
Another object of the present invention is to provide a kind of from routing unit circuit control method.
Of the present invention above-mentionedly comprise from routing unit circuit control method: circuit working is divided into attitude being set and triggering the calculating attitude that the back neuron calculates of the resistance of setting each branch road.
Circuit is introduced into attitude is set during beginning; Circuit control all back neuron will be from the negative input end difference ground connection of routing circuit; According to the back neuron of selection needs transmission signals, set pulse as signalization, be added to simultaneously when connecting the neuronic different branch road in each back through each positive input terminal during so current neuron emission signalization; Each branch road is because the different resistance of structure have different responses, and the resistance sizes of promptly setting each branch road of back is different.Circuit get into to calculate attitude then, the voltage that preceding neuron emission is set as signal calculated through from the routing unit circuit to after neuron, back neuron will be after the negative input end of routing circuit be received the input end of neuronic counting circuit; Because the resistance of each branch road is different; Being delivered to the back neuronal signal so can be different, and when signal was higher than the neuronic trigger voltage in back, back neuron calculated; This branch road is a path, and the branch road that is lower than the signal place of trigger voltage is open circuit.Thereby played effect from route.
Advantage of the present invention:
Circuit of the present invention is applicable in the extensive interconnected nerve network system; Preceding neuron is connected employing from the routing unit circuit with the neuronic cynapse in back more than two; Branch road with parallel connection more than two; Every parallel branch is made up of one or more bipolar resistive random memristor, and every branch road has various structure, and the difference and forming of closure and series-parallel system that becomes number, the polarity of memristor along with resistance has with specific voltage corresponding a kind of from the routing unit circuit.Circuit of the present invention can automatically be selected neuron transmission signal backward, and circuit is simple, structure is little and it is integrated on a large scale to be convenient to; And be non-volatile circuit, in case set, under the constant situation of condition, need not reset.
Description of drawings
Fig. 1 is structural representation that preceding neuron links to each other with a plurality of backs neuron in the prior art;
Fig. 2 (a) is that the positive pole of single bipolar resistive random memristor links to each other with positive input terminal, and the circuit diagram that negative pole links to each other with negative input end, Fig. 2 (b) are the curve map of relation of height and width of resistance and the input pulse of the bipolar resistive random memristor shown in Fig. 2 (a); The circuit diagram of the closure of Fig. 3 (a) and (b) and the number that (c) is respectively the bipolar resistive random memristor, polarity and the various combination of series-parallel system, Fig. 3 (d) be like Fig. 3 (a) and (b) and the resistance of the CC of the bipolar resistive random memristor (c) along with the response curve of the variation of the height of input pulse and width;
Fig. 4 is the synoptic diagram from a branch road of routing unit circuit of the present invention;
Fig. 5 be a preceding neuron with two after the synoptic diagram that is connected of neuron.
Embodiment
Below in conjunction with accompanying drawing, the present invention is further specified through instance.
The bipolar resistive random memristor has two polarity, if the alive absolute value of institute is enough big, when positive pole connects positive voltage; During minus earth, the resistance of bipolar resistive random memristor can reduce, otherwise; When negative pole connects positive voltage, during plus earth, the resistance of bipolar resistive random memristor can increase.
Fig. 2 (a) is that the positive pole of single bipolar resistive random memristor links to each other with positive input terminal, and the circuit diagram that negative pole links to each other with negative input end, Fig. 2 (b) are the curve map of relation of height and width of resistance and the input pulse of the bipolar resistive random memristor shown in Fig. 2 (a).Shown in Fig. 2 (b), when signal is imported by positive input terminal, and the two ends of bipolar resistive random memristor are when being connected to positive voltage, and the resistance of bipolar resistive random memristor has a bar response curve with the height of input pulse and the variation of width.
Each branch road in the routing unit circuit of the present invention is owing to the number of bipolar resistive random memristor, the closure of polarity and the various combination of series-parallel system have various structure.The circuit diagram of the closure of Fig. 3 (a) and (b) and the number that (c) is respectively the bipolar resistive random memristor, polarity and the various combination of series-parallel system, Fig. 3 (d) be like Fig. 3 (a) and (b) and the resistance of the CC of the bipolar resistive random memristor (c) along with the response curve of the variation of the height of input pulse and width.Shown in Fig. 3 (d), along with the number of memristor, the closure of polarity and the difference of series-parallel system, its resistance is along with the response curve of the variation of the height of input pulse and width also changes thereupon.That is to say that the different structure of bipolar resistive random memristor has different resistance curves to input pulse.For specific input pulse, the CC of the bipolar resistive random memristor of different structure has different resistance.
Fig. 4 is the synoptic diagram from a branch road of routing unit circuit of the present invention.
Following mask body provides behind an a kind of preceding neuron and two in the neuronic neural network from routing unit circuit control method.
The connection of neural network is as shown in Figure 5, and preceding neuron N0 links to each other with N2 with back neuron N1 respectively with W2 through two branch road W1 from routing unit.The circuit structure of W1 and W2 is respectively shown in Fig. 3 (b) and Fig. 3 (c).
Divider resistance on connecting respectively on each branch road, resistance becomes the electric resistance partial pressure of memristor on each divider resistance and each branch road, thus resulting voltage is added on the neuron of back on the divider resistance, as neuronic voltage after triggering.
Circuit gets into and calculates attitude during beginning; Back neuron N1 and N2 will be from the negative input end of routing unit W1 and W2 ground connection respectively, and it highly is 3.3V that preceding neuron N0 imports with W2 to W1 respectively, and pulsewidth is that the pulse of 1 μ s is as signalization; Because the self structure of W1 and W2 is different; After signalization finished, W1 was set to 1K Ω, and W2 is set to 9K Ω.Circuit enters into the calculating attitude then; Back neuron N1 and N2 receive the input end of counting circuit respectively with W1 and W2, and preceding neuron emission signal calculated is the DC voltage of 0.6V, and W1 and W2 are connected respectively at the divider resistance of a 1K Ω; With cascaded structure 1K Ω ohmically dividing potential drop respectively input to after neuron N1 and the N2 of signal calculated through W1 and W2 and 1K Ω; The input voltage of N1 counting circuit input end acquisition at this moment is 0.3V, and the input voltage that N2 counting circuit input end obtains is 0.06V, and the trigger voltage of back neuron N1 and N2 counting circuit is 0.2V; The counting circuit of N1 is triggered so; Form path, and the counting circuit of N2 can not be triggered, form open circuit.This shows that circuit realized the function from route.
It should be noted that at last; The purpose of publicizing and implementing mode is to help further to understand the present invention; But it will be appreciated by those skilled in the art that: in the spirit and scope that do not break away from the present invention and appended claim, various replacements and to revise all be possible.Therefore, the present invention should not be limited to the disclosed content of embodiment, and the scope that the present invention requires to protect is as the criterion with the scope that claims define.
Claims (6)
1. one kind from the routing unit circuit; In extensive interconnected nerve network system; Neuron is connected with the neuronic cynapse in back more than two before being used for, and it is characterized in that said circuit comprises: positive input terminal and negative input end; Positive input terminal links to each other with preceding neuron, and negative input end links to each other with the back neuron; At the branch road that has two or more the parallel connection identical between two ports with the back neuron number; Every parallel branch is made up of one or more bipolar resistive random memristor; Every branch road has various structure, and the difference and forming of closure and series-parallel system that becomes number, the polarity of memristor along with resistance has with the specific voltage signal corresponding a kind of from the routing unit circuit.
2. circuit as claimed in claim 1; It is characterized in that; Said bipolar memristor is that tantalum oxide resistance-variable storing device, hafnia resistance-variable storing device, titania resistance-variable storing device etc. have a kind of in the various resistance-variable storing devices that the many-valued resistance of bipolar operation becomes or other storeies that have similar above-mentioned device bipolar operation and have non-volatile many-valued storage characteristics.
3. a claim 1 is described is characterized in that from routing unit circuit control method said control method comprises: circuit working is divided into attitude being set and triggering the back neuron and advance the calculating attitude of calculation of the resistance of setting each branch road.
4. control method as claimed in claim 3; It is characterized in that; In the said attitude that is provided with, circuit control all back neuron will be from the negative input end difference ground connection of routing circuit, according to the back neuron of selection needs transmission signals; Set pulse as signalization; Be added to simultaneously when connecting the neuronic different branch road in each back through each positive input terminal during so current neuron emission signalization, each branch road is because the different resistance of structure have different responses, and the resistance sizes of promptly setting each branch road of back is different.
5. control method as claimed in claim 3 is characterized in that, in said calculating attitude; Before the voltage set of neuron emission as signal calculated through from the routing unit circuit to after neuron; Back neuron will be received the input end of the neuronic counting circuit in back from the negative input end of routing circuit, because the resistance of each branch road is different, being delivered to the back neuronal signal so can be different; When signal is higher than the neuronic trigger voltage in back; Back neuron calculates, and this branch road is a path, and the branch road that is lower than the signal place of trigger voltage is open circuit.
6. control method as claimed in claim 5 is characterized in that, divider resistance on connecting respectively on each branch road, and resistance becomes the electric resistance partial pressure of memristor on each divider resistance and each branch road, thus resulting voltage is added on the neuron of back on the divider resistance.
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| CN201210097673.4A CN102663497B (en) | 2012-04-05 | 2012-04-05 | Self routing unit circuit and control method thereof |
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Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
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| WO2014080300A1 (en) * | 2012-11-21 | 2014-05-30 | International Business Machines Corporation | Neural network |
| US9159020B2 (en) | 2012-09-14 | 2015-10-13 | International Business Machines Corporation | Multiplexing physical neurons to optimize power and area |
| CN105825885A (en) * | 2016-03-21 | 2016-08-03 | 华中科技大学 | Multilevel memory cell based on memristor, read-write circuit and operation method thereof |
| US9852006B2 (en) | 2014-03-28 | 2017-12-26 | International Business Machines Corporation | Consolidating multiple neurosynaptic core circuits into one reconfigurable memory block maintaining neuronal information for the core circuits |
| CN108229669A (en) * | 2016-12-15 | 2018-06-29 | 许富菖 | The self study of neural network array |
| CN110111827A (en) * | 2019-03-28 | 2019-08-09 | 上海集成电路研发中心有限公司 | A kind of multivalue resistive structure based on multiple monodrome resistance-variable storing devices |
| CN110428049A (en) * | 2019-08-21 | 2019-11-08 | 南京邮电大学 | A kind of voltage-type neural network and its operating method based on polymorphic memristor |
| CN113311702A (en) * | 2021-05-06 | 2021-08-27 | 清华大学 | Artificial neural network controller based on Master-Slave neuron |
| CN113497763A (en) * | 2020-03-19 | 2021-10-12 | 华为技术有限公司 | Route searching device and method and data forwarding equipment |
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Cited By (14)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US10713561B2 (en) | 2012-09-14 | 2020-07-14 | International Business Machines Corporation | Multiplexing physical neurons to optimize power and area |
| US9159020B2 (en) | 2012-09-14 | 2015-10-13 | International Business Machines Corporation | Multiplexing physical neurons to optimize power and area |
| US8990130B2 (en) | 2012-11-21 | 2015-03-24 | International Business Machines Corporation | Consolidating multiple neurosynaptic cores into one memory |
| WO2014080300A1 (en) * | 2012-11-21 | 2014-05-30 | International Business Machines Corporation | Neural network |
| US9852006B2 (en) | 2014-03-28 | 2017-12-26 | International Business Machines Corporation | Consolidating multiple neurosynaptic core circuits into one reconfigurable memory block maintaining neuronal information for the core circuits |
| CN105825885A (en) * | 2016-03-21 | 2016-08-03 | 华中科技大学 | Multilevel memory cell based on memristor, read-write circuit and operation method thereof |
| CN105825885B (en) * | 2016-03-21 | 2018-04-10 | 华中科技大学 | Multilevel memory cell, read/write circuit and its operating method based on memristor |
| CN108229669A (en) * | 2016-12-15 | 2018-06-29 | 许富菖 | The self study of neural network array |
| CN110111827A (en) * | 2019-03-28 | 2019-08-09 | 上海集成电路研发中心有限公司 | A kind of multivalue resistive structure based on multiple monodrome resistance-variable storing devices |
| CN110111827B (en) * | 2019-03-28 | 2021-04-30 | 上海集成电路研发中心有限公司 | Multi-value resistive random access memory based on multiple single-value resistive random access memories |
| CN110428049A (en) * | 2019-08-21 | 2019-11-08 | 南京邮电大学 | A kind of voltage-type neural network and its operating method based on polymorphic memristor |
| CN113497763A (en) * | 2020-03-19 | 2021-10-12 | 华为技术有限公司 | Route searching device and method and data forwarding equipment |
| CN113311702A (en) * | 2021-05-06 | 2021-08-27 | 清华大学 | Artificial neural network controller based on Master-Slave neuron |
| CN113311702B (en) * | 2021-05-06 | 2022-06-21 | 清华大学 | Artificial neural network controller based on Master-Slave neuron |
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| CN102663497B (en) | 2014-04-30 |
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