CN102663051B - Method and system for searching content addressable memory - Google Patents
Method and system for searching content addressable memory Download PDFInfo
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- CN102663051B CN102663051B CN201210089402.4A CN201210089402A CN102663051B CN 102663051 B CN102663051 B CN 102663051B CN 201210089402 A CN201210089402 A CN 201210089402A CN 102663051 B CN102663051 B CN 102663051B
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Abstract
The invention provides a method and a system for searching a content addressable memory; the method comprises the following steps: acquiring a find key; dividing the find key into N sub-find keys, wherein a width of a address of each sub-find key corresponding to a content addressable memory (CAM) is equal to a static random access memory (SRAM) of the width of the above-mentioned sub-find key; using the sub-find keys as read addresses in parallel so as to process read operation in the corresponding SRAM, and therefore, acquiring a matching result of each memory address and each sub-find key on the SRAM correspondingly to each sub-find key; and combining acquired matching results and acquiring the matching result of the find key in the CAM.
Description
Technical field
The present invention relates to integrated circuit (IC) design field, relate in particular to a kind of method and system of search content addressable memory.
Background technology
CAM(Content Addressable Memory, Content Addressable Memory), be a kind of computer memory of specific type, be widely used in computing machine and the communications field.The function of the memory RAM of standard is for returning to the data word being stored on this address in the address of reading providing according to user.Be different from RAM, the data word of the function of CAM for providing according to user, searches for whole storages to judge whether this data word is stored in wherein.If find this data word, return to match address, i.e. the position of this data word in storer, so CAM is exactly that the hardware of terms of software associative array is specialized.
Common CAM design concept for searching for whole storage in an operation, be each group data in readout memory, and the data that outside is received compare with it one by one, then according to comparative result, it is carried out to preferential decoding, preferential code translator produces binary matched position location and a match hit signal.Conventional CAM implementation method has two kinds, a kind of for storing data in SRAM, reads one by one the content in static RAM (SRAM) and search word to compare during search.Another kind of for storing data in Register, build in memory set, during search, will search word and be broadcast in each group Register and compare, then by preferential code translator according to comparative result generation matched position and the match hit signal of each group.
But all there is drawback in various degree in above-mentioned two kinds of implementation methods, first method is subject to RAM read port and counts quantitative limitation, and the time delay that completes CAM search procedure needs is very large, L=(memory depth/RAM read port number) * Tclk, need a plurality of clock period.In RAM device specification, determine, under the constant prerequisite of port, memory depth is larger, and CAM search delay is also just larger.Take and read 1 for one 1 to write the CAM that two-port SRAM realizes be example, if storage depth is 64, need 64 clock period just can complete once search.Second method is subject to the constraint of resource and area, although the memory set of using Register to build can walk abreast, to searching word, compares, and the chip area taking is larger than the SRAM of equal capacity.Search digital data width larger, this area difference is apart from just more obvious, for the resource of chip is distributed and placement-and-routing brings very large challenge.
Therefore, how fast CAM is a problem demanding prompt solution.
Summary of the invention
The invention provides a kind of method and system of search content addressable memory, the technical matters that solve is fast search CAM how.
For solving the problems of the technologies described above, the invention provides following technical scheme:
A method of search content addressable memory CAM, comprising:
Obtain and search word;
To search stroke and be divided into N son and search word, wherein every height is searched an address width in word corresponding content addressable memory CAM and is equaled the static RAM SRAM that this son is searched word width;
The son of usining concurrently search word as read address correspondence in SRAM, carry out read operation, obtain every height and search upper each memory address of the corresponding SRAM of word and this son is searched to the matching result of word;
The matching result obtaining is merged to processing, obtain this and search the matching result of word in CAM.
Preferably, described method also has following features: described every height is searched the corresponding SRAM of the word matching result that above each memory address is searched word to this son and obtained in the following way, comprising:
In each memory address of SRAM, an equal corresponding length is equal to the bit vector of CAM search depth, wherein each of bit vector represents an effective entrance of CAM successively, if a certain place value of bit vector equals 1, represent in equivalent locations, to exist with son and search the data that word is identical in CAM, search completes, and the match is successful; If all positions of bit vector all equal 0, illustrate in CAM and do not exist with son and search the data that word is identical, search completes, and it fails to match.
Preferably, described method also has following features: the matching result obtaining is merged to processing, obtain this and search the matching result of word in CAM and comprise:
To the N an obtaining bit vector carry out by turn with operation, obtain this and search the matching result of word in CAM.
Preferably, described method also has following features: after this searches the matching result of word in CAM, also comprise obtaining:
The matching result obtaining is reduced to computing or operation, obtain the search matching result of CAM, if result is 1, represent that the match is successful; If result is 0, represent that it fails to match.
Preferably, described method also has following features: after this searches the matching result of word in CAM, also comprise obtaining:
The matching result obtaining is carried out to preferential decoded operation, obtain an occurrence, this occurrence is searched the address of word in CAM as this.
A system of search content addressable memory CAM, comprising:
Acquisition device, searches word for obtaining;
Divide device, be connected with described acquisition device, for searching stroke, be divided into N son and search word, wherein every height is searched an address width in word corresponding content addressable memory CAM and is equaled the static RAM SRAM that this son is searched word width;
Read apparatus, is connected with described division device, for using concurrently son search word as read address correspondence at SRAM, carry out read operation, obtain every height and search upper each memory address of the corresponding SRAM of word and this son is searched to the matching result of word;
Treating apparatus, for the matching result obtaining is merged to processing, obtains this and searches the matching result of word in CAM.
Preferably, described system also has following features: described read apparatus obtains in the following way every height and searches upper each memory address of the corresponding SRAM of word and this son is searched to the matching result of word, comprising:
In each memory address of SRAM, an equal corresponding length is equal to the bit vector of CAM search depth, wherein each of bit vector represents an effective entrance of CAM successively, if a certain place value of bit vector equals 1, represent in equivalent locations, to exist with son and search the data that word is identical in CAM, search completes, and the match is successful; If all positions of bit vector all equal 0, illustrate in CAM and do not exist with son and search the data that word is identical, search completes, and it fails to match.
Preferably, described system also has following features:
Described treating apparatus, for the N an obtaining bit vector is carried out by turn with operation, obtain this and search the matching result of word in CAM.
Preferably, described system also has following features: described system also comprises:
With operating means, be connected with described treating apparatus, the matching result obtaining is reduced to computing or operation, obtain the search matching result of CAM, if result is 1, represent that the match is successful; If result is 0, represent that it fails to match.
Preferably, described system also has following features: described system also comprises:
Preferential code translator, is connected with described treating apparatus, for the matching result obtaining is carried out to preferential decoded operation, obtains an occurrence, and this occurrence is searched the address of word in CAM as this.
Be different from common CAM implementation method, embodiment provided by the invention does not search for the method for searching word by relatively storing one by one data, but will search word, split into a plurality of sons and search word, every height after fractionation is searched word, as reference address, SRAM is carried out to read operation, address numerical value is equal to that memory word of searching word and is strobed, this operation implies once complete search procedure, and system time expense is only the read latency of storer.
Accompanying drawing explanation
Fig. 1 is the schematic flow sheet of the embodiment of the method for search content addressable memory provided by the invention;
Fig. 2 divides the schematic diagram of searching word in the present invention;
Fig. 3 is the schematic diagram of bit vector in the present invention;
Fig. 4 is the schematic diagram that the bit vector obtaining is processed provided by the invention;
Fig. 5 is the schematic diagram of the processing mode of reduction and preferential decoded operation in the present invention;
Fig. 6 searches for the structural representation of the system of CAM in the present invention.
Embodiment
For making the object, technical solutions and advantages of the present invention clearer, the present invention is described in further detail below in conjunction with the accompanying drawings and the specific embodiments.It should be noted that, in the situation that not conflicting, the embodiment in the application and the feature in embodiment be combination in any mutually.
Fig. 1 is the schematic flow sheet of the embodiment of the method for search content addressable memory provided by the invention.Embodiment of the method shown in Fig. 1, comprising:
Step 101, obtain and search word;
Step 102, will search stroke and be divided into N son and search word, wherein every height is searched an address width in word corresponding content addressable memory CAM and is equaled the SRAM that this son is searched word width;
The storage size that wherein size of the address width of SRAM is SRAM is to 2 results of taking the logarithm; For example, the SRAM that storage size is 256, its address width is 8.
Step 103, using and divide rear son and search word as reading address concurrently, correspondence in SRAM, carry out read operation, obtain every height and search upper each memory address of the corresponding SRAM of word and this son is searched to the matching result of word;
Step 104, the matching result obtaining is merged to processing, obtain this and search the matching result of word in CAM.
Be different from common CAM implementation method, embodiment of the method provided by the invention is not searched for the method for searching word by relatively storing one by one data, but will search word, split into a plurality of sons and search word, every height after fractionation is searched word, as reference address, SRAM is carried out to read operation, address numerical value is equal to that memory word of searching word and is strobed, this operation implies once complete search procedure, and system time expense is only the read latency of storer.
Below embodiment of the method provided by the invention is described further:
The general 1R1W SRAM storer of take describes as example, and wherein the storage data width of this SRAM is equal to CAM search depth, i.e. the CAM number of open ended searched data at most.
The included a plurality of SRAM memory banks of whole CAM, as the degree of depth SRAM that is 256 and the degree of depth SRAM that is 128.
When search content numerical value is larger, search digital data width when larger, if will cause the SRAM degree of depth excessive (being equal to the width of searching word) with the single addressing of whole search content.Therefore will search stroke and be divided into N son and search word, every height is searched word correspondence a slice address width and is equaled the SRAM storer that this son is searched word width.
Fig. 2 divides the schematic diagram of searching word in the present invention.In schematic diagram shown in Fig. 2, take and 8 as radix, will search word (SearchWord) and be divided into N son and search word (SubWord) wherein, searching word width, be 39 o'clock, be divided into 5 parts, the width that every height is searched word is followed successively by 8,8,8,8,7.Be that front four sons are searched the SRAM that word corresponding stored space is 28, the SRAM that last corresponding stored space is 27.
Son after being divided is searched after word, with son, searches word for reading address, searches SRAM that word is corresponding walk abreast and carry out read operation at each height.
Wherein, in each memory address of SRAM, an equal corresponding length is equal to the bit vector of CAM search depth, wherein each of bit vector represents an effective entrance of CAM successively, and each the numerical value by configuration bit vector represents in equivalent locations, whether to exist with this son and search the data that word is identical in this SRAM.
Specifically, the content of storing in SRAM is the bit vector that width is equal to CAM search depth, and each of bit vector all refers to an effective entrance of CAM, and 1 represents that this entrance is effective, and 0 expression is invalid.In bit vector, be that the match address of this effective entrance in CAM indicated in 1 the position of position in bit vector.The a certain place value of bit vector equals 1, illustrates in CAM and in equivalent locations, exists with son and search the data that word is identical, and search completes, and the match is successful.The all positions of bit vector all equal 0, illustrate in CAM and do not exist with son and search the data that word is identical, and search completes, and it fails to match.
Fig. 3 is the schematic diagram of bit vector in the present invention.In schematic diagram shown in Fig. 3, data width is equal to the bit vector of CAM search depth D, and wherein each of bit vector all refers to an effective entrance in this SRAM, and wherein this property value is 1 o'clock, represents that this entrance is effective; This property value is 0 o'clock, represents that this entrance is invalid.
Parallel read-out N is searched the bit vector in the corresponding SRAM storer of word, and each bit vector has represented that its place searches the match information that word searched in word.Union operation to N bit vector, i.e. the binary operation number of the identical data width of N input by turn with (&) operation, what calculate a complete width searches the match information of word in CAM.
Fig. 4 is the schematic diagram that the bit vector obtaining is processed provided by the invention.In schematic diagram shown in Fig. 4, N son searched to the corresponding bit vector of word (BitVecN) and carry out AND-operation by turn, when Output rusults is 1, what calculate complete width searches the corresponding bit vector of word (BitVector)
After union operation completes, be combined result and reduce computing or (|) operation and preferential decoding (pri-encoder) operation.The reduction computing of merge bit vector or the result of operation are the search matching result of CAM, and 1 represents that the match is successful, and 0 represents that it fails to match.The address of the occurrence that the result of the preferential decoded operation of merge bit computing is CAM in CAM.
Fig. 5 is the schematic diagram of the processing mode of reduction and preferential decoded operation in the present invention.In schematic diagram shown in Fig. 5, the union operation gained bit vector (BitVector) of take is operand, carry out respectively preferential decoding and reduction computing or, calculate the effective entry address of CAM (MatchedAddr) of coupling and CAM and search for matching result (IsMatched).
In addition, the write operation of CAM is controlled by logic control element: by preferential code translator, find CAM null term, then by the write port of SRAM, to address, be equal to the memory word initiation write operation of data writing, writing content is that on this address, original memory word is 1 with writing corresponding position, the result of calculation that all the other bit vectors that are 0 are carried out by turn or operated.
The beneficial effect of embodiment of the method for the present invention is: based on SRAM, realizes, and less with respect to the mode circuit area based on Register.Mode with search content addressing replaces the mode that full traversal is compared one by one, without extra Compare Logic.Only needing 1 clock period is output matching result and matched data address, greatly improves search efficiency, has dwindled affairs processing delay, has improved the throughput of system.
Corresponding with said method, the present invention also provides the system of a kind of search content addressable memory CAM, comprising:
Acquisition device, searches word for obtaining;
Divide device, be connected with described acquisition device, for searching stroke, be divided into N son and search word, wherein every height is searched an address width in word corresponding content addressable memory CAM and is equaled the static RAM SRAM that this son is searched word width;
Read apparatus, is connected with described division device, for using concurrently son search word as read address correspondence at SRAM, carry out read operation, obtain every height and search upper each memory address of the corresponding SRAM of word and this son is searched to the matching result of word;
Treating apparatus, for the matching result obtaining is merged to processing, obtains this and searches the matching result of word in CAM.
Wherein, described read apparatus obtains in the following way every height and searches upper each memory address of the corresponding SRAM of word and this son is searched to the matching result of word, comprising:
In each memory address of SRAM, an equal corresponding length is equal to the bit vector of CAM search depth, wherein each of bit vector represents an effective entrance of CAM successively, if a certain place value of bit vector equals 1, represent in equivalent locations, to exist with son and search the data that word is identical in CAM, search completes, and the match is successful; If all positions of bit vector all equal 0, illustrate in CAM and do not exist with son and search the data that word is identical, search completes, and it fails to match.
Preferably, described treating apparatus, for the N an obtaining bit vector is carried out by turn with operation, obtain this and search the matching result of word in CAM.
Optionally, described system also comprises:
With operating means, be connected with described treating apparatus, the matching result obtaining is reduced to computing or operation, obtain the search matching result of CAM, if result is 1, represent that the match is successful; If result is 0, represent that it fails to match.
Optionally, described system also comprises:
Preferential code translator, is connected with described treating apparatus, for the matching result obtaining is carried out to preferential decoded operation, obtains an occurrence, and this occurrence is searched the address of word in CAM as this.
With an application example, describe below:
Fig. 6 searches for the structural representation of the system of CAM in the present invention.In system shown in Figure 6, this system comprises three unit, searches division unit between block, SRAM memory cell and logic control element.Wherein search word cell and be responsible for receiving CAM search and enable (SearchEn) and CAM search content, and to CAM search content, search word (SearchWord) and carry out region division, obtain N sub-range.Corresponding 1 son in each sub-range is searched word (SubWord), with this, drives the read operation address of SRAM memory cell.Search stroke subdivision simultaneously and export the enable signal of reading of each sheet SRAM, SRAM memory cell receives to be read enable signal and effectively starts read operation, reads the bit vector (BitVecN) on appropriate address, and exports on port.Logic control element merges it after receiving N the bit vector that memory control unit sends, and reduction and preferential decoding, calculate final search matching result (IsMatched) and match address (MatchedAddr), and export on port.
The beneficial effect of system embodiment of the present invention is: based on SRAM, realizes, and less with respect to the mode circuit area based on Register.Mode with search content addressing replaces the mode that full traversal is compared one by one, without extra Compare Logic.Only needing 1 clock period is output matching result and matched data address, greatly improves search efficiency, has dwindled affairs processing delay, has improved the throughput of system.
The above; be only the specific embodiment of the present invention, but protection scope of the present invention is not limited to this, is anyly familiar with those skilled in the art in the technical scope that the present invention discloses; can expect easily changing or replacing, within all should being encompassed in protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection domain described in claim.
Claims (2)
1. a method of search content addressable memory CAM, is characterized in that, comprising:
Obtain and search word;
To search stroke is divided into N son and searches word, wherein every height is searched an address width in word corresponding content addressable memory CAM and is equaled the static RAM SRAM that this son is searched word width, in SRAM, store data width and be equal to CAM search depth, described CAM search depth is the CAM number of open ended searched data at most;
The son of usining is concurrently searched word and in corresponding SRAM, is carried out read operation as reading address, obtains every height and searches upper each memory address of the corresponding SRAM of word and this son is searched to the matching result of word, comprising:
If exist in equivalent locations with son and search the data that word is identical in CAM, the value of the bit vector that this SRAM is corresponding is 1; Otherwise the value of the bit vector that this SRAM is corresponding is 0;
The matching result obtaining is merged to processing, obtains this and search the matching result of word in CAM, comprising:
Parallel read-out N is searched the bit vector in the corresponding SRAM storer of word, and wherein each bit vector has represented that its place searches the match information that word searched in word;
Union operation to N bit vector, searches the corresponding bit vector of word to N son and carries out by turn the operation with (&), and what calculate a complete width searches the match information of word in CAM;
After union operation completes, be combined result and reduce computing " or (|) " operation and preferential decoded operation, the reduction computing of merge bit vector or the result of operation are the search matching result of CAM, and 1 represents that the match is successful, and 0 represents that it fails to match.
2. a system of search content addressable memory CAM, is characterized in that, comprising:
Acquisition device, searches word for obtaining;
Divide device, be connected with described acquisition device, for searching stroke, be divided into N son and search word, wherein every height is searched an address width in word corresponding content addressable memory CAM and is equaled the static RAM SRAM that this son is searched word width, wherein, in SRAM, store data width and be equal to CAM search depth, described CAM search depth is the CAM number of open ended searched data at most;
Read apparatus, be connected with described division device, for usining concurrently son, search word and at corresponding SRAM, carry out read operation as reading address, obtaining every height searches upper each memory address of the corresponding SRAM of word and this son is searched to the matching result of word, comprise: if exist in equivalent locations with son and search the data that word is identical in CAM, the value of the bit vector that this SRAM is corresponding is 1; Otherwise the value of the bit vector that this SRAM is corresponding is 0;
Treating apparatus, for the matching result obtaining is merged to processing, obtains this and searches the matching result of word in CAM, comprising:
Parallel read-out N is searched the bit vector in the corresponding SRAM storer of word, and wherein each bit vector has represented that its place searches the match information that word searched in word;
Union operation to N bit vector, searches the corresponding bit vector of word to N son and carries out by turn the operation with (&), and what calculate a complete width searches the match information of word in CAM;
After union operation completes, be combined result and reduce computing " or (|) " operation and preferential decoded operation, the reduction computing of merge bit vector or the result of operation are the search matching result of CAM, and 1 represents that the match is successful, and 0 represents that it fails to match.
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| CN102937969A (en) * | 2012-10-12 | 2013-02-20 | 浪潮电子信息产业股份有限公司 | Method for quickly searching CAM (Central Address Memory) |
| CN112039782B (en) * | 2017-01-25 | 2022-01-18 | 华为技术有限公司 | Multi-branch jump co-processing method and device |
| CN109194566B (en) * | 2018-08-27 | 2022-01-04 | 惠州Tcl移动通信有限公司 | Method for retransmitting information, storage medium and terminal equipment |
| CN115878863B (en) * | 2022-12-01 | 2023-12-19 | 杭州菲数科技有限公司 | Data searching method and data searching device |
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| CN1447941A (en) * | 2001-05-17 | 2003-10-08 | 梅姆考尔有限责任公司 | Searching words of different sizes |
| US6928430B1 (en) * | 2002-04-23 | 2005-08-09 | Integrated Silicon Solution, Inc. | Prefix match search scheme |
| US7426518B2 (en) * | 2003-03-28 | 2008-09-16 | Netlogic Microsystems, Inc. | System and method for efficiently searching a forwarding database that is split into a bounded number of sub-databases having a bounded size |
| US7355872B2 (en) * | 2003-09-29 | 2008-04-08 | International Business Machines Corporation | Segmented content addressable memory architecture for improved cycle time and reduced power consumption |
| US7260674B2 (en) * | 2004-05-25 | 2007-08-21 | Intel Corporation | Programmable parallel lookup memory |
| US20090100219A1 (en) * | 2007-10-15 | 2009-04-16 | Anurag Bhargava | Method and apparatus for efficient cam lookup for internet protocol addresses |
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