CN102646059B - The load balancing processing method and device of multi-core processor system - Google Patents
The load balancing processing method and device of multi-core processor system Download PDFInfo
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Abstract
The present invention discloses the load balancing processing method and device of a kind of multi-core processor system, and this method comprises the following steps：Initialization process core exchange chip, loading sets agreement and the mapping relations and DMA channel and the binding relationship of process cores of COS queues, COS queues and DMA channel；Whether the load between detection process core balances；If it is not, then according to preset scheduling strategy, adjustment agreement and COS queues or the mapping relations of COS queues and DMA channel, or adjustment DMA channel and the binding relationship of process cores.The present invention is by laod unbalance, according to preset scheduling strategy Dynamic Host Configuration Protocol and the mapping relations or DMA channel and the binding relationship of process cores of COS queues, COS queues and DMA channel, so as to flexibly carry out priority classification to data message, the optimization of load balance is carried out to system in time, system effectiveness is further increased.
Description
Technical field
The present invention relates to data communication field, more particularly to a kind of multi-core processor system load balancing processing method and
Device.
Background technology
Data message is sent to give CPU (Central Processing Unit, central processing unit), one on current exchange chip
As be that by DMA (Direct Memory Access, direct memory access) controllers CPU packet will be reported to be passed from chip
Deliver to CPU.Dma controller generally has multiple passages to be available for used in transceiving data bag, and one is generally only used on monokaryon framework
Passage (can not parallel processing), all protocol massages, regardless of priority (COS) all by this passage transmitted to CPU,
As shown in Figure 1.And under multicore architecture, by the message for specifying a core to be responsible for handling the passage.
Above-mentioned implementation method flexibly can not carry out priority classification to data message, and optimize the load balance of system,
Such as L2PT protocol massages need to be handled as early as possible, and priority is very high, and system have received substantial amounts of ARP (Address
Resolution Protocol, address resolution protocol) protocol massages, the processing of such ARP protocol message will take substantial amounts of
CPU, and L2PT protocol massages can not be handled in time, if process cores load very heavy, the problem of aggravating such, traditionally
It can only be improved by adjusting the priority of protocol massages processing task in application program, it is very dumb also much to be limited.
The content of the invention
The main object of the present invention is to provide a kind of load balancing processing method of multi-core processor system, it is intended to which optimization is more
The load balance of core processor system, improves system effectiveness.
The invention provides a kind of individual load balancing processing method of multi-core processor system, comprise the following steps：
Initialization process core exchange chip, loading sets agreement and the mapping relations of COS queues, COS queues and DMA channel
And DMA channel and the binding relationship of process cores；
Whether the load between detection process core balances；
If it is not, then according to preset scheduling strategy, adjustment agreement is closed with COS queues or COS queues and the mapping of DMA channel
System, or adjustment DMA channel and the binding relationship of process cores.
Preferably, the step of whether load judged between process cores balances be specially：
The load factor of process cores is calculated according to load factor, if the load factor of one of them or several process cores exceedes
Preset load factor, the then laod unbalance between decision processor；Otherwise the load balance between decision processor；Or
The message load weighted value of process cores is calculated, if the message load weighted value of one of them or several process cores exceedes
Preset message load weighted value, the then laod unbalance between decision processor；Otherwise the load balance between decision processor.
Preferably, the step of whether load between the detection process core balances includes：Be periodically detected, process cores
Operation process when load changes in detection, process cores is slept or detected when waking up.
Preferably, the preset scheduling strategy includes：
If there is the pre- of the agreement of high priority and the agreement of the high priority in one of COS queues of process cores
The response time is surveyed more than the preset response time, by adjusting agreement and COS queues, COS queues and DMA channel or DMA channel
With the mapping relations of process cores, by the agreement of the high priority guide to load in light process cores handle.
Present invention also offers a kind of load balance processing unit of multi-core processor system, including：
Initialization module, for initialization process core exchange chip, loading set agreement and COS queues, COS queues with
The mapping relations and DMA channel and the binding relationship of process cores of DMA channel；
Whether load balance detection module, balance for the load between detection process core；
Scheduler module, for according to preset scheduling strategy, adjustment agreement and COS queues or COS queues and DMA channel reflect
Penetrate relation, or adjustment DMA channel and the binding relationship of process cores.
Preferably, the load balance detection module specifically for：
The load factor of process cores is calculated according to load factor, if the load factor of one of them or several process cores exceedes
Preset load factor, the then laod unbalance between decision processor；Otherwise the load balance between decision processor；Or
The message load weighted value of process cores is calculated, if the message load weighted value of one of them or several process cores exceedes
Preset message load weighted value, the then laod unbalance between decision processor；Otherwise the load balance between decision processor.
Preferably, the detection of load balance includes in the load balance detection module：Be periodically detected, process cores it is negative
Carry the sleep of operation process when changing in detection, process cores or detected when waking up.
Preferably, the preset scheduling strategy includes：
If there is the pre- of the agreement of high priority and the agreement of the high priority in one of COS queues of process cores
The response time is surveyed more than the preset response time, by adjusting agreement and COS queues, COS queues and DMA channel or DMA channel
With the mapping relations of process cores, by the agreement of the high priority guide to load in light process cores handle.
The present invention is by laod unbalance, according to preset scheduling strategy Dynamic Host Configuration Protocol and COS queues, COS teams
The mapping relations or DMA channel and the binding relationship of process cores of row and DMA channel, so as to flexibly be carried out to data message
Priority classification, the optimization of load balance is carried out to system, system effectiveness is further increased in time.
Brief description of the drawings
Fig. 1 is the schematic flow sheet of the method for multi-core processor system receiving text in the prior art；
Fig. 2 is the schematic flow sheet of the embodiment of load balancing processing method one of multi-core processor system of the present invention；
Fig. 3 be multi-core processor system of the present invention load balancing processing method in process cores after initialization process core,
The structural representation of DMA channel and the mapping relations of COS queues；
Fig. 4 is the structural representation of the embodiment of load balance processing unit one of multi-core processor system of the present invention.
The realization, functional characteristics and advantage of the object of the invention will be described further referring to the drawings in conjunction with the embodiments.
Embodiment
Technical scheme is further illustrated below in conjunction with Figure of description and specific embodiment.It should be appreciated that this
The specific embodiment of place description is not intended to limit the present invention only to explain the present invention.
Fig. 2 is the schematic flow sheet of the embodiment of load balancing processing method one of multi-core processor system of the present invention.
Reference picture 2, the load balancing processing method of multi-core processor system of the present invention comprises the following steps：
Step S110, initialization process core, loading set agreement to be deposited with priority COS queues, COS queues and direct internal memory
Take the mapping relations and DMA channel of DMA channel and the binding relationship of process cores；
First, initialization process core, loading sets agreement and priority COS queues, COS queues and direct memory access
The binding relationship of the mapping relations of DMA channel, DMA channel and process cores.As shown in figure 3, the multi-core processor system includes master
Process cores and the dma controller and 8 COS queues from process cores including 3 passages.Wherein main process task core and dma controller
CH3 passages are bound, and COS0 queues, COS3 queues, COS6 queues and COS7 queues and CH3 channel maps；From process cores and DMA
CH1 the and CH2 passages binding of controller, and COS1 queues, COS4 queues and CH2 channel maps, COS2 queues, COS5 queues and
CH1 channel maps.The initialization of the process cores, include create process cores DMA channel processing timer, whne timer when
Between when reaching, will initiate to interrupt, then process cores are responded, the message in batch processing DMA channel.
Whether the load between step S120, detection process core balances, and is to terminate this flow；Otherwise step is performed
S130；
In one embodiment of the present invention, step S120 is specially：
The load factor of process cores is calculated according to load factor, if the load factor of one of process cores is pre- more than first
Put load factor, the load factor of another process cores is less than the second preset load factor, then judge load between process cores not
Balance；Otherwise the load balance between process cores is judged.
The load factor of polycaryon processor can include message flow sum, message total length, message total, flow rate etc.
In one kind or any combination.The load factor of process cores carries out the acquisition that is multiplied by the value of load factor with its weights.For example,
The load factor of a certain process cores includes message total length and message total, and the weights of message total length are 0.4, message total
Weights be 0.6, then the load factor of the process cores be message total length * 0.4+ message totals * 0.6.By each process cores
Load factor is compared with the first preset load factor and the second preset load factor, if the load factor of process cores is pre- more than first
Load factor is put, then the process cores are overload；If the load factor of process cores is less than the second preset load factor, the process cores
For underloading.If then there is the overload of process cores in process cores, another process cores underloading then judges bearing between process cores
Carry uneven；Otherwise the load balance between process cores is judged.
In another embodiment of the present invention, step S120 is specially：
The message load weighted value of process cores is calculated, if the message load weighted value of one of process cores is pre- more than first
Message load weighted value is put, the message load weighted value of another process cores is less than the second preset message load weighted value, then judged
Laod unbalance between processor；Otherwise the load balance between decision processor.
The message load weighted value is multiplied acquisition by message number with COS queue priority weights.By each process cores
Message load weighting meet with the first preset message load weighted value and the second preset message load weighted value compares, if process cores
Message load weighted value more than the first preset message load weighted value, then the process cores are overload；If the message of process cores is born
Carry weighted value and be less than the second preset message load weighted value, then the process cores are underloading.If then existed in process cores at one
Core overload is managed, another process cores underloading then judges the laod unbalance between process cores；Otherwise the load between process cores is judged
Balance.
In above-mentioned steps S120, it can set whether the load being periodically detected between process cores balances, for example, setting inspection
The survey cycle is 10ms, then carries out a load balance detection every 10ms；Can also when the load of process cores changes,
Carry out load balance detection；When process that can also be in process cores is in sleep or wake-up states, load balance detection is carried out.
Step S130, according to preset scheduling strategy, adjustment agreement is closed with COS queues or COS queues and the mapping of DMA channel
System, or adjustment DMA channel and the binding relationship of process cores.
The preset scheduling strategy is specially：
If there is the pre- of the agreement of high priority and the agreement of the high priority in one of COS queues of process cores
The response time is surveyed more than the preset response time, by adjusting agreement and COS queues, COS queues and DMA channel or DMA channel
With the mapping relations of process cores, by the high priority guiding to load in light process cores handle.
Specifically, after initialization process core, agreement and the mapping relations and DMA of COS queues, COS queues and DMA channel are led to
The binding relationship in road and process cores, as shown in Figure 3.In processing procedure, it is assumed that there is L2PT agreements in COS7 queues, and main place
There is substantial amounts of ARP protocol message in reason core and to handle, and the processing of ARP protocol message will be taken main process task core it is very long when
Between, thus the predicated response time of L2PT agreements exceed the preset response time, and cause L2PT agreements not make an immediate response, therefore can
With according to preset scheduling strategy, the queue that the L2PT agreements are mapped in the process cores of light load, such as COS1 queues,
COS2 queues, COS4 queues, COS5 queues.The DMA that COS7 queues can certainly be mapped in the process cores of light load
Passage, such as CH1 passages, CH2 passages, or CH3 passages are tied to from process cores.
The embodiment of the present invention by laod unbalance, according to preset scheduling strategy Dynamic Host Configuration Protocol and COS queues,
COS queues and the mapping relations or DMA channel and the binding relationship of process cores of DMA channel, so as to flexibly to datagram
Text carries out priority classification, carries out the optimization of load balance to system in time, further increases system effectiveness.
Fig. 4 is the structural representation of the embodiment of load balance processing unit one of multi-core processor system of the present invention.
Reference picture 4, the load balance processing unit of multi-core processor system of the present invention includes：
Initialization module 110, for initialization process core, loading set agreement and priority COS queues, COS queues with
The mapping relations and DMA channel and the binding relationship of process cores of direct memory access DMA channel；
Whether load balance detection module 120, balance for the load between detection process core；
Scheduler module 130, for according to preset scheduling strategy, adjustment agreement and COS queues or COS queues and DMA channel
Mapping relations, or adjustment DMA channel and process cores binding relationship.
First, the initialization process core of initialization module 110, loading set agreement and priority COS queues, COS queues with
The binding relationship of the mapping relations of direct memory access DMA channel, DMA channel and process cores, as shown in Figure 3.The process cores
Initialization, in addition to the DMA channel processing timer of process cores is created, when reaching the time of timer, it will initiate to interrupt, then
Process cores are responded, the message in batch processing DMA channel.
Load balance detection module 120 can set whether the load being periodically detected between process cores balances, for example, setting
Detection cycle is put for 10ms, then carries out a load balance detection every 10ms；It can also become in the load of process cores
During change, load balance detection is carried out；When process that can also be in process cores is in sleep or wake-up states, load balance is carried out
Detection.
In one embodiment of the present invention, the load balance detection module 120 specifically for：Calculated according to load factor
The load factor of process cores, if the load factor of one of process cores is more than the first preset load factor, another process cores
Load factor is less than the second preset load factor, then judges the laod unbalance between process cores；Otherwise judge between process cores
Load balance.
In another embodiment of the present invention, the load balance detection module 120 specifically for：Calculate the report of process cores
Text load weighted value, it is another if the message load weighted value of one of process cores is more than the first preset message load weighted value
The message load weighted value of process cores is less than the second preset message load weighted value, then the load between decision processor is uneven
Weighing apparatus；Otherwise the load balance between decision processor.
Preset scheduling strategy is specifically as follows in scheduler module 130：
If there is the pre- of the agreement of high priority and the agreement of the high priority in one of COS queues of process cores
The response time is surveyed more than the preset response time, by adjusting agreement and COS queues, COS queues and DMA channel or DMA channel
With the mapping relations of process cores, by the agreement of the high priority guide to load in light process cores handle.
Specifically, after initialization process core, agreement and the mapping relations and DMA of COS queues, COS queues and DMA channel are led to
The binding relationship in road and process cores, as shown in Figure 3.In processing procedure, it is assumed that there is L2PT agreements in COS7 queues, and main place
There is substantial amounts of ARP protocol message in reason core and to handle, and the processing of ARP protocol message will be taken main process task core it is very long when
Between, thus the predicated response time of L2PT agreements exceed the preset response time, and cause L2PT agreements not make an immediate response, therefore can
With according to preset scheduling strategy, the queue that the L2PT agreements are mapped in the process cores of light load, such as COS1 queues,
COS2 queues, COS4 queues, COS5 queues.The DMA that COS7 queues can certainly be mapped in the process cores of light load
Passage, such as CH1 passages, CH2 passages, or CH3 passages are tied to from process cores.
The embodiment of the present invention by laod unbalance, according to preset scheduling strategy Dynamic Host Configuration Protocol and COS queues,
COS queues and the mapping relations or DMA channel and the binding relationship of process cores of DMA channel, so as to flexibly to datagram
Text carries out priority classification, carries out the optimization of load balance to system in time, further increases system effectiveness.
The preferred embodiments of the present invention are the foregoing is only, its scope of the claims is not thereby limited, it is every to utilize the present invention
Equivalent structure or equivalent flow conversion that specification and accompanying drawing content are made, are directly or indirectly used in other related technology necks
Domain, is included within the scope of the present invention.
Claims (2)
1. a kind of load balancing processing method of multi-core processor system, it is characterised in that comprise the following steps：
Initialization process core exchange chip, loading sets agreement and COS queues, COS queues and direct memory access DMA channel
The binding relationship of mapping relations and DMA channel and process cores；
Whether the load between detection process core balances；
If it is not, then according to preset scheduling strategy, adjustment agreement and COS queues or the mapping relations of COS queues and DMA channel, or
Person adjusts DMA channel and the binding relationship of process cores；
Judge that the step of whether load between process cores balances is specially：
The load factor of process cores is calculated according to load factor, if the load factor of one of them or several process cores exceed it is preset
Load factor, the then laod unbalance between decision processor；Otherwise the load balance between decision processor；Or
Calculate the message load weighted value of process cores, if the message load weighted value of one of them or several process cores exceed it is preset
Message load weighted value, the then laod unbalance between decision processor；Otherwise the load balance between decision processor；
The step of whether load between the detection process core balances includes：It is periodically detected, the load of process cores becomes
Operation process during change in detection, process cores is slept or detected when waking up；
The preset scheduling strategy includes：
If the prediction that there is the agreement of high priority and the agreement of the high priority in one of COS queues of process cores rings
Exceed the preset response time between seasonable, by adjusting agreement and COS queues, COS queues and DMA channel or DMA channel and place
Manage core mapping relations, by the agreement of the high priority guide to load in light process cores handle.
2. a kind of load balance processing unit of multi-core processor system, it is characterised in that including：
Initialization module, for initialization process core exchange chip, loading sets agreement logical with COS queues, COS queues and DMA
The mapping relations and DMA channel and the binding relationship of process cores in road；
Whether load balance detection module, balance for the load between detection process core；
Scheduler module, for according to preset scheduling strategy, adjustment agreement to be closed with COS queues or COS queues and the mapping of DMA channel
System, or adjustment DMA channel and the binding relationship of process cores；
The load balance detection module specifically for：
The load factor of process cores is calculated according to load factor, if the load factor of one of them or several process cores exceed it is preset
Load factor, the then laod unbalance between decision processor；Otherwise the load balance between decision processor；Or
Calculate the message load weighted value of process cores, if the message load weighted value of one of them or several process cores exceed it is preset
Message load weighted value, the then laod unbalance between decision processor；Otherwise the load balance between decision processor；
The detection of load balance includes in the load balance detection module：It is periodically detected, the load of process cores changes
When detection, the operation process sleep in process cores or detect when waking up；
The preset scheduling strategy includes：
If the prediction that there is the agreement of high priority and the agreement of the high priority in one of COS queues of process cores rings
Exceed the preset response time between seasonable, by adjusting agreement and COS queues, COS queues and DMA channel or DMA channel and place
Manage core mapping relations, by the agreement of the high priority guide to load in light process cores handle.
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| CN102843300A (en) * | 2012-09-12 | 2012-12-26 | 盛科网络（苏州）有限公司 | Method and system for achieving controller load balance in Openflow switchboard system |
| CN103617081A (en) * | 2013-10-15 | 2014-03-05 | 广东明创软件科技有限公司 | Multi-core scheduling policy selecting method and mobile terminal |
| FR3023047B1 (en) | 2014-06-27 | 2016-06-24 | Continental Automotive France | METHOD FOR MANAGING FAILURE MESSAGES OF A MOTOR VEHICLE |
| CN104901898B (en) * | 2015-06-08 | 2018-08-03 | 东软集团股份有限公司 | A kind of load-balancing method and device |
| CN107193767B (en) * | 2017-05-25 | 2020-05-19 | 北京计算机技术及应用研究所 | Data transmission system of cache mirror image of dual-controller storage system |
| CN110377418B (en) * | 2019-06-05 | 2021-09-03 | 上海易点时空网络有限公司 | CPU multi-core utilization rate optimization processing method and device for single server |
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| CN101217467A (en) * | 2007-12-28 | 2008-07-09 | 杭州华三通信技术有限公司 | An inter-core load dispensing device and method |
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| CN101354664B (en) * | 2008-08-19 | 2011-12-28 | 中兴通讯股份有限公司 | Method and apparatus for interrupting load equilibrium of multi-core processor |
| KR101275698B1 (en) * | 2008-11-28 | 2013-06-17 | 상하이 신하오 (브레이브칩스) 마이크로 일렉트로닉스 코. 엘티디. | Data processing method and device |
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| CN101217467A (en) * | 2007-12-28 | 2008-07-09 | 杭州华三通信技术有限公司 | An inter-core load dispensing device and method |
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