CN102621478A - Dynamic test device and system of radio-frequency front-end chip - Google Patents

Dynamic test device and system of radio-frequency front-end chip Download PDF

Info

Publication number
CN102621478A
CN102621478A CN2012100893040A CN201210089304A CN102621478A CN 102621478 A CN102621478 A CN 102621478A CN 2012100893040 A CN2012100893040 A CN 2012100893040A CN 201210089304 A CN201210089304 A CN 201210089304A CN 102621478 A CN102621478 A CN 102621478A
Authority
CN
China
Prior art keywords
data
frequency front
radio frequency
host computer
end chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN2012100893040A
Other languages
Chinese (zh)
Other versions
CN102621478B (en
Inventor
梁晓峰
郑卫国
叶晖
李志俊
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
RISING MICRO ELECTRONICS CO Ltd
Original Assignee
RISING MICRO ELECTRONICS CO Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by RISING MICRO ELECTRONICS CO Ltd filed Critical RISING MICRO ELECTRONICS CO Ltd
Priority to CN201210089304.0A priority Critical patent/CN102621478B/en
Publication of CN102621478A publication Critical patent/CN102621478A/en
Application granted granted Critical
Publication of CN102621478B publication Critical patent/CN102621478B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Monitoring And Testing Of Transmission In General (AREA)
  • Mobile Radio Communication Systems (AREA)

Abstract

The embodiment of the invention discloses a dynamic test device and system of a radio-frequency front-end chip. The system comprises a host computer and a dynamic test device, wherein the host computer is used for editing and storing control sequences of all required test items for the dynamic test; during the dynamic test process, a control sequence corresponding to the current test item is transmitted to the dynamic test device; the dynamic test device is used for receiving and storing the control sequence transmitted by the host computer and corresponding to the current test item; a corresponding control order is sequentially scheduled according to an execution time of each control order in the control sequence corresponding to the current test item to be transmitted to a tested radio-frequency front-end chip. By adopting the embodiment, the radio-frequency front-end chip can be separated from a baseband chip, and the dynamic performance of the radio-frequency front-end chip can be independently tested; and the device and the system are high in flexibility, and the efficiency and effect on testing the dynamic performances of the radio-frequency front-end chip can be greatly improved.

Description

A kind of dynamic checkout unit of radio frequency front end chip and system
Technical field
The present invention relates to the mobile communication technology field, particularly relate to a kind of dynamic checkout unit and system of radio frequency front end chip.
Background technology
Radio frequency front end chip and baseband chip all are the core components of portable terminal.Wherein, baseband chip is used for the synthetic baseband signal that is about to emission, or the baseband signal that receives is decoded; Baseband signal be meant that information source sends not through the raw electrical signal of ovennodulation.Radio frequency front end chip is responsible for radio-frequency receiving-transmitting; Concrete, during emission,,, on frequency higher, that be fit to the antenna emission, transmit frequency modulation (PFM) through antenna wireless through up-conversion passing the baseband signal of coming from baseband chip; During reception,,, convert baseband signal into, pass to baseband chip and handle through down coversion the radiofrequency signal that receives from antenna.
Usually, the ideal baseband signal that baseband chip sent needs the various processing through radio frequency front end chip, becomes radiofrequency signal, redispatches away.Conversion and processing procedure in the middle of this are not fully desirable, and can there be certain deviation (like frequency error, phase error etc.) in the radiofrequency signal of therefore finally launching.Same, in receiving course, radio frequency front end chip receives aerial radiofrequency signal, and with its down coversion, processing such as in addition filtering, amplification change baseband signal into, pass to baseband chip and handle.In receiving the process of handling, equally also exist deviation.The above-mentioned various deviations that produce in the process that transmit and receive are that the characteristic by radio frequency front end chip itself causes, and can't eliminate fully, and its degree size can be used for weighing the performance of radio frequency front end chip.
Therefore, need test the performance of radio frequency front end chip, thereby radio frequency front end chip is made the assessment of quantification.Usually, for the performance test of radio frequency front end chip, comprise static properties test and dynamic performance testing two aspects.The test of static properties can be arranged on specific duty with radio frequency front end chip through manual, then its performance is tested.And the test of dynamic property needs the various sights in the simulation practical application, in the extremely short time, chip is carried out the accurate a series of controls of timing, and this can't realize with manual type.
In the prior art, the dynamic property of radio frequency front end chip is tested, need be with the precedence relationship of the various control sequences of radio frequency front end chip and the relation of the time-delay between the steering order as the sequential template, the mode through program Solidification is burnt in the baseband chip.But in the time of need or instructing time-delay to make amendment to control sequence, then need remodify code, be burnt in the baseband chip again after recompiling.
And, in the prior art, can only rely on the dynamic performance testing that baseband chip carries out radio frequency front end chip, make testing progress be limited by the progress of baseband chip, be unfavorable for the research and development of radio frequency front end chip and release market.
This shows, existing radio frequency front end chip dynamic performance testing technology, its test process is more consuming time, complexity is high and versatility is not strong, makes the tester need expend a lot of times test platform is made amendment, the efficient and the effect of influence test.
Summary of the invention
In view of this, the object of the present invention is to provide a kind of dynamic checkout unit and system of radio frequency front end chip, can let radio frequency front end chip break away from baseband chip, the dynamic property of independent test radio frequency front end chip; This Apparatus and system has higher flexibility, has improved the efficient and the effect of radio frequency front end chip dynamic performance testing greatly.
The present invention provides a kind of dynamic test system of radio frequency front end chip, and said system comprises: host computer and dynamic checkout unit;
Said host computer connects tested radio frequency front end chip through dynamic checkout unit;
Said host computer, the control sequence that is used to edit and store required all test items of dynamic test; In the dynamic test process, send the corresponding control sequence of current test item to said dynamic checkout unit;
Said dynamic checkout unit is used to receive and preserve the corresponding control sequence of current test item that said host computer sends; And in the dynamic test process, the execution time according to each steering order in the corresponding control sequence of current test item, access the control corresponding instruction successively, be sent to tested radio frequency front end chip.
Preferably, said dynamic checkout unit comprises: clock module, register module, task scheduling modules, data memory module, host computer interface module, RF data interface module and RF control interface module;
Said clock module is used to produce the clock of the required various frequencies of said dynamic checkout unit;
Said register module is used for receiving and preserve the corresponding control sequence of current test item that said host computer sends through said host computer interface module; And in the dynamic test process, access the control corresponding instruction according to the dispatch command that is received from said task scheduling modules, be sent to tested radio frequency front end chip through said RF control interface module;
Said task scheduling modules is used for controlling the switching of said proving installation mode of operation in the dynamic test process; According to the execution time of each steering order in the corresponding control sequence of current test item, send dispatch command to said register module; Control the startup of said RF data interface module and RF control interface module and to the operation of tested each IO port of radio frequency front end chip;
Said data memory module, data are used in the communication of receiving when data of launching when being used to store said tested radio frequency front end chip transmission test and acceptance test;
Said host computer interface module is used to realize communicating by letter between said host computer and the said proving installation;
Said RF data interface module is used for using data to said tested radio frequency front end chip transmitting-receiving communication;
Said RF control interface module is used to realize the operation of said proving installation to the read-write register and the relevant IO port of said tested radio frequency front end chip.
Preferably, said clock module adopts 26M from the radio frequency front end chip input as the synchronous clock source, produces the required synchronous clock of transceive data under major clock and the different communication standard of said dynamic checkout unit work through digital dock administration module DCM.
Preferably, the mode of operation of said proving installation comprises: single operational mode and circular flow pattern;
Said circular flow pattern does; All steering orders corresponding with current test item are one-period; Begin to carry out until the last item steering order from article one steering order, original state is returned in the timer zero clearing; Begin to carry out from article one steering order again, so all steering orders are carried out in circulation;
Said single operational mode is that all steering orders that current test item is corresponding are carried out once, return idle condition.
Preferably, said data memory module comprises: data transmission unit and Data Receiving unit;
Said data transmission unit is used for when transmission test, in advance from the said host computer download communication with data and storage; When dynamic test runs to emission state, access corresponding data successively, be sent to said tested radio frequency front end chip through said RF data interface module;
Said Data Receiving unit is used for when acceptance test, and data are used in the communication that receives and store said tested radio frequency front end chip; After treating that acceptance test is accomplished, the data that receive through passing said host computer back on the said host computer interface module.
Preferably, said host computer interface module comprises two kinds of mode of operations: data communication mode and command communication pattern;
Under data communication mode, said host computer interface module is used for said host computer said data memory module is operated;
Under the command communication module, said host computer interface module is used for said host computer said register module is operated.
The present invention also provides a kind of dynamic checkout unit of radio frequency front end chip, and said device is used to cooperate host computer that tested radio frequency front end chip is carried out dynamic test;
Said device comprises: clock module, register module, task scheduling modules, data memory module, host computer interface module, RF data interface module and RF control interface module;
Said clock module is used to produce the clock of the required various frequencies of said dynamic checkout unit;
Said register module is used for receiving and preserve the corresponding control sequence of current test item that said host computer sends through said host computer interface module; And in the dynamic test process, access the control corresponding instruction according to the dispatch command that is received from said task scheduling modules, be sent to tested radio frequency front end chip through said RF control interface module;
Said task scheduling modules is used for controlling the switching of said proving installation mode of operation in the dynamic test process; According to the execution time of each steering order in the corresponding control sequence of current test item, send dispatch command to said register module; Control the startup of said RF data interface module and RF control interface module and to the operation of tested each IO port of radio frequency front end chip;
Data are used in the communication that said data memory module, the communication of launching when being used to store said tested radio frequency front end chip transmission test are received during with data and acceptance test;
Said host computer interface module is used to realize communicating by letter between said host computer and the said proving installation;
Said RF data interface module is used for using data to said tested radio frequency front end chip transmitting-receiving communication;
Said RF control interface module is used to realize the operation of said proving installation to the read-write register and the relevant IO port of said tested radio frequency front end chip.
Preferably, said clock module adopts 26M from the radio frequency front end chip input as the synchronous clock source, produces the required synchronous clock of transceive data under major clock and the different communication standard of said dynamic checkout unit work through digital dock administration module DCM.
Preferably, the mode of operation of said proving installation comprises: single operational mode and circular flow pattern;
Said circular flow pattern does; All steering orders corresponding with current test item are one-period; Begin to carry out until the last item steering order from article one steering order, original state is returned in the timer zero clearing; Begin to carry out from article one steering order again, so all steering orders are carried out in circulation;
Said single operational mode is that all steering orders that current test item is corresponding are carried out once, return idle condition.
Preferably, said data memory module comprises: data transmission unit and Data Receiving unit;
Said data transmission unit is used for when transmission test, in advance from the said host computer download communication with data and storage; When dynamic test runs to emission state, access corresponding data successively, be sent to said tested radio frequency front end chip through said RF data interface module;
Said Data Receiving unit is used for when acceptance test, and data are used in the communication that receives and store said tested radio frequency front end chip; After treating that acceptance test is accomplished, the data that receive through passing said host computer back on the said host computer interface module.
Preferably, said host computer interface module comprises two kinds of mode of operations: data communication mode and command communication pattern;
Under data communication mode, said host computer interface module is used for said host computer said data memory module is operated;
Under the command communication module, said host computer interface module is used for said host computer said register module is operated
According to specific embodiment provided by the invention, the invention discloses following technique effect:
In the embodiment of the invention; Be stored in needs debugging and the part (being the control sequence of said tested radio frequency front end chip being carried out all required test items of dynamic test) that often needs to revise in the host computer; In each dynamic test process, send the corresponding control sequence of current test item to said dynamic checkout unit; Said dynamic checkout unit receives the corresponding control sequence of current test item; According to the execution time of each steering order in the corresponding control sequence of current test item; Access the control corresponding instruction successively; Be sent to tested radio frequency front end chip, realize dynamic test said tested radio frequency front end chip.
Thus, can let radio frequency front end chip break away from baseband chip, the dynamic property of independent test radio frequency front end chip; And in the embodiment of the invention; Need debugging and the part that often needs to revise to be stored in the host computer; Even need make amendment to the execution time of control sequence or each steering order, also only need in the Control Software of host computer, make amendment gets final product, and need not carry out hardware modifications to dynamic checkout unit; Make this Apparatus and system have higher flexibility thus, improved the efficient and the effect of radio frequency front end chip dynamic performance testing greatly.
Description of drawings
Fig. 1 is the dynamic test system of the embodiment of the invention one described radio frequency front end chip;
Fig. 2 is the dynamic test system of the embodiment of the invention two described radio frequency front end chips.
Embodiment
For make above-mentioned purpose of the present invention, feature and advantage can be more obviously understandable, below in conjunction with accompanying drawing and embodiment the present invention done further detailed explanation.
In view of this, the object of the present invention is to provide a kind of dynamic checkout unit and system of radio frequency front end chip, can let radio frequency front end chip break away from baseband chip, the dynamic property of independent test radio frequency front end chip; This Apparatus and system has higher flexibility, has improved the efficient and the effect of radio frequency front end chip dynamic performance testing greatly.
The main inventive concept of the embodiment of the invention is: separate with the part that often needs to revise the needs debugging with program curing.The hardware frame of the dynamic checkout unit of radio frequency front end chip realizes through program curing, like circuit structure of the hardware structure of task scheduling, various external interface, read-write register etc.Needs debugging and the part (like the control sequence of all test items in the dynamic test process) that often needs to revise are kept in the host computer; Write the register of dynamic checkout unit realizes through upper computer software; Can satisfy under the prerequisite of not changing the proving installation hardware frame, to the modification at any time of this part.Be reserved with enough register space used control sequence and relevant time module when being used to store dynamic test in the proving installation.
With reference to Fig. 1, be the dynamic test system structural drawing of the embodiment of the invention one described radio frequency front end chip.As shown in Figure 1, said system comprises: host computer 10 and dynamic checkout unit 20.
Said host computer 10 connects tested radio frequency front end chip 30 through said dynamic checkout unit 20.
Said host computer 10, be used to store control sequence that said tested radio frequency front end chip 30 is carried out all required test items of dynamic test with; In the dynamic test process, send the corresponding control sequence of current test item to said dynamic checkout unit 20.
Said dynamic checkout unit 20 is used to receive and preserve the corresponding control sequence of current test item that said host computer 10 sends; And in the dynamic test process, the execution time according to each steering order in the corresponding control sequence of current test item, access the control corresponding instruction successively, be sent to tested radio frequency front end chip 30.
In the embodiment of the invention; Be stored in needs debugging and the part (being the control sequence of said tested radio frequency front end chip 30 being carried out all required test items of dynamic test) that often needs to revise in the host computer 10; In each dynamic test process, send corresponding control sequence of current test item and relevant time module to said dynamic checkout unit 20; Said dynamic checkout unit 20 receives corresponding control sequence of current test item and relevant time module; According to the execution time of each steering order in the corresponding control sequence of current test item; Access the control corresponding instruction successively; Be sent to tested radio frequency front end chip 30, realize dynamic test said tested radio frequency front end chip 30.
Thus, can let radio frequency front end chip 30 break away from baseband chip, the dynamic property of independent test radio frequency front end chip; And in the embodiment of the invention; Realize needs debugging and the mode of the part that often needs to revise with register; Operating in the host computer 10 of debugging and modification accomplished; Even need make amendment to the execution time of control sequence or each steering order, also only need in the Control Software of host computer 10, make amendment gets final product, and need not carry out hardware modifications to dynamic checkout unit 20; Make this Apparatus and system have higher flexibility thus, improved the efficient and the effect of radio frequency front end chip dynamic performance testing greatly.
With reference to Fig. 2, be the dynamic test system structural drawing of the embodiment of the invention two described radio frequency front end chips.As shown in Figure 2, said system comprises: host computer 10 and dynamic checkout unit 20.
Said host computer 10 connects tested radio frequency front end chip 30 through said dynamic checkout unit 20.
Said host computer 10 is used to store the control sequence of said tested radio frequency front end chip 30 being carried out all required test items of dynamic test; In the dynamic test process, send corresponding control sequence of current test item and relevant time module to said dynamic checkout unit 20.
Concrete, need debugging and the part that often needs to revise in the said host computer editor dynamic test, specifically comprise: the control sequence of said tested radio frequency front end chip 30 being carried out all required test items of dynamic test; After editting, the configuration information that host computer 10 is corresponding with current test item (comprising required control sequence of current test item and relevant time module) is sent to said dynamic checkout unit 20, supplies to access use in the dynamic test process.
Dynamic test for tested radio frequency chip 30; General each test item all can comprise a lot of bar steering orders; Every steering order all comprises the content of its palpus execution and the execution time of appointment; According to the execution time of each bar steering order, all steering orders that this test item is corresponding just constitute a control sequence.
Preferably, said host computer 10, the control sequence that can provide graphical interfaces to supply operating personnel to edit and store required all test items of dynamic test.
Need to prove that used control sequence when said tested radio frequency front end chip 30 is carried out dynamic test is not decided at the very start.Concrete; Can be according to the design objective of tested radio frequency chip 30; Estimate a Utopian flow process earlier, the tester is according to the actual conditions of test then, the priority execution sequence of adjusting each steering order with and invoked time point; Perhaps add or leave out steering order, to reach the control sequence that meets the test needs.Above-mentioned all adjustment processes are exactly in the Control Software of host computer 10, to revise the value of register, and write the process that said dynamic checkout unit 20 is watched the output of tested radio frequency front end chip 30, and the effect that configuration is reached is revised in thus can be instant see.In case after confirming good control sequence and relevant time module, just can preserve all configurations get up, be directed against test item of the same type afterwards and just can directly call configuration to current test item.
In the embodiment of the invention; Be placed on needs debugging and the operation that often needs to revise in the host computer 10; The beneficial effect of doing like this is; Can the ABB chip for the control flow of radio frequency front end chip, realization can be revised the dynamic control of debugging flexibly, to reach raising to the efficient of radio frequency front end chip dynamic test and the purpose of effect.
As shown in Figure 2; Said dynamic checkout unit 20 comprises: clock module 201, register module 202, task scheduling modules 203, data memory module 204, host computer interface module 205, RF (Radio Frequency, radio frequency) data interface module 206 and RF control interface module 207.
Said clock module 201 is used to produce the clock of the required various frequencies of said dynamic checkout unit 20.
Concrete; Said clock module 201 adopts 26M from the radio frequency chip input as the synchronous clock source; Produce the required synchronous clock of transceive data under major clock and the different communication standard of whole dynamic checkout unit 20 work through DCM (Digital Clock Managers, digital dock administration module).
Because under GSM standard and TD-SCDMA standard and even the TD-LTE standard, be different for the rate requirement of signal.Therefore the said dynamic checkout unit 20 of the embodiment of the invention also need be operated under the corresponding clock frequency according to the difference of standard, and therefore said clock module 201 can produce at least two kinds of clock frequencies.In practical application, select the corresponding clock frequency according to said dynamic checkout unit 20 present located mode of operations.
Said register module 202 is used for receiving and preserve the corresponding configuration information (being corresponding control sequence of current test item and relevant time module) of current test item that said host computer 10 sends through said host computer interface module 205; And in the dynamic test process, access the control corresponding instruction according to the dispatch command that is received from said task scheduling modules 203, be sent to tested radio frequency front end chip 30 through said RF control interface module 207.
Need to prove that in the embodiment of the invention, said register module 202 can be read and write through host computer 10 softwares, does not relate to hardware modifications, therefore can realize fast reading and writing.
Said task scheduling modules 203 is used for controlling the switching of the mode of operation of said proving installation in the dynamic test process; According to the execution time of each steering order in the corresponding control sequence of current test item, send dispatch command to said register module 202, accomplish the timing of each steering order of dynamic test and call; Control the startup of said RF data interface module 206 and RF control interface module 207 and to the operation of tested radio frequency front end chip 30 each input and output (IO) ports.
Wherein, said execution time according to each steering order in the corresponding control sequence of current test item, send dispatch command to said register module 202, the timing of each steering order of completion dynamic test is called and is specially:
When carrying out dynamic test; The timer of said task scheduling modules 203 picks up counting; Send first dispatch command to said register module 202; After said register module 202 receives said first dispatch command, read article one steering order in the corresponding control sequence of current test item, wait for the arrival of said article one steering order execution time.
When the execution time of said article one steering order is arrived in timing; Said task scheduling modules 203 is sent second dispatch command to said register module 202; After said register module 202 receives said second dispatch command; Said article one steering order is sent to tested radio frequency front end chip 30 operations, and reads the second steering order in the corresponding control sequence of current test item, wait for the arrival of said second steering order execution time.
When the execution time of said second steering order is arrived in timing; Said task scheduling modules 203 is sent the 3rd dispatch command to said register module 202; After said register module 202 receives said the 3rd dispatch command; Said the 3rd steering order is sent to tested radio frequency front end chip 30 operations, and reads the 3rd steering order in the corresponding control sequence of current test item, wait for the arrival of said the 3rd steering order execution time.
And the like, accomplish timer-triggered scheduler to each bar steering order in the corresponding control sequence of current test item.
In the embodiment of the invention; Said register module 202 is according to the dispatch command that is received from said task scheduling modules 203; Read each corresponding bar steering order of current test item in advance and wait for the arrival of its execution time, can effectively avoid from register module 202, reading steering order and carry out the time-delay during this steering order, make when the execution time of each steering order reaches to reality; Can move this steering order immediately, reach the purpose that every steering order can both accurate timing.
What need further specify is: the mode of operation of said proving installation comprises: single operational mode and circular flow pattern.
Said circular flow pattern is meant; All steering orders corresponding with current test item are one-period; Begin to carry out until the last item steering order from article one steering order, original state is got back in timer zero clearing then; Begin to carry out from article one steering order again, so all steering orders are carried out in circulation.This mode of operation is applicable in the analog wireless communication process of carrying out data transmit-receive according to communication protocol.For example, the transmitting-receiving of under the TD-SCDMA standard, being undertaken, or the form that happens suddenly under the GSM standard by time slot.
Said single operational mode is meant: all only that current test item is corresponding steering orders are carried out once, return idle condition then.This moment, said tested radio frequency front end chip rested on the state when executing the last item steering order, can verify the influence of the operation of certain a series of steering order to tested radio frequency front end chip thus.
Data are used in the communication that said data memory module 204, the communication of launching when being used to store said tested radio frequency front end chip 30 transmission tests are received during with data and acceptance test.
Concrete, said data memory module comprises: data transmission unit and Data Receiving unit.
Said data transmission unit is used for when transmission test, in advance from the said host computer download communication with data and storage; When dynamic test runs to emission state, access corresponding data successively, be sent to said tested radio frequency front end chip through said RF data interface module.
Said Data Receiving unit is used for when acceptance test, and data are used in the communication that receives and store said tested radio frequency front end chip; After treating that acceptance test is accomplished, the data that receive through passing said host computer back on the said host computer interface module.
When transmission test; Said proving installation 20 is data download from the said host computer 10 in advance; And be stored in the said data memory module 204; When dynamic test runs to emission state, from said data memory module 204, access corresponding data successively, be sent to said tested radio frequency front end chip 30 through said RF data interface module 206.
When acceptance test; Said proving installation 20 will be received from the data storage of said tested radio frequency front end chip 30 in said data memory module 204; After treating that acceptance test is accomplished; Through passing said host computer back on the said host computer interface module 205, be used for follow-up data analysis work to the data that receive.
Said host computer interface module 205 is used to realize communicating by letter between said host computer 10 and the said proving installation 20.
Need to prove that said host computer interface module 205 comprises data communication and two kinds of operational modules of command communication.Wherein, under data communication mode, said host computer 10 is directly operated the data memory module 204 of said proving installation 20.Under the command communication module, the register module 202 of 10 pairs of said proving installations 20 of said host computer is operated.Can realize the multiplexing function of bus thus, save hardware resource.
Said RF data interface module 206 is used for using data to said tested radio frequency front end chip 30 transmitting-receiving communications.
Concrete, said RF data interface module 206 can come the switch data transmission mode according to current communication standard.According to present general on the market standard, adopt the 10bit parallel interface under the TD standard, adopt the DIGRF interface under the GSM standard.
Edit the flow process of test with data source in order to simplify the tester, the emission data of storage are original base band datas in said data memory module 203.When transmission test, said RF data interface module 206 is handled the data of from said data memory module 203, reading respectively according to the difference of communication standard.Concrete, under the TD-SCDMA standard, said RF data interface module 206 is sent the data of reading into the pulse-shaping wave filter earlier, after filter process, redispatches to tested radio frequency front end chip; Under the GSM standard, said RF data interface module 206 adds interface protocol information according to the DIGRF agreement with the base band data of reading earlier, redispatches to tested radio frequency front end chip.
Said RF control interface module 207 is used to realize the read-write register of 20 pairs of said tested radio frequency front end chips 30 of proving installation and controling of corresponding I port.
Generally speaking, the read-write register of said tested radio frequency front end chip 30 adopts MOTOROLASPI interface and DIGRF interface, and said RF control interface module 207 can be switched according to the practical application needs.In the time need testing to the radio frequency front end chip of other types interface, only need the interface type of the corresponding said RF control interface of change module 207 to get final product, need not carry out too much modification to whole testing device.
In the embodiment of the invention; Employing is solidificated in hardware frame in the said dynamic checkout unit 20, the control sequence part that needs in the dynamic test debug process often to revise, realizes with the mode of register module 202; Promptly in dynamic checkout unit 20; It is enough big to make up a memory capacity, the register module 202 that structure is fixing, and the hardware that makes up the whole dynamic checkout unit 20 in back will not need to change again.During dynamic test, only need to edit control sequence, and in each dynamic test process, send the corresponding control sequence of current test item to said dynamic checkout unit 20 through host computer 10; Said dynamic checkout unit 20 receives the corresponding control sequence of current test item; According to the execution time of each steering order in the corresponding control sequence of current test item; Access the control corresponding instruction successively; Be sent to tested radio frequency front end chip 30, realize dynamic test said tested radio frequency front end chip 30.Accomplish when test, can be stored in the current control sequence that edits in the host computer 10, avoid causing losing of content of registers after dynamic checkout unit 20 power down.
The course of work in the face of the described dynamic test system of the embodiment of the invention describes in detail down.
Be in idle condition (IDLE) after said dynamic checkout unit 20 powers on, this moment, host computer 10 carried out following operation:
(1) edits the required control sequence of current dynamic test, and set the execution time of each bar steering order.
(2) verify that through the mode of single step run each step of said control sequence (being each bar steering order) carries out after, said tested radio frequency front end chip 30 residing states.
(3) download data to the said dynamic checkout unit 20 that need be sent to tested radio frequency front end chip in the transmission test; Perhaps upload the data that from said tested radio frequency front end chip 30, receive in the acceptance test.
(4) correlation parameter of the said dynamic checkout unit 20 of configuration is like the frequency of operation of interface, switch RF control interface module etc.
(5) preserve when Pretesting required control sequence and relevant time module, the configuration that keeps in the test before perhaps loading.
Under above-mentioned idle condition, the required configuration settings of dynamic test process good after, the Control Software through host computer 10 makes said dynamic checkout unit 20 get into operational modes (RUN).At first; The Control Software of host computer 10 writes the corresponding configuration information of current test item that configures in the register module 202 of said dynamic checkout unit 20; The task scheduling modules 203 of said then dynamic checkout unit 20 is started working; When the execution time that runs to certain bar steering order correspondence puts; Carry out this steering order, be the operation that 20 pairs of tested radio frequency front end chips 30 of dynamic checkout unit are correlated with, for example write the register of radio frequency front end chip 30 or change the level etc. of corresponding IO port.
The mode of operation of said dynamic checkout unit 20 comprises two kinds: single operational mode and circular flow pattern.These two kinds of mode of operations can be tackled different testing requirements.
When selecting the circular flow pattern; All steering orders corresponding with current test item are one-period; Begin to carry out until the last item steering order from article one steering order, original state is got back in timer zero clearing then; Begin to carry out from article one steering order again, so all steering orders are carried out in circulation.This mode of operation is applicable in the analog wireless communication process of carrying out data transmit-receive according to communication protocol.For example, the transmitting-receiving of under the TD-SCDMA standard, being undertaken, or the form that happens suddenly under the GSM standard by time slot.
When selecting the single operational mode, all then only that current test item is corresponding steering orders are carried out once, return idle condition then.This moment, said tested radio frequency front end chip 30 rested on the state when executing the last item steering order, can verify the influence of the operation of certain a series of steering order to tested radio frequency front end chip 30 thus.
Need to prove; In the dynamic test process; In case said dynamic checkout unit 20 gets into operational mode; To not need to carry out the control of any manual work between the Control Software of said host computer 10 and the dynamic checkout unit 20 again, and promptly not have the mutual of any data between the two again, all will be accomplished by said dynamic checkout unit 20 controling all of tested radio frequency front end chip 30 automatically.Can reduce tester's operation element amount thus greatly, make it be absorbed in test analysis of phenomenon and record, need more not operate proving installation.
More than to the dynamic checkout unit and the system of a kind of radio frequency front end chip provided by the present invention; Carried out detailed introduction; Used concrete example among this paper principle of the present invention and embodiment are set forth, the explanation of above embodiment just is used for helping to understand method of the present invention and core concept thereof; Simultaneously, for one of ordinary skill in the art, according to thought of the present invention, part all can change on embodiment and range of application.In sum, this description should not be construed as limitation of the present invention.

Claims (11)

1. the dynamic test system of a radio frequency front end chip is characterized in that, said system comprises: host computer and dynamic checkout unit;
Said host computer connects tested radio frequency front end chip through dynamic checkout unit;
Said host computer, the control sequence that is used to edit and store required all test items of dynamic test; In the dynamic test process, send the corresponding control sequence of current test item to said dynamic checkout unit;
Said dynamic checkout unit is used to receive and preserve the corresponding control sequence of current test item that said host computer sends; And in the dynamic test process, the execution time according to each steering order in the corresponding control sequence of current test item, access the control corresponding instruction successively, be sent to tested radio frequency front end chip.
2. the dynamic test system of radio frequency front end chip according to claim 1; It is characterized in that said dynamic checkout unit comprises: clock module, register module, task scheduling modules, data memory module, host computer interface module, RF data interface module and RF control interface module;
Said clock module is used to produce the clock of the required various frequencies of said dynamic checkout unit;
Said register module is used for receiving and preserve the corresponding control sequence of current test item that said host computer sends through said host computer interface module; And in the dynamic test process, access the control corresponding instruction according to the dispatch command that is received from said task scheduling modules, be sent to tested radio frequency front end chip through said RF control interface module;
Said task scheduling modules is used for controlling the switching of said proving installation mode of operation in the dynamic test process; According to the execution time of each steering order in the corresponding control sequence of current test item, send dispatch command to said register module; Control the startup of said RF data interface module and RF control interface module and to the operation of tested each IO port of radio frequency front end chip;
Said data memory module, data are used in the communication of receiving when data of launching when being used to store said tested radio frequency front end chip transmission test and acceptance test;
Said host computer interface module is used to realize communicating by letter between said host computer and the said proving installation;
Said RF data interface module is used for using data to said tested radio frequency front end chip transmitting-receiving communication;
Said RF control interface module is used to realize the operation of said proving installation to the read-write register and the relevant IO port of said tested radio frequency front end chip.
3. the dynamic test system of radio frequency front end chip according to claim 2; It is characterized in that; Said clock module adopts 26M from the radio frequency front end chip input as the synchronous clock source, produces the required synchronous clock of transceive data under major clock and the different communication standard of said dynamic checkout unit work through digital dock administration module DCM.
4. the dynamic test system of radio frequency front end chip according to claim 2 is characterized in that, the mode of operation of said proving installation comprises: single operational mode and circular flow pattern;
Said circular flow pattern does; All steering orders corresponding with current test item are one-period; Begin to carry out until the last item steering order from article one steering order, original state is returned in the timer zero clearing; Begin to carry out from article one steering order again, so all steering orders are carried out in circulation;
Said single operational mode is that all steering orders that current test item is corresponding are carried out once, return idle condition.
5. the dynamic test system of radio frequency front end chip according to claim 2 is characterized in that, said data memory module comprises: data transmission unit and Data Receiving unit;
Said data transmission unit is used for when transmission test, in advance from the said host computer download communication with data and storage; When dynamic test runs to emission state, access corresponding data successively, be sent to said tested radio frequency front end chip through said RF data interface module;
Said Data Receiving unit is used for when acceptance test, and data are used in the communication that receives and store said tested radio frequency front end chip; After treating that acceptance test is accomplished, the data that receive through passing said host computer back on the said host computer interface module.
6. the dynamic test system of radio frequency front end chip according to claim 2 is characterized in that, said host computer interface module comprises two kinds of mode of operations: data communication mode and command communication pattern;
Under data communication mode, said host computer interface module is used for said host computer said data memory module is operated;
Under the command communication module, said host computer interface module is used for said host computer said register module is operated.
7. the dynamic checkout unit of a radio frequency front end chip is characterized in that, said device is used to cooperate host computer that tested radio frequency front end chip is carried out dynamic test;
Said device comprises: clock module, register module, task scheduling modules, data memory module, host computer interface module, RF data interface module and RF control interface module;
Said clock module is used to produce the clock of the required various frequencies of said dynamic checkout unit;
Said register module is used for receiving and preserve the corresponding control sequence of current test item that said host computer sends through said host computer interface module; And in the dynamic test process, access the control corresponding instruction according to the dispatch command that is received from said task scheduling modules, be sent to tested radio frequency front end chip through said RF control interface module;
Said task scheduling modules is used for controlling the switching of said proving installation mode of operation in the dynamic test process; According to the execution time of each steering order in the corresponding control sequence of current test item, send dispatch command to said register module; Control the startup of said RF data interface module and RF control interface module and to the operation of tested each IO port of radio frequency front end chip;
Data are used in the communication that said data memory module, the communication of launching when being used to store said tested radio frequency front end chip transmission test are received during with data and acceptance test;
Said host computer interface module is used to realize communicating by letter between said host computer and the said proving installation;
Said RF data interface module is used for using data to said tested radio frequency front end chip transmitting-receiving communication;
Said RF control interface module is used to realize the operation of said proving installation to the read-write register and the relevant IO port of said tested radio frequency front end chip.
8. the dynamic test system of radio frequency front end chip according to claim 7; It is characterized in that; Said clock module adopts 26M from the radio frequency front end chip input as the synchronous clock source, produces the required synchronous clock of transceive data under major clock and the different communication standard of said dynamic checkout unit work through digital dock administration module DCM.
9. the dynamic test system of radio frequency front end chip according to claim 7 is characterized in that, the mode of operation of said proving installation comprises: single operational mode and circular flow pattern;
Said circular flow pattern does; All steering orders corresponding with current test item are one-period; Begin to carry out until the last item steering order from article one steering order, original state is returned in the timer zero clearing; Begin to carry out from article one steering order again, so all steering orders are carried out in circulation;
Said single operational mode is that all steering orders that current test item is corresponding are carried out once, return idle condition.
10. the dynamic test system of radio frequency front end chip according to claim 7 is characterized in that, said data memory module comprises: data transmission unit and Data Receiving unit;
Said data transmission unit is used for when transmission test, in advance from the said host computer download communication with data and storage; When dynamic test runs to emission state, access corresponding data successively, be sent to said tested radio frequency front end chip through said RF data interface module;
Said Data Receiving unit is used for when acceptance test, and data are used in the communication that receives and store said tested radio frequency front end chip; After treating that acceptance test is accomplished, the data that receive through passing said host computer back on the said host computer interface module.
11. the dynamic test system of radio frequency front end chip according to claim 7 is characterized in that, said host computer interface module comprises two kinds of mode of operations: data communication mode and command communication pattern;
Under data communication mode, said host computer interface module is used for said host computer said data memory module is operated;
Under the command communication module, said host computer interface module is used for said host computer said register module is operated.
CN201210089304.0A 2012-03-29 2012-03-29 Dynamic test device and system of radio-frequency front-end chip Expired - Fee Related CN102621478B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201210089304.0A CN102621478B (en) 2012-03-29 2012-03-29 Dynamic test device and system of radio-frequency front-end chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201210089304.0A CN102621478B (en) 2012-03-29 2012-03-29 Dynamic test device and system of radio-frequency front-end chip

Publications (2)

Publication Number Publication Date
CN102621478A true CN102621478A (en) 2012-08-01
CN102621478B CN102621478B (en) 2014-04-02

Family

ID=46561509

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201210089304.0A Expired - Fee Related CN102621478B (en) 2012-03-29 2012-03-29 Dynamic test device and system of radio-frequency front-end chip

Country Status (1)

Country Link
CN (1) CN102621478B (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102946257A (en) * 2012-11-05 2013-02-27 中兴通讯股份有限公司 Multi-mode receiver and receiving method of multi-mode receiver
CN105357379A (en) * 2015-10-27 2016-02-24 上海斐讯数据通信技术有限公司 Method and system for making intelligent terminal still be effective after being restarted under specific mode
CN107589366A (en) * 2017-10-16 2018-01-16 江苏钜芯集成电路技术股份有限公司 A kind of radio transmitting and receiving chip batch-testing device and its method
CN108427127A (en) * 2018-01-31 2018-08-21 交通运输部水运科学研究所 The test method and device of baseband chip performance
CN109582348A (en) * 2018-11-22 2019-04-05 Tcl移动通信科技(宁波)有限公司 Processing method, mobile terminal and storage medium is arranged in mobile terminal radio frequency
CN111781488A (en) * 2020-06-24 2020-10-16 芯佰微电子(北京)有限公司 Chip and chip test system
CN113708905A (en) * 2021-08-18 2021-11-26 Oppo广东移动通信有限公司 Control method and device of radio frequency front end, terminal and chip
CN115623077A (en) * 2022-10-18 2023-01-17 开元华创科技(集团)有限公司 Autonomous controllable test system
CN116203856A (en) * 2023-05-04 2023-06-02 成都天成电科科技有限公司 Universal test method and device based on parameter configuration and storage medium

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5951705A (en) * 1997-10-31 1999-09-14 Credence Systems Corporation Integrated circuit tester having pattern generator controlled data bus
CN1407560A (en) * 2001-09-05 2003-04-02 富士通株式会社 Semiconductor device equiped with memory and logical chips for testing memory ships
US20070153597A1 (en) * 2005-12-30 2007-07-05 Industrial Technology Research Institute Built-in memory current test circuit
JP2010250905A (en) * 2009-04-16 2010-11-04 Toshiba Corp Semiconductor integrated circuit and method for testing the same
CN102288895A (en) * 2011-05-05 2011-12-21 清华大学 On-chip auxiliary testing system of delta-sigma analog-digital converter and auxiliary testing method of same

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5951705A (en) * 1997-10-31 1999-09-14 Credence Systems Corporation Integrated circuit tester having pattern generator controlled data bus
CN1407560A (en) * 2001-09-05 2003-04-02 富士通株式会社 Semiconductor device equiped with memory and logical chips for testing memory ships
US20070153597A1 (en) * 2005-12-30 2007-07-05 Industrial Technology Research Institute Built-in memory current test circuit
JP2010250905A (en) * 2009-04-16 2010-11-04 Toshiba Corp Semiconductor integrated circuit and method for testing the same
CN102288895A (en) * 2011-05-05 2011-12-21 清华大学 On-chip auxiliary testing system of delta-sigma analog-digital converter and auxiliary testing method of same

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102946257B (en) * 2012-11-05 2016-01-20 中兴通讯股份有限公司 A kind of multimode rake receiver and method of reseptance thereof
US9634872B2 (en) 2012-11-05 2017-04-25 Zte Corporation Multimode receiver and receiving method therefor
CN102946257A (en) * 2012-11-05 2013-02-27 中兴通讯股份有限公司 Multi-mode receiver and receiving method of multi-mode receiver
CN105357379A (en) * 2015-10-27 2016-02-24 上海斐讯数据通信技术有限公司 Method and system for making intelligent terminal still be effective after being restarted under specific mode
CN107589366B (en) * 2017-10-16 2023-09-29 江苏钜芯集成电路技术股份有限公司 Batch testing device and method for wireless transceiver chips
CN107589366A (en) * 2017-10-16 2018-01-16 江苏钜芯集成电路技术股份有限公司 A kind of radio transmitting and receiving chip batch-testing device and its method
CN108427127A (en) * 2018-01-31 2018-08-21 交通运输部水运科学研究所 The test method and device of baseband chip performance
CN109582348A (en) * 2018-11-22 2019-04-05 Tcl移动通信科技(宁波)有限公司 Processing method, mobile terminal and storage medium is arranged in mobile terminal radio frequency
CN111781488B (en) * 2020-06-24 2023-04-07 芯佰微电子(北京)有限公司 Chip and chip test system
CN111781488A (en) * 2020-06-24 2020-10-16 芯佰微电子(北京)有限公司 Chip and chip test system
CN113708905A (en) * 2021-08-18 2021-11-26 Oppo广东移动通信有限公司 Control method and device of radio frequency front end, terminal and chip
CN115623077A (en) * 2022-10-18 2023-01-17 开元华创科技(集团)有限公司 Autonomous controllable test system
CN115623077B (en) * 2022-10-18 2023-08-18 开元华创科技(集团)有限公司 Autonomous controllable test system
CN116203856A (en) * 2023-05-04 2023-06-02 成都天成电科科技有限公司 Universal test method and device based on parameter configuration and storage medium
CN116203856B (en) * 2023-05-04 2023-10-31 成都天成电科科技有限公司 Universal test method and device based on parameter configuration and storage medium

Also Published As

Publication number Publication date
CN102621478B (en) 2014-04-02

Similar Documents

Publication Publication Date Title
CN102621478B (en) Dynamic test device and system of radio-frequency front-end chip
US9065693B2 (en) Event handling in a radio circuit
CN102497237A (en) Radio frequency and microwave synthetic instrument based on PXIe (PCI Extensions for Instrumentation) synthetic instrument architecture
CN101938293B (en) Multimode-supporting radio frequency transceiver, terminal and switching method of terminal
CN105323387A (en) Apparatus, system, and method for parallelizing UE wakeup process
CN101296057B (en) Waveshape signal processor based on software radio
EP1906537A2 (en) Method and system for sharing components in a time division multiplex wireless system
CN204539155U (en) A kind of testing apparatus of Bluetooth RF circuit
CN104636306A (en) RFFE main equipment port migration device and method based on single chip microcomputer
CN101820700A (en) Method and device for identifying operating mode of base station, and base station
CN105403786A (en) System and method for testing radio frequency power amplifier in mobile terminal
CN105188077A (en) Communication module test method and system
CN102546037A (en) WIMAX (worldwide interoperability for microwave access) and WIFI (wireless fidelity) coupling test method
CN103544108A (en) System and method for testing embedded software integration strength
CN215818133U (en) Wireless data transmission device
US9332495B2 (en) Method and device of supporting arbitrary replacement of multiple data units
CN104865854A (en) Chip control method and device
CN102176231B (en) UHF RFID (Ultra High Frequency-Radio Frequency Identification Device) antenna demultiplexer
CN203445876U (en) Radio frequency signal output power control device and terminal equipment
CN114142502A (en) Parallel operation control method for energy storage converter and energy storage converter
CN102868461A (en) Base band test method, device and system
CN201936329U (en) UHF (UltraHigh Frequency) RFID (Radio Frequency Identification) antenna demultiplexer
CN203492024U (en) Radiofrequency signal output power controlling device and terminal equipment
CN111162851A (en) Method and device for frequency band matching of repeater
CN107704789B (en) Method and device for automatically switching electronic tag among multiple protocols

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20140402

Termination date: 20210329