CN102609388B - Slave node circuit, communication method and communication device - Google Patents
Slave node circuit, communication method and communication device Download PDFInfo
- Publication number
- CN102609388B CN102609388B CN201210050153.8A CN201210050153A CN102609388B CN 102609388 B CN102609388 B CN 102609388B CN 201210050153 A CN201210050153 A CN 201210050153A CN 102609388 B CN102609388 B CN 102609388B
- Authority
- CN
- China
- Prior art keywords
- triple gate
- data transmission
- transmission unit
- monostable circuit
- communication controler
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Dc Digital Transmission (AREA)
Abstract
The invention discloses a slave node circuit, a communication method and a communication device, relating to the communication field. The slave node circuit, the communication method and the communication device are used for preventing a bus from hanging so as to guarantee normal data transmission, wherein the slave node circuit is located between a data sending unit and a universal asynchronism receiver transmitter (UART) bus; the slave node circuit comprises a triple gate and a monostable circuit; an input end of the triple gate is connected with the data sending unit; an output end of the triple gate is connected with the UART bus; the triple gate is used for controlling connection state of the communication controller and the UART bus; the monostable circuit comprises a first input end and an output end; the first input end of the monostable circuit is connected with the data sending unit; the output end of the monostable circuit is connected with an enabling end of the triple gate.
Description
Technical field
The present invention relates to the communications field, particularly relate to a kind of from node circuit, communication means and communicator.
Background technology
In card insertion type communication device, host CPU (Central Processing Unit, be called for short CPU) between plate and various expansion board, need to be intercomed mutually by universal asynchronous receiving-transmitting transmitter (Universal Asynchronous Receiver/Transmitter the is called for short UART) bus of backboard.
Adopt UART bus to carry out data transmission, generally realized by principal and subordinate's serial ports of point to multi--point, a host node, all the other are from node.When host node is with when being connected from the serial ports between node with bus mode, respectively send bus from nodes sharing one.In prior art, host CPU plate normally adopts code translator (such as: 74ls138 chip) poll and to open in expansion board each from the method for the enable pin of node (triple gate), to make can send/receive signal between host CPU plate and expansion board.
But, when using this serial bus communication, because all transmitting terminals from node all hang in same serial TX (transmit transmits) bus, under normal circumstances, only have a transmitting terminal from node to send data.When host node or when not having data to send from node, normally send high level, it is high for maintaining universal serial bus; If but wherein any one is from nodes break down, such as one the enable pin fault from node, fixing transmission low level, this TX bus will be dragged down always, other can not re-use this TX bus from node, may hang whole piece bus, and namely so-called bus occur and hangs phenomenon for one from node damage, badly influence the normal transmission of data, and the normal operation of whole communication system.
Summary of the invention
Embodiments of the invention provide a kind of from node circuit, communication means and communicator, in order to prevent bus from hanging, thus ensure data normal transmission.
For achieving the above object, embodiments of the invention adopt following technical scheme:
A kind of from node circuit, comprising:
Described from node circuit between the data transmission unit and universal asynchronous receiving-transmitting transmitter UART bus of communication controler, describedly comprise triple gate and monostable circuit from node circuit,
The input end of described triple gate is connected with described data transmission unit, UART bus described in the output termination of described triple gate, and described triple gate is for controlling the connection status between described communication controler and described UART bus;
Described monostable circuit comprises first input end and output terminal, the first input end of described monostable circuit is connected with described data transmission unit, the output terminal of described monostable circuit connects the Enable Pin of described triple gate, the data that described monostable circuit is used for the data transmission unit of described communication controler sends are converted to control signal, to control the logic state of described triple gate, when hanging appears in described data transmission unit, the enable pin controlling described triple gate is in high-impedance state to make described triple gate.
A kind of communication means, comprising:
When hanging appears in the data transmission unit of described communication controler, the data that the data transmission unit of described communication controler sends are converted to control signal by the described monostable circuit from node circuit, and the enable pin controlling described triple gate is in high-impedance state to make described triple gate, turns off to make the connection between described communication controler and described UART bus.
A kind of communicator, comprising:
Central processor CPU plate, backboard and at least one expansion board, described expansion board is provided with communication controler and from node circuit, described communication controler is communicated with the CPU that described CPU board is arranged by the universal asynchronous receiving-transmitting transmitter UART bus that described backboard is arranged;
Described from node circuit between the data transmission unit and universal asynchronous receiving-transmitting transmitter UART bus of communication controler, describedly comprise triple gate and monostable circuit from node circuit,
The input end of described triple gate is connected with described data transmission unit, UART bus described in the output termination of described triple gate, and described triple gate is for controlling the connection status between described communication controler and described UART bus;
Described monostable circuit comprises first input end and output terminal, the first input end of described monostable circuit is connected with described data transmission unit, the output terminal of described monostable circuit connects the Enable Pin of described triple gate, the data that described monostable circuit is used for the data transmission unit of described communication controler sends are converted to control signal, to control the logic state of described triple gate, when hanging appears in described data transmission unit, the enable pin controlling described triple gate is in high-impedance state to make described triple gate.
The embodiment of the present invention provide from node circuit, communication means and communicator, by the first input end of monostable circuit is connected with data transmission unit, output terminal connects the Enable Pin of this triple gate, thus control the logic state of triple gate, like this, when data transmission unit occurs hanging phenomenon, the enable pin controlling triple gate is in high-impedance state to make triple gate, thus prevent bus to hang, and then ensure data normal transmission.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
The schematic diagram from node circuit that Fig. 1 provides for the embodiment of the present invention;
The another kind that Fig. 2 provides for the embodiment of the present invention is from the schematic diagram of node circuit;
The structural representation of the communicator that Fig. 3 provides for the embodiment of the present invention;
The schematic flow sheet of the communication means that Fig. 4 provides for the embodiment of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, be clearly and completely described the technical scheme in the embodiment of the present invention, obviously, described embodiment is only the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
The embodiment of the present invention provide from node circuit, as shown in Figure 1, should from node circuit between the data transmission unit and universal asynchronous receiving-transmitting transmitter UART bus of communication controler, triple gate and monostable circuit should be comprised from node circuit;
The input end of this triple gate is connected with the data transmission unit of this communication controler, the output termination UART bus of triple gate, and triple gate is for controlling the connection status between communication controler and UART bus;
This monostable circuit comprises first input end and output terminal, the first input end of monostable circuit is connected with the data transmission unit of communication controler, the output terminal of monostable circuit connects the Enable Pin of triple gate, monostable circuit is used for the data that the data transmission unit of communication controler sends to be converted to control signal, to control the logic state of triple gate, when hanging appears in data transmission unit, the enable pin controlling triple gate is in high-impedance state to make triple gate.
Triple gate generally exports high level and low level two states, i.e. one state and " 0 " state, and export the third state-high-impedance state in addition, the output of high-impedance state is equivalent to partition state.The output of triple gate logic state, realizes by controlling Enable Pin.For example, when input low level signal, triple gate presents the output of " 1 " or " 0 " normally; When input high level signal, triple gate presents high-impedance state, i.e. off-state.The high level signal that the present embodiment adopts monostable circuit to produce or low level signal control the output state of triple gate, and then control the break-make of the signal circuit residing for triple gate.In addition, the embodiment of the present invention also can adopt the effective triple gate of high level, and namely the Enable Pin of triple gate is when receiving high level signal, and triple gate is in conducting state, and when receiving low level signal, triple gate is in high-impedance state.
Be described for the triple gate of Low level effective below, specific implementation process is:
When the data transmission unit of communication controler normally sends data, the data that data transmission unit sends can be converted to low level signal, i.e. " 0 " pulse signal by monostable circuit, make conducting between communication controler and UART bus to control triple gate.As shown in Figure 2, the monostable circuit of the present embodiment also comprises the second input end, this communication controler also comprises control module, after communication controler detects that data transmission unit normally sends ED, and the control module of communication controler, such as CPU, can produce a look-at-me, and this look-at-me is sent to the second input end of monostable circuit, the second input end is after receiving this look-at-me, produce a high level signal at once, be in high-impedance state to make triple gate.
When the data transmission unit of communication controler breaks down and occurs hanging, such as, when continuing to send low level signal or high level signal, input signal is converted to high level signal by monostable circuit, i.e. " 1 " pulse signal, and send to the control Enable Pin of triple gate, after this control Enable Pin receives this high level signal, triple gate is made to be in high-impedance state, even if communication controler and UART bus is separated, thus the communication controler avoided owing to breaking down takies bus and causes bus to hang phenomenon, and then ensure data normal transmission, and compare prior art, circuit structure is simple, thus saved production cost, concrete, this triple gate can be chip 74125.
It should be noted that, above-described embodiment is described for producing high level signal during transient state by regime shift for monostable circuit, but the present embodiment is not limited thereto, the present embodiment also can adopt by regime shift produces the monostable circuit of low level signal when being transient state, meanwhile, the effective triple gate of triple gate corresponding employing high level.Specific implementation step is in such cases identical with said method, does not repeat them here.
The embodiment of the present invention from node circuit, the connection status between communication controler and UART bus is controlled by triple gate, and by monostable circuit, the data that communication controler data transmission unit sends are converted to the control signal controlling triple gate logic state, so, when data transmission unit occurs hanging phenomenon, the enable pin that monostable circuit controls triple gate is in high-impedance state to make triple gate, thus prevents bus to hang phenomenon, and then ensures data normal transmission.
Optionally, this UART bus can also be connected with power module, for when triple gate is in shutoff for UART bus provides high level signal, and it is optional, this power module is also connected with a resistance, by this resistance for this universal serial bus provides high level signal, All other routes can not be affected like this and use UART bus transfer signal.
Corresponding from node circuit with above-mentioned, the embodiment of the present invention also provides a kind of communication means, as shown in Figure 3, comprising:
Step 301, when hanging appears in the data transmission unit of communication controler, from the monostable circuit of node circuit, the data that the data transmission unit of this communication controler sends are converted to control signal, and the enable pin controlling triple gate is in high-impedance state to make this triple gate, turns off to make the connection between this communication controler and this UART bus.
Concrete, when the data transmission unit of communication controler normally sends data, the data that data transmission unit sends can be converted to low level signal from the monostable circuit of node circuit, i.e. " 0 " pulse signal, conducting between communication controler and UART bus is made to control triple gate, further, after communication controler detects that data transmission unit normally sends ED
This communication means also comprises: the look-at-me that the control module that the second input end of step 302, this monostable circuit receives this communication controler produces when data transmission unit sends ED, and according to this look-at-me, produce the second control signal at once and be in high-impedance state to control this triple gate.
Concrete, the control module of communication controler, such as CPU, a look-at-me can be produced, and this look-at-me being sent to the second input end of monostable circuit, the second input end, after receiving this look-at-me, produces the second control signal at once, i.e. high level signal, is in high-impedance state to make triple gate.
When the data transmission unit of communication controler breaks down and occurs hanging, such as, when continuing to send low level signal or high level signal, from the monostable circuit of node circuit, input signal is converted to high level signal, i.e. " 1 " pulse signal, and send to the control Enable Pin of triple gate, after this control Enable Pin receives this high level signal, triple gate is made to be in high-impedance state, even if communication controler and UART bus is separated, thus the communication controler avoided owing to breaking down takies bus and causes bus to hang phenomenon, and then ensure data normal transmission, and compare prior art, circuit structure is simple, thus saved production cost, concrete, this triple gate can be chip 74125.
The communication means that the embodiment of the present invention provides, when data transmission unit occurs hanging phenomenon, the enable pin that monostable circuit controls triple gate is in high-impedance state to make triple gate, thus prevents bus to hang phenomenon, and then ensures data normal transmission.
The communicator that the embodiment of the present invention provides, as shown in Figure 4, comprise: central processor CPU plate, backboard (not shown) and at least one expansion board, this expansion board is provided with communication controler and from node circuit, this communication controler is communicated with the CPU that this CPU board is arranged by the universal asynchronous receiving-transmitting transmitter UART bus that this backboard is arranged;
From node circuit between the data transmission unit and universal asynchronous receiving-transmitting transmitter UART bus of communication controler, should should comprise triple gate and monostable circuit from node circuit,
The input end of this triple gate is connected with this data transmission unit, the output termination UART bus of this triple gate, and this triple gate is for controlling the connection status between this communication controler and this UART bus; This monostable circuit comprises first input end and output terminal, the first input end of this monostable circuit is connected with this data transmission unit, the output terminal of this monostable circuit connects the Enable Pin of this triple gate, this monostable circuit is used for the data that the data transmission unit of this communication controler sends to be converted to control signal, to control the logic state of this triple gate, when hanging appears in this data transmission unit, the enable pin controlling this triple gate is in high-impedance state to make this triple gate.
When communication controler breaks down, by the control Enable Pin controlling triple gate from the monostable circuit node circuit that expansion board is arranged, to make to turn off between communication controler and UART bus, thus prevent UART bus to hang phenomenon, and then ensure data normal transmission, and compare prior art, circuit structure is simple, thus has saved production cost.
Be described for the triple gate of Low level effective below, specific implementation process is:
When the data transmission unit of the communication controler in expansion board normally sends data, the data that data transmission unit sends can be converted to low level signal by monostable circuit, i.e. " 0 " pulse signal, make conducting between communication controler and UART bus to control triple gate, and then the communication controler in expansion board is communicated with the CPU in CPU board.As shown in Figure 4, the monostable circuit of the present embodiment also comprises the second input end, this communication controler also comprises control module, after communication controler detects that data transmission unit normally sends ED, and the control module of communication controler, such as CPU, can produce a look-at-me, and this look-at-me is sent to the second input end of monostable circuit, the second input end is after receiving this look-at-me, produce a high level signal at once, be in high-impedance state to make triple gate.
When the data transmission unit of the communication controler in expansion board breaks down and occurs hanging, such as, when continuing to send low level signal or high level signal, input signal is converted to high level signal by monostable circuit, i.e. " 1 " pulse signal, and send to the control Enable Pin of triple gate, after this control Enable Pin receives this high level signal, triple gate is made to be in high-impedance state, even if communication controler and UART bus is separated, thus the communication controler avoided owing to breaking down takies bus and causes bus to hang phenomenon, and then ensure data normal transmission, and compare prior art, circuit structure is simple, thus saved production cost, concrete, this triple gate can be chip 74125.
The communicator of the embodiment of the present invention, by passing through to arrange from node circuit in expansion board, and from node circuit, the connection status between communication controler and UART bus should be controlled by triple gate, and by monostable circuit, the data that communication controler data transmission unit sends are converted to the control signal controlling triple gate logic state, when data transmission unit occurs hanging phenomenon, the enable pin that monostable circuit controls triple gate is in high-impedance state to make triple gate, thus prevent bus to hang phenomenon, and then ensure data normal transmission.
Optionally, this UART bus can also be connected with power module, for when triple gate is in shutoff for UART bus provides high level signal, and it is optional, this power module is also connected with a resistance, by this resistance for this universal serial bus provides high level signal, All other routes can not be affected like this and use UART bus transfer signal.
The above; be only the specific embodiment of the present invention, but protection scope of the present invention is not limited thereto, is anyly familiar with those skilled in the art in the technical scope that the present invention discloses; change can be expected easily or replace, all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection domain of described claim.
Claims (8)
1. one kind from node circuit, it is characterized in that, described from node circuit between the data transmission unit and universal asynchronous receiving-transmitting transmitter UART bus of communication controler, describedly comprise triple gate and monostable circuit from node circuit, described communication controler comprises control module
The input end of described triple gate is connected with described data transmission unit, UART bus described in the output termination of described triple gate, and described triple gate is for controlling the connection status between described communication controler and described UART bus;
Described monostable circuit comprises first input end, the second input end and output terminal, the first input end of described monostable circuit is connected with described data transmission unit, the output terminal of described monostable circuit connects the Enable Pin of described triple gate, the data that described monostable circuit is used for the data transmission unit of described communication controler sends are converted to control signal, to control the logic state of described triple gate, when hanging appears in described data transmission unit, the enable pin controlling described triple gate is in high-impedance state to make described triple gate;
Second input end of described monostable circuit, for receiving the look-at-me that described control module produces when described data transmission unit sends ED;
Described monostable circuit also for according to described look-at-me, produces the second control signal at once and is in high-impedance state to control described triple gate.
2. according to claim 1 from node circuit, it is characterized in that, described data transmission unit occur hanging for: described data transmission unit continues to send low level signal or high level signal.
3. according to claim 1 and 2 from node circuit, it is characterized in that, the Enable Pin of described triple gate is when receiving the high level signal that described monostable circuit sends, and described triple gate is in high-impedance state;
When receiving the low level signal that described monostable circuit sends, described triple gate is in conducting state.
4. a communication means, is characterized in that, comprising:
When hanging appears in the data transmission unit of communication controler, from the monostable circuit of node circuit, the data that the data transmission unit of described communication controler sends are converted to control signal, and the enable pin controlling triple gate is in high-impedance state to make described triple gate, turns off to make the connection between described communication controler and UART bus;
The look-at-me that the control module that second input end of described monostable circuit receives described communication controler produces when described data transmission unit sends ED, and according to described look-at-me, produce the second control signal at once and be in high-impedance state to control described triple gate.
5. communication means according to claim 4, is characterized in that, described data transmission unit occurs hanging and is specially: described data transmission unit continues to send low level signal or high level signal.
6. a communicator, it is characterized in that, comprise: central processor CPU plate, backboard and at least one expansion board, described expansion board is provided with communication controler and from node circuit, described communication controler is communicated with the CPU that described CPU board is arranged by the universal asynchronous receiving-transmitting transmitter UART bus that described backboard is arranged;
Described from node circuit between the data transmission unit and universal asynchronous receiving-transmitting transmitter UART bus of communication controler, describedly comprise triple gate and monostable circuit from node circuit, described communication controler comprises control module,
The input end of described triple gate is connected with described data transmission unit, UART bus described in the output termination of described triple gate, and described triple gate is for controlling the connection status between described communication controler and described UART bus;
Described monostable circuit comprises first input end, the second input end and output terminal, the first input end of described monostable circuit is connected with described data transmission unit, the output terminal of described monostable circuit connects the Enable Pin of described triple gate, the data that described monostable circuit is used for the data transmission unit of described communication controler sends are converted to control signal, to control the logic state of described triple gate, when hanging appears in described data transmission unit, the enable pin controlling described triple gate is in high-impedance state to make described triple gate;
Second input end of described monostable circuit, for receiving the look-at-me that described control module produces when described data transmission unit sends ED, to make described monostable circuit according to described look-at-me, produce the second control signal at once and be in high-impedance state to control described triple gate.
7. communicator according to claim 6, is characterized in that, described data transmission unit occur hanging for: described data transmission unit continues to send low level signal or high level signal.
8. the communicator according to claim 6 or 7, is characterized in that, the Enable Pin of described triple gate is when receiving the high level signal that described monostable circuit sends, and described triple gate is in high-impedance state;
When receiving the low level signal that described monostable circuit sends, described triple gate is in conducting state.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210050153.8A CN102609388B (en) | 2012-02-29 | 2012-02-29 | Slave node circuit, communication method and communication device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210050153.8A CN102609388B (en) | 2012-02-29 | 2012-02-29 | Slave node circuit, communication method and communication device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102609388A CN102609388A (en) | 2012-07-25 |
| CN102609388B true CN102609388B (en) | 2015-03-25 |
Family
ID=46526773
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201210050153.8A Active CN102609388B (en) | 2012-02-29 | 2012-02-29 | Slave node circuit, communication method and communication device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102609388B (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110247704A (en) * | 2018-12-28 | 2019-09-17 | 合肥工业大学 | Photoelectric conversion expanding unit and method |
| CN111090602B (en) * | 2019-12-24 | 2022-04-15 | 成都天玙兴科技有限公司 | UART serial port transceiving self-adaption method and system |
| WO2021134392A1 (en) * | 2019-12-31 | 2021-07-08 | 视航机器人（佛山）有限公司 | Motherboard extension device and method applied to unmanned forklift |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5179661A (en) * | 1989-10-30 | 1993-01-12 | Hayes Microcomputer Products, Inc. | Method and apparatus for serial data flow control |
| CN2537177Y (en) * | 2002-02-06 | 2003-02-19 | 华为技术有限公司 | Circuit against serial port failure |
| CN1602475A (en) * | 2001-12-11 | 2005-03-30 | 诺基亚有限公司 | Asynchronous serial data interface |
-
2012
- 2012-02-29 CN CN201210050153.8A patent/CN102609388B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5179661A (en) * | 1989-10-30 | 1993-01-12 | Hayes Microcomputer Products, Inc. | Method and apparatus for serial data flow control |
| CN1602475A (en) * | 2001-12-11 | 2005-03-30 | 诺基亚有限公司 | Asynchronous serial data interface |
| CN2537177Y (en) * | 2002-02-06 | 2003-02-19 | 华为技术有限公司 | Circuit against serial port failure |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102609388A (en) | 2012-07-25 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10552366B2 (en) | Method of communication for master device and slave device on synchronous data bus wherein master and slave devices are coupled in parallel | |
| CN102611598B (en) | Bus redundancy system of controller local area network and method and device for switching redundancy | |
| CN104133799A (en) | Multi-network-card NCSI management system | |
| CN105159860A (en) | Inter-integrated circuit (IIC) extended system and method | |
| CN102130669A (en) | Method, system, device and network equipment for detecting state of hot-plug module | |
| CN103490959A (en) | Dual-redundancy CAN bus fault detection method | |
| CN102724093A (en) | Advanced telecommunications computing architecture (ATCA) machine frame and intelligent platform management bus (IPMB) connection method thereof | |
| KR101185971B1 (en) | Communication system, test device, communication device, communication method, and test method | |
| CN102609388B (en) | Slave node circuit, communication method and communication device | |
| CN110069437B (en) | RS-485 bus polarity self-adaption method based on response frame validity | |
| CN102098196B (en) | The data transmission method of blade server | |
| CN103428050A (en) | Multipath CAN (controller area network) simulation system based on CAN bus | |
| CN101847135B (en) | Series-connected communication system and communication method thereof | |
| CN204009884U (en) | A kind of many network interface cards NCSI management system | |
| CN102324126A (en) | Access controller and annular door access control system | |
| CN104135411A (en) | Device and method of implementing multi-node communication based on RS232 interface | |
| CN203858629U (en) | Protocol converter | |
| CN103473206A (en) | Data transmission method and I2C (Inter-Integrated Circuit) interface extender | |
| CN111858459B (en) | Processor and computer | |
| CN202886974U (en) | Server computer remote control system based on controller area network (CAN) bus | |
| US10891242B2 (en) | Embedded USB2 (eUSB2) repeater operation | |
| CN109802877A (en) | A kind of CAN bus based Communication System Design | |
| CN203606824U (en) | Circuit achieving intelligent serial port multiplexing through multi-way switch | |
| CN103079195B (en) | Wireless device and network address report method thereof | |
| US20140068130A1 (en) | Information processing apparatus and controlling method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20211109 Address after: 518043 No. 01, 39th floor, building a, antuoshan headquarters building, No. 33, antuoshan Sixth Road, Xiang'an community, Xiangmihu street, Futian District, Shenzhen, Guangdong Province Patentee after: Huawei Digital Energy Technology Co.,Ltd. Address before: 518129 Bantian HUAWEI headquarters office building, Longgang District, Guangdong, Shenzhen Patentee before: HUAWEI TECHNOLOGIES Co.,Ltd. |
|
| TR01 | Transfer of patent right |