CN102569428B - Longitudinal voltage-controlled varactor and preparation method thereof - Google Patents
Longitudinal voltage-controlled varactor and preparation method thereof Download PDFInfo
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- CN102569428B CN102569428B CN201010598472.3A CN201010598472A CN102569428B CN 102569428 B CN102569428 B CN 102569428B CN 201010598472 A CN201010598472 A CN 201010598472A CN 102569428 B CN102569428 B CN 102569428B
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- substrate
- polysilicon
- epitaxial loayer
- doping content
- groove
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Abstract
The invention discloses a longitudinal voltage-controlled varactor. The longitudinal voltage-controlled varactor comprises a substrate, wherein an epitaxial layer in the same doping type with the substrate is arranged on the substrate, the epitaxial layer comprises at least one trench, a dielectric layer is covered on the inner wall of the trench and the upper surface of the epitaxial layer, polysilicon is filled in the trench and the upper surface of the epitaxial layer, the polysilicon is connected through a metal to form one electrode of the voltage-controlled varactor, and the back surface of the substrate is deposited through the metal to form the other electrode of the voltage-controlled varactor. According to the structure disclosed by the invention, the area of the dielectric layer between the two electrodes is enlarged, and the regulation range of the capacitance value is widened. The invention further discloses a preparation method of the longitudinal voltage-controlled varactor.
Description
Technical field
The present invention relates to a kind of longitudinal voltage-controlled varactor, particularly the fluted longitudinal voltage-controlled varactor of a kind of tool.
Background technology
Phase-locked loop has in analog circuit and radio circuit to be applied extremely widely.And voltage control variodenser is a Primary Component in phase-locked loop, the performance of its capacitance adjustable extent on phase-locked loop plays vital impact.
Two kinds of voltage control variable capacitor structures are mainly contained in prior art.One adopts mos capacitance, and wherein Semiconductor substrate S (such as silicon) is through light dope, and at metal/add bias voltage between polysilicon gate and substrate, substrate forms depletion layer, voltage-regulation depletion widths thus regulate varactor capacitance value.Another kind adopts PN junction structure, regulates the width of knot depletion region to regulate the capacitance of variodenser by its reverse biased.The adjustable range of these two kinds of variodensers can be improved by change structure.
Summary of the invention
The technical problem to be solved in the present invention is to provide a kind of longitudinal voltage-controlled varactor, and it can improve the adjustable range of capacitance in variodenser.
For solving the problems of the technologies described above, longitudinal voltage-controlled varactor of the present invention: comprise substrate, described substrate there is the epitaxial loayer with substrate with identical conduction type, a groove is at least comprised in described epitaxial loayer, inwall and the described epitaxial loayer upper surface of described groove are coated with dielectric layer, polysilicon is filled in described groove and described epitaxial loayer upper surface, described polysilicon is connected to form an electrode of voltage control variodenser by metal, and substrate back controls another electrode of variodenser by Metal deposition coating-forming voltage.
The present invention also provides a kind of preparation method of longitudinal voltage-controlled varactor, and it comprises the steps:
(1) there is at Grown and substrate the epitaxial loayer of identical conduction type;
(2) adopt photoetching and etching technics, in described epitaxial loayer, form at least one groove;
(3) dielectric layer is covered at the upper surface of described trench wall and described epitaxial loayer;
(4) polysilicon deposition is to fill described groove, and forms predetermined thickness on said epitaxial layer there;
(5) polysilicon is drawn formation electrode by metal, after form another electrode at substrate back depositing metal.
In the structure of longitudinal voltage-controlled varactor of the present invention, introduce groove concept, make two interelectrode silica areas become large, capacity valve regulating range becomes large.
Accompanying drawing explanation
Below in conjunction with accompanying drawing and embodiment, the present invention is further detailed explanation:
Fig. 1 is the structural representation of longitudinal voltage-controlled varactor of the present invention;
Fig. 2 is longitudinal voltage-controlled varactor preparation flow figure of the present invention;
Fig. 3 implements the structural representation after forming groove in flow process of the present invention;
Fig. 4 be implement silica in flow process of the present invention formed after structural representation;
Fig. 5 implements the structural representation in flow process of the present invention after polysilicon deposition.
Embodiment
Longitudinal voltage-controlled varactor of the present invention, its structure is: comprise substrate, substrate there is the epitaxial loayer with substrate with identical conduction type, a groove is at least comprised in epitaxial loayer, inwall and the epitaxial loayer upper surface of groove are coated with dielectric layer, polysilicon is filled in groove and epitaxial loayer upper surface, and polysilicon is connected to form an electrode of voltage control variodenser by metal, and substrate back controls another electrode of variodenser by Metal deposition coating-forming voltage.Substrate generally can be silicon substrate, and dielectric layer is silicon oxide layer, can be formed by hot oxygen oxidizing process.Because substrate and polysilicon need to be drawn by electrode, therefore in specific design, the doping content of substrate and polysilicon is generally greater than the doping content of epitaxial loayer.
The doping content 10 of described substrate
14-10
16individual atom/cm
2, the doping content 10 of described epitaxial loayer
12-10
14individual atom/cm
2, the doping content of described polysilicon is 10
14-10
16individual atom/cm
2.The width of groove is 0.1-100 micron, and the degree of depth is 0.1-50 micron.
In said structure, introduce groove, make two interelectrode silica areas become large, capacity valve regulating range becomes large.
The preparation method of longitudinal voltage-controlled varactor of the present invention, comprises the steps (see Fig. 2):
(1) there is at Grown and substrate the epitaxial loayer of identical conduction type.Substrate can select heavily doped silicon substrate, and epitaxial growth epitaxial loayer is optional lightly doped on a silicon substrate, generally can adopt Chemical Vapor-Phase Epitaxy method.The doping type of epitaxial loayer is identical with the doping type of substrate.
(2) adopt photoetching and etching technics, in epitaxial loayer, form groove (see Fig. 3).The width of groove is 0.1-100 micron, and the degree of depth is 0.1-50 micron.The number of groove is relevant with the capacitance that will obtain, and groove is larger, and the scope of variable capacitance is larger.Etching generally adopts dry etch process.
(3) dielectric layer (see Fig. 4) is covered at the upper surface of trench wall and epitaxial loayer.This dielectric layer generally selects silica, can adopt hot oxygen oxidizing process, makes the silicaization of trench wall and epitaxial loayer upper surface generate silica.
(4) polysilicon deposition is with filling groove, and on epitaxial loayer, form predetermined thickness (can be 100 dust-5 microns) (see Fig. 5).Polysilicon requires that doping content is comparatively large, synchronously can adulterate, also can add annealing in process to be formed by ion implantation after deposit completes when deposit.The thickness that polysilicon exceeds on epitaxial loayer generally can be: 0.1-5 micron.
(5) polysilicon is drawn formation electrode by metal, after form another electrode at substrate back depositing metal.Consider the out-of-flatness on polysilicon layer surface, therefore can first pass through the planarizing process that CMP (chemical mechanical milling tech) carries out polysilicon surface.The making of electrode has come by following steps:
1) deposit interlayer film on the polysilicon, then etches the contact hole that described interlayer film forms described polysilicon; Interlayer film is generally silica, usually adopts the method for deposit to be formed.
2) depositing metal filling contact hole, and form metal wire (being the front metal in Fig. 1), as an electrode of voltage control variodenser.Here contact hole is filled and metal wire is formed by one-time process, such as adopts Damascus technics once to complete the making of contact hole filling and metal wire.And with aluminum or aluminum alloy as in the technique of metal wire, be generally and first adopt tungsten to complete the filling of contact hole, rear deposit aluminum or aluminum alloy forms metal wire.
3) another electrode of variodenser is controlled at the back side depositing metal coating-forming voltage of substrate.Substrate generally first needs to carry out reduction processing, and rear depositing metal (being the back metal in Fig. 1) forms electrode.
In said method, the doping content of substrate can be 10
14-10
16individual atom/cm
2, the doping content of epitaxial loayer can be 10
12-10
14individual atom/cm
2, the doping content of polysilicon can be 10
14-10
16individual atom/cm
2.The width of groove can be set to 0.1-100 micron, and the degree of depth can be set to 0.1-50 micron.
Claims (9)
1. a longitudinal voltage-controlled varactor, it is characterized in that: comprise substrate, described substrate there is the epitaxial loayer with substrate with identical conduction type, the doping content of described epitaxial loayer is less than the doping content of described substrate, a groove is at least comprised in described epitaxial loayer, inwall and the described epitaxial loayer upper surface of described groove are coated with dielectric layer, polysilicon is filled in described groove and described epitaxial loayer upper surface, described polysilicon is connected to form an electrode of voltage control variodenser by metal, substrate back controls another electrode of variodenser by Metal deposition coating-forming voltage.
2. voltage control variodenser as claimed in claim 1, it is characterized in that: described substrate is silicon substrate, described dielectric layer is silicon oxide layer.
3. voltage control variodenser as claimed in claim 1 or 2, is characterized in that: the doping content of described substrate is 10
14-10
16individual atom/cm
3, the doping content of described epitaxial loayer is 10
12-10
14individual atom/cm
3, the doping content of described polysilicon is 10
14-10
16individual atom/cm
3.
4. voltage control variodenser as claimed in claim 1 or 2, is characterized in that: the width of described groove is 0.1-100 micron, and the degree of depth is 0.1-50 micron.
5. a preparation method for longitudinal voltage-controlled varactor, is characterized in that, comprises the steps:
(1) there is at Grown and substrate the epitaxial loayer of identical conduction type; The doping content of described epitaxial loayer is less than the doping content of described substrate;
(2) adopt photoetching and etching technics, in described epitaxial loayer, form groove;
(3) dielectric layer is covered at the upper surface of described trench wall and described epitaxial loayer;
(4) polysilicon deposition is to fill described groove, and forms predetermined thickness on said epitaxial layer there;
(5) polysilicon is drawn formation electrode by metal, after form another electrode at substrate back depositing metal.
6. preparation method as claimed in claim 5, is characterized in that: described step (5) specifically can be:
1) deposit interlayer film on described polysilicon, then etches the contact hole that described interlayer film forms described polysilicon;
2) depositing metal is filled described contact hole and is formed metal wire, as an electrode of described voltage control variodenser;
3) another electrode of described voltage control variodenser is formed at the back side depositing metal of described substrate.
7. the preparation method as described in claim 5 or 6, is characterized in that: in described step 4, polysilicon predetermined thickness is on said epitaxial layer there 100 dust-5 microns.
8. the preparation method as described in claim 5 or 6, is characterized in that: the doping content of described substrate is 10
14-10
16individual atom/cm
3, the doping content of described epitaxial loayer is 10
12-10
14individual atom/cm
3, the doping content of described polysilicon is 10
14-10
16individual atom/cm
3.
9. the preparation method as described in claim 5 or 6, is characterized in that: the width of described groove is 0.1-100 micron, and the degree of depth is 0.1-50 micron.
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| CN201010598472.3A CN102569428B (en) | 2010-12-21 | 2010-12-21 | Longitudinal voltage-controlled varactor and preparation method thereof |
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| CN102569428A CN102569428A (en) | 2012-07-11 |
| CN102569428B true CN102569428B (en) | 2015-06-03 |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1707809A (en) * | 2004-06-08 | 2005-12-14 | Nec化合物半导体器件株式会社 | Semiconductor device |
| TW200742044A (en) * | 2006-04-27 | 2007-11-01 | Tae-Kyung Kim | MOS capacitor and method of manufacturing the same |
| CN100392866C (en) * | 2001-11-15 | 2008-06-04 | 通用半导体公司 | Trench MOSFET having low gate charge |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020137890A1 (en) * | 1997-03-31 | 2002-09-26 | Genentech, Inc. | Secreted and transmembrane polypeptides and nucleic acids encoding the same |
| US6683363B2 (en) * | 2001-07-03 | 2004-01-27 | Fairchild Semiconductor Corporation | Trench structure for semiconductor devices |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100392866C (en) * | 2001-11-15 | 2008-06-04 | 通用半导体公司 | Trench MOSFET having low gate charge |
| CN1707809A (en) * | 2004-06-08 | 2005-12-14 | Nec化合物半导体器件株式会社 | Semiconductor device |
| TW200742044A (en) * | 2006-04-27 | 2007-11-01 | Tae-Kyung Kim | MOS capacitor and method of manufacturing the same |
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| CN102569428A (en) | 2012-07-11 |
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