CN102546301A - Digital signal logic analyzing system - Google Patents
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Abstract
The invention relates to a digital signal logic analyzing system. The digital signal logic analyzing system comprises a digital communication transceiver, a protocol analyzing module, a user display module, a storage module and a protocol description document download module, wherein the digital communication transceiver is used for receiving and dispatching data in a mode of byte stream through at least one interface of at least one digital communication protocol; the storage module is used for storing a protocol description document of the digital communication protocol; the protocol analyzing module is used for receiving the byte stream from the digital communication transceiver, and analyzing the byte stream into structuralized data of a specific data structure according to the protocol description document; and the user display module is used for displaying the structuralized data in preset formats dynamically according to the protocol description document. Consequently, an integrated test simulation tool which is reliable, flexible and extremely expansive is provided for integration, maintenance and evaluation personnel of the system.
Description
Technical field
The present invention relates to the analytical test of digital signal, particularly a kind of digital signal logic analysis system of digital signal being carried out protocol analysis and emulation testing based on the protocol description document.
Background technology
Existing Digital Signal Analysis mainly adopts logic analyzer to carry out; Logic analyzer usually can be according to communications protocol from SPI (Serial Peripheral Interface; Serial Peripheral Interface), I2C (Inter-Integrated Circuit; The internal integration circuit), UART (Universal Asynchronous Receiver/Transmitter; Universal asynchronous receiver), the byte data of record communication and the form that changes with character, numerical value or level show on CAN, parallel interface, the USB buses such as (Universal Serial BUS, USBs).But according to the structural data of certain format packing, often can not from byte stream structure to packet resolve, thereby be difficult to fully satisfy the application requirements of protocal analysis often by logic analyzer for the data of transmitting on the bus.Some network protocol analysis appearance can be to IPX (Internetwork Packet Exchange protocol; The internet packet exchange agreement), TCP/IP (Transmission Control Protocol/Internet Protocol; The transmission control/Internet protocol) etc. message analyze; In order to solution network diagnosis and problem analysis, but because the polytropy of application layer protocol, these protocol analyzers can not parse the structure of application layer data bag from byte stream.In a word, lack a kind of instrument at present, the see-through capabilities of the application layer analysis analytic ability and the application data pack arrangement of bus data can be provided easily.
The test of digital system not only comprises the detection of digital system bus or digital interface output signal, also should comprise through bus or digital interface and send test data or control command to digital system, observes the reaction or the communication of digital system and replys; In addition; Be usually directed to a plurality of digital interfaces and bus with the both-way communication of digital system; For example through the universal input and output port sending controling instruction, through UART or analog-to-digital conversion interface receiving digital signals, also need set up logical communication link this moment between the sendaisle of digital signal and receive path; For example after sending out a control command, detect receive path and whether receive correct replying.These functions also are that existing logic analyzer and protocol analyzer are not available.
Therefore; The developer of digital system needs oneself to write parsing usually and testing software tests and emulation digital communications protocol; And must be through the checking that experimentizes of self-designed hardware platform; And corresponding design of hardware and software can prolong the construction cycle of system, reduces the portability of design.
Along with the development of large scale integrated circuit technology, electronic component miscellaneous is packaged in the microminiaturized chip, only through limited digital interface or bus and microprocessor chip communication.Be developed as example with electrocardiogram; Traditional electrocardiogram acquisition circuit is to be made on the circuit board; And present ADI (Analog Device Instrument, Analog Devices Inc) company, TI (Texas Instruments, Texas Instrument) company and Shenzhen Xianjin Technology Academe have all released the EGC analog front end of single-chip; Accomplish the collection of electrocardiosignal and amplify conditioning, and through SPI interface and the microprocessor communication that realizes control and data processing function.This single-chip solution that connects through the simple data bus is easy to realize large-scale production and control of product quality; And the Reference Design that realizes corresponding function is provided; Thereby simplified the design work of sensor assembly, also produced test and simulation requirements based on the digital communication interface of bus.
Communication protocol is claimed communication control procedure again, send a kind of agreement of control it is said that be meant the communicating pair logarithm.Comprise in the agreement that to the data form method of synchronization, transfer rate, transfer step, problems such as EDC error detect correction mode and control character definition are made unified regulation, communicating pair must be observed jointly.The debugging of application layer communications protocol need solve the problem of three aspects: 1, bottom data communication (SPI, I2C, TCP/IP, HTTP, file I/O); Realize the byte stream of transmitting-receiving application layer data bag; Its basic assumption is; The bottom data communication is that many institutes know communications protocol altogether, can accomplish the transmitting-receiving of data through the software kit of standard.Transfer rate, transfer step, EDC error detect correction mode, control word are all in this aspect agreement; 2, second aspect is that the application layer data packet format is resolved and emulation, promptly realizes the conversion (be about to the field that packet is decomposed into the application layer protocol regulation, and fill designated data structure) between packet and the data model (or structural data); 3, the 3rd aspect is the semantic logic of application layer data bag, and for example logical relation between the packet and order are for example shaken hands, replied etc., and the application semantics of each field in the structural data.
Lack convenient easy-to-use application layer protocol in the market and resolve the general utility tool with emulation multiple bus digital communication.
Analysis tool commonly used comprises logic analyzer and protocol analyzer; It mainly solves the problem analysis to the bottom data communication; Can't catch the data model that is included in the byte stream, also not have the data sending function, can't be used to debug the semantic logic of application layer communication
If do not use logic analyzer, then must build the relevant hardware platform, prolong exploitation, assessment and proving period, increase cost, and, also lack the assessment test environment of standard.
Therefore, prior art needs to improve.
Summary of the invention
The technical problem that the present invention will solve provides a kind of emulation testing environment of digital communication interface communications protocol, provides a kind of low cost incorporate service kit on this basis.
For solving the problems of the technologies described above, the present invention provides a kind of digital signal logic analysis system, and it comprises digital communication transceiver, protocol analysis module, user's display module, memory module, protocol description profile download module; Said digital communication transceiver is through adopting at least a interface of at least one digital communication agreement, with the form transceive data of byte stream; Said memory module is used to store the protocol description document of said digital communication agreement; Said protocol analysis module receives said byte stream from said digital communication transceiver, according to said protocol description document, said byte stream is resolved to the structural data of format, and for example, it has specific data structure; The formatting method that said user's display module is put according to said protocol description document preset, for example, specific fields format type or formatting method dynamically show said structural data; Said protocol description profile download module is downloaded said protocol description document to said memory module through data communication interface.
In the described digital signal logic analysis system; Also comprise a protocol emulation module,, the protocol data of emulation is packed according to said specific format according to said protocol description document; Obtain packet, and send said packet with the form of said byte stream through said digital communication transceiver.
In the described digital signal logic analysis system; Also comprise a Simulation Control interface generation module; Dynamically generate the Simulation Control interface according to said protocol description document, and corresponding protocol data in the interface element that generates and the protocol description document are related, said Simulation Control layout setting user instruction receiving element; Be used to receive user instruction; According to of the said protocol data packing of said user instruction with user's appointment, obtain said packet, send said packet through said digital communication transceiver with the form of said byte stream.
In the described digital signal logic analysis system, said Simulation Control interface also is provided with input unit and selected cell, is respectively applied for to carry out input, selection operation, so that the parameter of the packet that said appointment sends to be set.For example, the user realizes the input associative operation through input unit, and associative operation is realized selecting in the user by selecting unit, accomplishes the parameter setting of the packet that sends for said appointment.
In the described digital signal logic analysis system; Also comprise an automatic-answering back device module, it is connected with said protocol analysis module, said protocol emulation module respectively, receives the said structural data in the said protocol analysis module; According to the content of said structural data and the artificial intelligence of said protocol description document; Control said protocol emulation module, packing generates the reply data bag automatically, and sends said reply data bag through said digital communication transceiver.For example, resolution data can be put in the structural data structure, for example in the structural data buffering area, is grasped by emulation module or responder module again; Structural data after also can will being resolved by parsing module directly is submitted to parsing module or responder module.
In the described digital signal logic analysis system, said protocol emulation module also converts data to aanalogvoltage output through a digital to analog converter.
In the described digital signal logic analysis system, said protocol analysis module also is provided with an analog to digital converter, is used to gather analog voltage signal, carry out analog-to-digital conversion after, send to said user's display module.
In the described digital signal logic analysis system, also comprise the forwarding module that is connected with said digital communication transceiver, said forwarding module is forwarded to external system with the byte stream that the digital communication transceiver receives through data communication interface., for example Ethernet card interface or wireless network card interface or USB interface or parallel interface or other data communication interface are forwarded to external system.Said forwarding module also will send with the form of byte stream through the digital communication transceiver from the data that external system receives.This forwarding module is connection protocol parsing module simultaneously also, and said structural data is forwarded to external system through data communication interface.
In the described digital signal logic analysis system, also comprise analysis and processing module, it is connected with said protocol analysis module, said user's display module respectively, is used to analyze said structural data and display analysis result.
In the described digital signal logic analysis system, also comprise the read-write control unit of a universal input and output port, at least one input/output port is carried out visual read-write.
In the described digital signal logic analysis system; Said universal input and output port read-write control unit also is provided with detection sub-unit; Be used for the external interrupt that the input/output port potential change causes is detected; And testing result passed to said protocol analysis unit, change into said structural data by said protocol analysis module according to said protocol description document.
In the described digital signal logic analysis system, also comprise a power supply unit, real-time voltage monitoring unit and current monitoring unit.
In the described digital signal logic analysis system, also comprise protocol description document management unit and agreement selection interface generation unit; Said protocol description document management unit is connected with said protocol analysis module, said user's display module, said protocol description profile download module respectively; Be used for starting and download, delete, inquire about one or more protocol description documents, and editor's agreement relevant information; Said agreement selects the interface generation unit to be connected with said protocol description document management unit, said user's display module respectively; Be used to generate agreement and select the interface, accept the protocol description document of the current use of the said digital signal logic analysis system of Instruction Selection.
In the described digital signal logic analysis system, the said digital communication transceiver partial data direct memory access pattern that is based on that receives or send at least carries out.
In the described digital signal logic analysis system, said is to carry out through the direct memory access pattern through analog-to-digital data acquisition.
In the described digital signal logic analysis system, said digital-to-analogue conversion is to carry out through the direct memory access pattern.
In the described digital signal logic analysis system, also comprise a protocol description documents editing module, be connected with said memory module, said user's display module respectively, be used for generating visually or editing said protocol description document.
The present invention also comprises the digital signal analytics of using above-mentioned digital signal logic analysis system.
Useful technique effect of the present invention is: through designing integrated cheaply testing tool, thereby can reduce cost, realize the comprehensive simulating test function to common digital interface with minimum cost; And can be designed to the integrated integration apparatus of multiple test function, and realize that hardware platform is multiplexing, shorten and develop assessment cycle, and the unified public verification platform of application layer bus protocol is provided.The present invention also can solve the existing insoluble packet structure verification and debugging of logic analyzer through resolving based on the packet of protocol description document, and solves the semantic verification and debugging problem of application layer communications protocol through visualized data demonstration, emulation testing and automatic simulation answering.Like this; The test, maintenance, assessment and the system integration demand that the present invention is directed to digital interface propose corresponding test emulation system; Can be the system integration, maintenance, appraiser provide reliably, flexibly, integrated test emulation tool that autgmentability is strong; Reduce the development and maintenance cost, increase work efficiency.
Description of drawings
Fig. 1 is analysis and the technological sketch map of artificial debugging of the Embedded Application layer protocol of one embodiment of the present invention.
Embodiment
Through introducing embodiment, specify the technology contents of foregoing invention below.
The analysis of Embedded Application layer protocol and artificial debugging technological as shown in Figure 1; An embodiment is; A kind of digital signal logic analysis system, it comprises digital communication transceiver S1, protocol analysis module S2, user's display module S3, emulation module S4, responder module S5 (being the automatic-answering back device module), structural data buffering area S6, protocol description document S7, memory module S8; Said digital communication transceiver S1 is through adopting at least a interface of at least one digital communication agreement; Like Serial Peripheral Interface (SPI) (SPI), UART Universal Asynchronous Receiver Transmitter (UART), I2C bus, controller local area network (CAN), Ethernet, parallel interface, USB interface etc., with the form transceive data of byte stream; Said protocol analysis module S2 receives said byte stream from said digital communication transceiver, according to the protocol description of said protocol description document S7, said byte stream is resolved to data structure and the write structure data buffer zone S6 that comprises the corresponding data territory; Said user's display module S3 reads each territory of said data structure from structural data buffering area S6; According to each data field format type and formatting method of pre-seting among the protocol description document S7; Dynamically show said structural data; For example show, then show simultaneously for numeric field, wherein with field title, unit, term of reference for the form of signal data with waveform; Field title, unit, term of reference etc. are included in the said protocol description document, then press specific font or color format demonstration in the particular alarm zone for warning message; Said user's display module S3 also can load the test case information among the said protocol description document S7; Dynamically generate corresponding Simulation Control interface; Test case is associated in the interface element at said Simulation Control interface and the agreement document; The interface element at Simulation Control interface receives user instruction, through the protocol data packing of emulation module S4 with related test case, and through the form transmission of digital communication transceiver S1 with byte stream.Said structural data buffering area S6 also is connected with responder module S5; Responder module S5 reads the content in each territory from the structural data buffering area; And combine the rule of replying in the protocol description document; Automatically produce response message, and, send with the form of byte stream through said digital communication transceiver S1 then through emulation module S4 packing.Said memory module S8 preserves one or more protocol description document S7.Said download module S9 describes document from the external system download protocol, and stores memory module S8 into.In above embodiment, protocol analysis module S2 also can be directly and user's display module S3, and responder module S5 connects, and shows the structural data of resolving through user's display module S3, produces reply data through responder module S5.
Preferably, this digital signal logic analysis system also comprises a power supply unit, real-time voltage monitoring unit and current monitoring unit.That is, also comprise a power supply unit, can export one or more voltages; Also comprise real-time voltage monitoring unit and current monitoring unit.
It is feasible through the protocol description document application layer communications protocol being resolved, and for example famous soap protocol can be resolved the XML packet based on XML Schema.For the common communication data packets of embedded chip, can set up similar protocol description model and describing method, referring to the example of back.In order to solve the performance issue that the real time data bag is resolved; Can the overall process that packet is resolved be divided into establishment stage and operation phase; Adopt the dependence injection way dynamically to assemble analytic thread and data model buffering area at establishment stage according to the protocol description document; The node of analytic thread is the ripe algorithm that injects, and for example the rudimentary algorithm of resolving such as search, coupling, bit arithmetic, data type conversion etc. is packaged into the object of some special interface models, the node of structure analytic thread; In the operation phase; Packet imports analytic thread into handles entering data buffer zone, back and visualization display, because the node of analytic thread is ripe binary code, so resolving can reach the performance that runs application.
Combine to use with above-mentioned each relevant example; Preferably, in the described digital signal logic analysis system, said Simulation Control interface also is provided with input unit and selected cell; Be respectively applied for the user and carry out input, selection operation, so that the parameter of the packet that said appointment sends to be set.Like this, said Simulation Control interface also comprises the interface element that can be used for user's input or select, and makes the user can specify the parameter of the packet of transmission.
Combine to use with above-mentioned each relevant example, preferred, in the described digital signal logic analysis system, said protocol emulation module also converts data to aanalogvoltage output through a digital to analog converter.
Combine to use with above-mentioned each relevant example; Preferably, in the described digital signal logic analysis system, said protocol analysis module also is provided with an analog to digital converter; Be used to gather the analog voltage signal data, and the said analog signal data that will gather sends to said user's display module.
Combine to use with above-mentioned each relevant example; Preferably; Described digital signal logic analysis system also comprises the forwarding module that is connected with said digital communication transceiver; Said forwarding module is forwarded to external system with the byte stream that the digital communication transceiver receives through data communication interface, for example Ethernet card interface or wireless network card interface or USB interface or parallel interface or other data communication interface.Preferably, said forwarding module also will send with the form of byte stream through the digital communication transceiver from the data that external system receives.Resolve and the protocol emulation function thereby can carry out message packet data, and the hardware interface of use digital signal logic analysis system is accomplished the function of digital communication transceiver through external system.
Combine to use with above-mentioned each relevant example, preferred, described digital signal logic analysis system also comprises extendible analysis and processing module interface, be used for the data of resolving are further analyzed, and the display analysis result.Like this, said digital signal logic analysis system not only can be used for digital communication message bag resolves, and also can be used for real-time processes and displays and checking assessment, the for example characteristics such as the frequency of occurrences of output signal-to-noise ratio, calibration information, particular data to signal.
Combine to use with above-mentioned each relevant example; Preferably; Described digital communication transceiver also can read the level information of at least one universal input and output port or catches the external interrupt signal of at least one input/output port, and above-mentioned information is write down and shows according to the protocol description document.Described digital communication transceiver also can be provided with the level of at least one input/output port through emulation module.That is to say that said digital communication transceiver comprises the ability to input/output port read-write and capture terminal.
Combine to use with above-mentioned each relevant example, preferred, described digital signal logic analysis system also comprises protocol description document management unit and agreement selection interface generation unit; Said protocol description document management unit is connected with said protocol analysis module, said user's display module, said download module respectively, is used for starting downloading, delete, inquire about one or more protocol description documents, and editor's agreement relevant information; Said agreement selects the interface generation unit to be connected with said protocol description document management unit, said user's display module respectively; Be used to generate agreement and select the interface, accept the protocol description document that user instruction is selected the current use of said digital signal logic analysis system.Thereby make the user can manage a plurality of protocol description documents easily, and describe between document in different protocol and to switch, accomplish debugging emulation work the different digital communications protocol.
Combine to use with above-mentioned each relevant example, preferred, the reception of said digital communication transceiver portion divided data or transmission are based on the direct memory access pattern and carry out.For example, the direct memory access pattern that is based on of said digital communication transceiver part or total data reception or transmission is carried out.
Combine to use with above-mentioned each relevant example, preferred, said is to carry out through the direct memory access pattern through analog-to-digital data acquisition.
Combine to use with above-mentioned each relevant example, preferred, said digital-to-analogue conversion is to carry out through the direct memory access pattern.
Combine to use with above-mentioned each relevant example; Preferably; Described digital signal logic analysis system also comprises a protocol description documents editing module, is connected with said memory module, said user's display module respectively, is used for generating visually or editing said protocol description document.For example, said protocol description documents editing module comprises a basic agreement descriptive element memory cell, and storage is used to describe the basic element and the corresponding natural language information of application layer communications protocol.For example, basic element includes but not limited to basic operation mark that some are general such as bit manipulation, message bag boundary search operation, or the structural description element of known underlying protocol etc.Said protocol description documents editing module uses said basic element and related natural language information dynamically to generate application layer communications protocol editing interface, receives the protocol information of user instruction and user input, generates said protocol description document visually.Wherein, XML schema is one of them example, and the example in the various embodiments of the present invention also has certain generality, and these examples can use similar visual edit to realize.For example, it is inner that protocol description documents editing module is arranged at the digital signal logic analysis system, forms the system of an integral body; Perhaps, it is outside that protocol description documents editing module is arranged at the digital signal logic analysis system, forms a separable system; As, the digital signal logic analysis system is arranged at a certain terminal, and protocol description documents editing module is arranged at another terminal.
Combine with above-mentioned arbitrary example, another example is that described digital signal logic analysis system also is provided with following each unit: voltage monitoring unit, current monitoring unit, at least one voltage source output unit.
Because present most embedded chips provide interface resource on the sheet that enriches, the described method of this motion possibly realize with lower cost.For example the inventor can realize signal simulation, and the GPIO port controlling functional simulation of two ADC passages, two serial ports passages on the MSP430 minimum system, has realized comprising the test of interface level and protocol level.Therefore the present invention can be used for the supporting service kit of modular product series, reduces the scheme cost, also can be used for developing comprehensive module interface testing tool with customization capability, serves the technical staff of the integrated or system research of vast module level.
The described protocol description document of various embodiments of the present invention example, document can comprise three parts: receive message format and describe, test case is described, and replys rule.
Receiving message format describes for example: for example describe through one of 4 kinds of mechanism or mix the message pack arrangement model that constitutes: 1, and fixed length message, the message that constitutes by the specified order series connection by the field of fixed length; 2, elongated message, the message semantic definition method that constitutes by message-length+message body; Or by the message of message coding+corresponding encoded specific length; 3, through the message of mark boundary, the message of for example similar DICOM or XML form; The order of the message field through mark boundary can be different; 4, by the message (normally bit arithmetic) of the different domain operations acquisitions of message; 5, above-mentioned various mechanism are united the composite message of formation.Can be nested between the mechanism, for example the message body of elongated message can be a fixed length message, this nested description can realize through XML or alternate manner.In addition, message possibly be through encrypting or compression.
No matter be the message of any type, the boundary of message all is most important.For the message that connection handshake is arranged, first boundary of message possibly begin identification from shaking hands, and also possibly obtain through the method that describes below; For the message that nothing is shaken hands, need catch the sequence on the bus usually or catch message boundary through other control line.
The description of each bar message is except that comprising composition mechanism; The content type that also comprises message; For example be Wave data, signal parameter and control command; This classification will help message content correctly, and for example Wave data adopts graphical demonstration continuously, and control command only need be shown as dynamic text; The description of Wave data, signal parameter also comprises information such as corresponding natural language label or unit.
Analogue system is described all acceptance domains that just can dynamically generate corresponding message according to receiving message format, and correctly the communication message that receives is resolved, and analysis result is deposited in the corresponding field, and can be shown through user interface.
Test case is described for example: protocol data is used in the test of characterising parameterization, can comprise parameter in the protocol data.In addition, the test case protocol data also comprises natural language description information, can generate the control corresponding menu automatically in user interface, realizes the transmission of interactive protocol data; Also possibly select the protocol data of transmission based on probability indefinitely automatically, for example send message A sometimes, send message B sometimes; Also possibly comprise the automatic protocol data transmitting mechanisms, send one group of message by certain hour interval and sending order.
Parameterized transmission message format can be supported above-mentioned fixed length message, elongated message, the message through the mark boundary and through 4 types of the message of computing between the territory (bit arithmetic), and mixed type.And according to parameter packing generation message.
Reply rule description for example: reply rule description be used to describe receive the communication message that can reply after, how to provide relevant parameter to be packaged into complete response message instance; For example send specific response message to specific message content; Or, send different response messages according to certain probability to specific message content.
Be exemplified below: for the message of mark boundary; Through being similar to the XML schema logical construction of describing message well; Can effectively resolve into each territory to message, if the display type of schema tag field or formatted message (for example be waveform signal, digital signal; Whether several territories are combined and show etc.), can realize the parsing and the Presentation Function of message; If in schema, test is increased natural language description information with protocol data, can dynamically generate interactive simulation control interface.Therefore, can use the technology of XML schema to solve emulation, test problem based on the message of mark boundary.
Existing parsing and the emulation that illustrates binary system fixed length message with the example of serial ports blood oxygen communication.BCI blood oxygen communication protocol description is following:
(1) baud rate 4800, and 1bit is initial, the 8bit data, and 1bit stops, odd;
(2) 60 packets of per second, 5 bytes of every bag, byte defines as follows:
RYTE?0：
BYTE?1：
Bit 0～6 pulse wave, scope 0～99; 127 (7FH) expression is invalid
BYTE?2：
BYTE?3：
Bit 0～6 pulse frequency low 7
BYTE?4：
Bit 0～6 blood oxygen levels, 0～100,127 (7FH) represent invalid value
Its protocol description document is exemplified below:
The example that has comprised the protocol description document of blood oxygen agreement in the last example only comprises the reception message format and describes, and consists of the following components.1, the intercepting of message bag (start trifle); 2, the verification of message bag (parse/check trifle); 3, the parsing of message bag (remainder of parse trifle message bag) 4, the format of message bag shows (display trifle); 5, and through user control interface emulation testing (test trifle).Because this protocol description document only needs in the initial phase analysis once; Set up corresponding buffering area and data structure; And accomplish the extraction with the territory of cutting apart of message bag through ripe reusable radix-2 algorithm (for example searching algorithm, bit manipulation etc.) in the operation phase, therefore can obtain good performance.
Above-mentioned protocol description document can also pass through the visual generation of user interface, makes things convenient for the user.Take the example of a control interface parsing and emulation below again, for example system can realize data transmit-receive through SPI digital interface and wireless chip NRF24L01 communication.This agreement is following:
Last example has provided the part communication protocol description document of NRF24L01 chip SPI interface; Employing SPI interface and SPI communication relevant parameter have been described in the attribute of proto node, and wherein the init attribute is that support is meant the state (recovering each buffering area is initial condition) that simulator can manually be reset data flow.Two interactive simulation control commands (two cmd nodes) have been described in this example; In first cmd instruction (title reads configuration); Simulator sends instruction 0x00 through SPI; And read 1 byte information that the NRF24L01 chip returns through SPI automatically, and each control word that resolves to configuration register of this information is semantic, and through the display system demonstration; Second cmd instruction; Simulator sends the instruction of two bytes; First instruction is 0x20, and this is the instruction of writing the NRF24L01 configuration register, and second byte can be read in user option through the user interface of dynamic generation and (for example can be read in the configuration information that the user hopes through check box in this example; For example whether use to receive and interrupt), and according to the synthetic byte of sending of user option.But protocol description document also emulation NRF24L01 chip is resolved the information of processor controls transmission; Employing is similar to the example that aforementioned blood oxygen is resolved; But the state that needs manual replacement data flow; For example through powering on or stop one no message period, and the data flow of digital signal logic analysis system is placed the boundary condition or the Reset Status of packet.
In sum; The test, maintenance, assessment and the system integration demand that the present invention is directed to the digital and analog signaling interface propose relevant hardware test platform and test emulation system; The said communications protocol of protocol description document rapid evaluation that digital communication agreement user of service can be set up through the integrated test emulation tool and the protocol development personnel of unification; Accurately grasp the semantic logic of communications protocol, and accomplish, or realize the interface maintenance the checking of product on communication protocal conformance; Reduce the development and maintenance cost, increase work efficiency.The present invention also can help chip or protocol development personnel to set up simple, pervasive evaluating system; For example chip or protocol development personnel only need distribution protocol to describe document; The user can use the document to realize the emulation of chip communications protocol part; Realization is shortened the construction cycle to the entry evaluation and the exploitation of chip.
Need to prove; Each technical characterictic of listing above, it makes up each embodiment that can form each other, and above each embodiment of listing; It makes up formation each other without each embodiment that details, and should be regarded as the scope that belongs to specification record of the present invention.And the above is merely of the present invention preferable feasible, and unrestricted protection scope of the present invention, and the equivalent structure that all utilizations specification of the present invention and accompanying drawing content have been done changes, and all is included in protection scope of the present invention.
Claims (14)
1. a digital signal logic analysis system is characterized in that, comprises digital communication transceiver, protocol analysis module, user's display module, memory module, protocol description profile download module;
Said digital communication transceiver is through adopting at least a interface of at least one digital communication agreement, with the form transceive data of byte stream;
Said memory module is used to store the protocol description document of said digital communication agreement;
Said protocol analysis module receives said byte stream from said digital communication transceiver, according to said protocol description document, said byte stream is resolved to the structural data of specific data structure;
Said user's display module dynamically shows said structural data according to the formatting method that pre-sets in the said protocol description document;
Said protocol description profile download module is downloaded said protocol description document to said memory module through data communication interface.
2. digital signal logic analysis system according to claim 1; It is characterized in that; Also comprise a protocol emulation module,, the protocol data of emulation is packed according to said specific format according to said protocol description document; Obtain packet, and send said packet with the form of said byte stream through said digital communication transceiver.
3. digital signal logic analysis system according to claim 2 is characterized in that, also comprises a Simulation Control interface generation module; Dynamically generate the Simulation Control interface according to said protocol description document; Said Simulation Control layout setting user instruction receiving element is used to receive user instruction, according to the said protocol data packing of said user instruction with user's appointment; Obtain said packet, send said packet with the form of said byte stream through said digital communication transceiver.
4. digital signal logic analysis system according to claim 3 is characterized in that, said Simulation Control interface also is provided with input unit and selected cell, is respectively applied for to carry out input, selection operation, so that the parameter of the packet that said appointment sends to be set.
5. digital signal logic analysis system according to claim 2 is characterized in that, also comprises an automatic-answering back device module; It is connected with said protocol analysis module, said protocol emulation module respectively; Receive the said structural data in the said protocol analysis module,, control said protocol emulation module according to the content and the said protocol description document of said structural data; Automatically packing generates the reply data bag, and sends said reply data bag through said digital communication transceiver.
6. digital signal logic analysis system according to claim 2 is characterized in that, said protocol emulation module also converts data to aanalogvoltage output through a digital to analog converter.
7. digital signal logic analysis system according to claim 1 is characterized in that, said protocol analysis module also is provided with an analog to digital converter, is used to gather analog voltage signal, carry out analog-to-digital conversion after, send to said user's display module.
8. digital signal logic analysis system according to claim 1; It is characterized in that; Also comprise the forwarding module that is connected with said digital communication transceiver, said forwarding module is forwarded to external system with the byte stream that the digital communication transceiver receives through data communication interface.Said forwarding module also will send with the form of byte stream through the digital communication transceiver from the data that external system receives.
9. digital signal logic analysis system according to claim 1 is characterized in that, also comprises analysis and processing module, and it is connected with said protocol analysis module, said user's display module respectively, is used to analyze said structural data and display analysis result.
10. digital signal logic analysis system according to claim 1 is characterized in that, also comprises the read-write control unit of a universal input and output port, and at least one input/output port is carried out visual read-write.
11. digital signal logic analysis system according to claim 10; It is characterized in that; Said universal input and output port read-write control unit also is provided with detection sub-unit; Be used for the external interrupt that the input/output port potential change causes is detected, and testing result is passed to said protocol analysis unit, change into said structural data according to said protocol description document by said protocol analysis module.
12. digital signal logic analysis system according to claim 1 is characterized in that, also comprises a power supply unit, real-time voltage monitoring unit and current monitoring unit.
13. digital signal logic analysis system according to claim 1 is characterized in that, also comprises protocol description document management unit and agreement selection interface generation unit;
Said protocol description document management unit is connected with said protocol analysis module, said user's display module, said protocol description profile download module respectively, is used for starting downloading, delete, inquire about one or more protocol description documents;
Said agreement selects the interface generation unit to be connected with said protocol description document management unit, said user's display module respectively; Be used to generate agreement and select the interface, accept the protocol description document of the current use of the said digital signal logic analysis system of Instruction Selection.
14. digital signal logic analysis system according to claim 1; It is characterized in that; Also comprise a protocol description documents editing module, be connected with said memory module, said user's display module respectively, be used for generating visually or editing said protocol description document.
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