CN102420606A - Low phase-noise and small step-frequency synthesized realizing method - Google Patents

Abstract

The invention discloses a low phase-noise and small step-frequency synthesized realizing method, which comprises the following steps: taking constant temperature crystal oscillator output as a reference signal to be input into a phase locked loop system and selecting a low pass filter meeting the low phase-noise condition as a low pass filter in the phase locked loop system; increasing the orders of the low pass filter to four orders, and making the product of the resistance by the capacitance of the fourth order be matched with the product of the resistance by the capacitance of the third order, wherein the capacitance value of the fourth order is larger than 10 times the voltage control end parasitic capacitance of a voltage control oscillator; and regulating the output current of a charge pump of a phase locked loop chip in the phase locked loop system until eliminating phase noise bulges in an output phase-noise curve of the phase locked loop system, and taking the output under a set feedback frequency dividing coefficient of a feedback divider as the output of the phase locked loop system. Through the verification of an experiment, the method disclosed by the invention can realize 2MHz stepping uninterruptedly under the condition without DDS (digital display scope) as a reference so as to ensure the phase-noise stable transition.

Description

A kind of low small step of making an uproar mutually advances to combine frequently implementation method

Technical field

The present invention relates to the frequency synthesis technique field, relate in particular to a kind of low small step of making an uproar mutually and advance to combine frequently implementation method.

Background technology

Along with the growing tension of radio resource and developing rapidly of radiotechnics, more and more stricter to the test accuracy requirement of radio signal, thus increasingly high to frequency resolution and two index requests of phase noise of local oscillator in the test macro.The main body of local oscillator is a phase-locked loop systems, and the frequency resolution of phase-locked loop systems and phase noise determine the frequency resolution and the phase noise of local oscillator basically.

As shown in Figure 1, phase-locked loop systems generally comprises a high stable, low referrer module of making an uproar mutually, a low pass filter, the VCO (Voltage-Controlled Oscillator, voltage controlled oscillator) of phase-locked loop chip and corresponding frequencies.What phase-locked loop chip was accomplished is the function in the frame of broken lines among Fig. 1, and R is the coefficient of parametric frequency divider, and N is the coefficient of feedback divider.After phase-locked loop systems is stable, the reference frequency f of referrer module input _RefOutput frequency f with VCO _VcoRelation following:

$\frac{f_{\mathrm{ref}}}{R}=\frac{f_{\mathrm{vco}}}{N}$

Frequency resolution is meant the minimum step of phase-locked loop systems between can two carrier waves of continual output.Phase noise characterizes the uncertainty of the carrier wave output of phase-locked loop systems at frequency domain, and its size can normalize to 1Hz with the ratio of the power spectral density of offset carrier certain frequency deviation place such as 1MHz and carrier power and weigh, and phase noise is hereinafter to be referred as making an uproar mutually.

Present phase-locked loop systems is generally made with reference to the high-resolution that realizes carrier frequency output of DDS; Its resolution can reach inferior 1Hz rank; Can worsen 20log (N) doubly but the near-end of DDS is spuious; Wherein N is a Clock Multiplier Factor, and is mapped in the loop bandwidth of phase-locked loop systems, thereby it is spuious to make carrier wave output have bigger near-end; Realize that through reducing loop bandwidth merely the low of carrier wave output make an uproar mutually; Can make the deterioration that near-end is made an uproar mutually; And near loop bandwidth, form bigger noise projection; In observed frequency on the measuring and analysing meter of making an uproar mutually---the logarithmic curve of making an uproar mutually can show one tangible " bulge " (phase noisehump) on (being called for short the curve of making an uproar mutually), is called make an uproar mutually bulge or phase noise bulge.

The SFDR of the spuious meeting of bigger near-end reduction system, and form measure error; The bulge of making an uproar mutually on the curve of making an uproar mutually not only influences attractive in appearance, and in some cases, the measurement result that can make the mistake.

Summary of the invention

The technical problem that the present invention will solve is, provides a kind of low small step of making an uproar mutually to advance to combine implementation method frequently, do not adopting under the DDS situation as a reference, reduces when realizing the frequency output of high frequency resolution and makes an uproar mutually.

The technical scheme that the present invention adopts is; The said low small step of making an uproar mutually advances to combine frequently implementation method; Phase-locked loop systems comprises phase-locked loop chip, low pass filter and voltage controlled oscillator, comprises parametric frequency divider, phase discriminator and feedback divider in the phase-locked loop chip, and said method comprises:

With the output of constant-temperature crystal oscillator signal input phase-locked loop systems as a reference, and select a low pass filter that satisfies the low condition of making an uproar mutually as the low pass filter in the phase-locked loop systems;

The exponent number of said low pass filter is increased to quadravalence, and makes the resistance capacitance product of quadravalence and the resistance capacitance product coupling on the 3rd rank, and the capacitance of quadravalence is greater than the voltage-controlled end parasitic capacitance of 10 multiplication of voltage controlled oscillators;

Regulate the size of the charge pump output current of phase-locked loop chip in the phase-locked loop systems; Till the bulge of making an uproar mutually in curve is made an uproar in the output of eliminating phase-locked loop systems mutually, this moment will be in the output of the output under the feedback division coefficient of the feedback divider of setting as phase-locked loop systems.

Further, the said low condition of making an uproar mutually specifically comprises:

The output of phase-locked loop systems stable the showing of curve of making an uproar mutually: the bulge of not making an uproar mutually at the cut-off frequency place of low pass filter, and differ in the theoretical value that the cut-off frequency of low pass filter calculates according to the normalization noise floor of phase-locked loop chip with the interior beguine of the value of making an uproar mutually and to be no more than 20dB.

Further, the resistance capacitance product of said quadravalence and the resistance capacitance product on the 3rd rank coupling specifically comprise:

The resistance capacitance product of quadravalence is 1～1.5 times of resistance capacitance product on the 3rd rank.

Further, said phase-locked loop chip is HMC700, HMC704 or ADF4350.

Further, the feedback division coefficient of the feedback divider of said setting is 1～17.

Further, the voltage controlled oscillator in the said phase-locked loop systems is the V600ME20-LF chip of Z～communications company.

Further, said low pass filter is second order, three rank or quadravalence low pass filter.

Adopt technique scheme, the present invention has advantage at least:

The low small step of making an uproar mutually according to the invention advances to combine frequently implementation method; Through experimental verification, can be under the situation for referencial use without DDS, continual realization 2MHz stepping; In some cases even can reach the kHz stepping; The 1MHz of 2GHz carrier wave skew place mutually the value of making an uproar be merely-135dBc/Hz, and with loop bandwidth in smooth place make an uproar mutually and compare the bulge of making an uproar mutually less than 3dB, guarantee to make an uproar mutually smooth transition.

Description of drawings

Fig. 1 is existing phase-locked loop systems structural representation;

Fig. 2 is a phase-locked loop systems structural representation in the first embodiment of the invention;

Fig. 3 advances to combine frequently the implementation method flow chart for the low small step of making an uproar mutually in the first embodiment of the invention;

Fig. 4 is a third-order low-pass filter structural representation in the second embodiment of the invention;

Fig. 5 (a) and (b) are the second order and the quadravalence low pass filter structural representation that can replace third-order low-pass filter in the second embodiment of the invention;

Fig. 6 (a) and (b), (c) are the contrast sketch map of mutually make an uproar curve and mutually make an uproar curve and mutually the make an uproar curve that adopt of the present invention technical scheme export when adopting common phase-locked loop active loop filter of the existing DDS of employing when for referencial use.

Embodiment

Reach technological means and the effect that predetermined purpose is taked for further setting forth the present invention, below in conjunction with accompanying drawing and preferred embodiment, to the present invention be elaborated as after.

First embodiment of the invention; A kind of low small step of making an uproar mutually advances to combine frequently implementation method; The composition of phase-locked loop systems is as shown in Figure 2, comprises phase-locked loop chip 10, low pass filter 20 and voltage controlled oscillator 30, comprises parametric frequency divider 11, phase discriminator 12 and feedback divider 13 in 10 in the phase-locked loop core; Phase-locked loop chip can adopt chips such as HMC700, HMC704 or ADF4350.Voltage controlled oscillator 30 in the phase-locked loop systems adopts the V600ME20-LF chip of Z～communications company.The signal processing of above-mentioned phase-locked loop systems is a prior art, so locate not detail.

As shown in Figure 3, the said low small step of making an uproar mutually advances to combine implementation method frequently, comprises following concrete steps:

Step S101 with the output of constant-temperature crystal oscillator 40 signal input phase-locked loop systems as a reference, and selects a low pass filter 20 that satisfies the low condition of making an uproar mutually as the low pass filter in the phase-locked loop systems.

Concrete, this low condition of making an uproar mutually specifically comprises:

The output of phase-locked loop systems stable the showing of curve of making an uproar mutually: the bulge of not making an uproar mutually at the cut-off frequency place of low pass filter, and differ in the theoretical value that the cut-off frequency of low pass filter calculates according to the normalization noise floor of phase-locked loop chip with the interior beguine of the value of making an uproar mutually and to be no more than 20dB.

Low pass filter 20 can be second order, three rank or quadravalence low pass filter, preferably second-order low-pass filter.

Step S102 is increased to quadravalence with the exponent number of said low pass filter 20, and makes the resistance capacitance product of quadravalence and the resistance capacitance product coupling on the 3rd rank, and the capacitance of quadravalence is greater than the voltage-controlled end parasitic capacitance of 10 multiplication of voltage controlled oscillators.To exponent number of low pass filter 20 every increases, in fact be exactly the resistance and the capacitive branch of a series connection of output point place increase in its back-end.If the low pass filter that locks among the step S101 20 has been quadravalence, then need not increases exponent number to it again.

Concrete, the resistance capacitance product of said quadravalence matees with the resistance capacitance product on the 3rd rank, specifically comprises: the resistance capacitance product of quadravalence is 1～1.5 times of resistance capacitance product on the 3rd rank.

Step S103; Through regulating the charge pump output current of phase-locked loop chip in the phase-locked loop systems; Till the bulge of making an uproar mutually in curve is made an uproar in the output of eliminating phase-locked loop systems mutually, this moment will be in the output of the output under the feedback division coefficient of the feedback divider of setting 13 as phase-locked loop systems.Preferably, the feedback division coefficient of the feedback divider of this setting is 1～17.

Second embodiment of the invention, the given phase-locked loop system that forms with a selected chip is an example, adopts the 100MHz constant-temperature crystal oscillator as high stable, the low reference of making an uproar mutually; Adopt one to have the fractional frequency-division phase-locked loop chip HMC700 that regulates charge pump output current function; The reference divide ratio range of set value of its parametric frequency divider is R=1～16383; The feedback division coefficient of feedback divider comprises integral frequency divisioil coefficient part and little tree divide ratio part, and wherein fractional frequency division coefficient settings value scope is N _Frac=0～(2 ²⁴-1); The V600ME20-LF that adopts Z～communications company is as VCO, and its 2GHz carrier wave departs from the 1MHz place and makes an uproar mutually less than-135dBc/Hz.

The low small step of making an uproar mutually of the present invention advances to combine implementation method frequently, and detailed process is following:

S1: at first in phase-locked loop systems, set up a lockable third-order low-pass filter, as shown in Figure 4.Concrete; A third-order low-pass filter is inserted phase-locked loop systems; Go up the output of the phase-locked loop systems that the shows curve of making an uproar mutually through observing the analyzer (also can watch through the test function of making an uproar mutually of frequency spectrograph) of making an uproar mutually, see whether satisfy the low condition of making an uproar mutually, the low condition of making an uproar mutually is meant: the bulge (phase noise hump) of not making an uproar mutually at the cut-off frequency place of low pass filter; And differ in the theoretical value that the cut-off frequency of low pass filter calculates according to the normalization noise floor of phase-locked loop chip with the interior beguine of the value of making an uproar mutually and to be no more than 20dB; If do not satisfy, then change the element of three rank filters, mainly be that the capacitance resistance value in the three rank filters is finely tuned; Till satisfying the low condition of making an uproar mutually, promptly determine a more suitable phase-locked loop systems low pass filter this moment.This low pass filter that satisfies the low condition of making an uproar mutually has following characteristic: loop bandwidth is roughly 1.2 times best theoretical loop bandwidth; Best theoretical loop bandwidth is to make an uproar mutually in the PLL loop bandwidth and the VCO deviant when equating of making an uproar mutually; For example make an uproar mutually in the PLL loop bandwidth and be-109dBc/Hz; And VCO is-110dBc/Hz making an uproar mutually of offset carrier 200kHz place, and then best theoretical loop bandwidth is 200kHz.In this step, third-order low-pass filter can also secondary low pass filter or the quadravalence low pass filter shown in Fig. 5 (b) shown in Fig. 5 (a) replace.

S2: realize the little step frequency output of phase-locked loop systems.Concrete, through the reference divide ratio set point of adjusting parametric frequency divider and the feedback division coefficient settings value of feedback divider, realize the little stepping of whole cycle of phase-locked loop.Its final output is determined by formula (1):

$F_{\mathrm{vco}}=F_{\mathrm{int}}+F_{\mathrm{frac}}=\frac{F_{\mathrm{xtal}}}{R}\×N_{\mathrm{int}}+\frac{F_{\mathrm{xtal}}}{R\×2^{24}}\×N_{\mathrm{frac}}=F_{\mathrm{pfd}}\×N_{\mathrm{int}}+\frac{F_{\mathrm{pfd}}\×N_{\mathrm{frac}}}{2^{24}}---\left(1\right)$

Wherein, F _VcoBe final output frequency, F _Int, F _FracBe respectively integral frequency divisioil frequency, fractional frequency division frequency; F _XtalBeing reference frequency, is example with 100MHz;

$F_{\mathrm{Pfd}}=\frac{F_{\mathrm{Xtal}}}{R}$ Be phase demodulation frequency;

N _IntBe the integral frequency divisioil part set point of feedback divider, its span is 36～65567;

N _FracBe the fractional frequency division part set point of feedback divider, its span is 0～(2 ²⁴-1);

R is with reference to the frequency division set point, and its span is 1～16383;

2 ²⁴The effective value of the fractional frequency division part of expression feedback divider is 24.

For this phase-locked loop systems, the minimum value Δ F of its output frequency resolution rate Δ F _MinAccomplish in theory:

${\mathrm{\ΔF}}_{\min }=\frac{100\×{10}^6}{2^{24}\×16383}\×36=0.013\mathrm{Hz}$

In fact the frequency resolution of 0.013Hz is impossible; Because increase along with the reference divide ratio set point R of parametric frequency divider; The phase demodulation frequency of phase-locked loop chip sharply reduces, thereby causes the whole system loop bandwidth sharply to broaden, and causing makes an uproar in the loop bandwidth mutually degenerates and even losing lock.Actual the value of R is generally 1～17 in application, and then the output resolution ratio of whole phase-locked loop systems can unremittingly be accomplished (decimal is ignored in round numbers):

During R=17, ${\mathrm{\Δ\; F}}_{\mathrm{Min}}=\frac{100\×{10}^6}{2^{24}\×17}\×36=12\mathrm{Hz};$

During R=1, ${\mathrm{\Δ\; F}}_{\mathrm{Min}}=\frac{100\×{10}^6}{2^{24}\×1}\×36=214\mathrm{Hz}.$

But, in view of the value of R can change from 1～17 continuously,, then in 12～214Hz scope, whenever all can travel through at a distance from 12Hz if decimal is ignored in round numbers, with these group data as base.In the reference frequency output of coupling VCO, as long as this group base of output frequency aliquot, phase-locked loop systems promptly can be realized this Frequency point output, and the minimum resolution of obvious above-mentioned phase-locked loop systems output frequency is 12Hz.

Should be noted that a problem, phase-locked loop uses the fractional frequency division pattern, can form fractional stray, if F _FracBe positioned at PLL loop bandwidth with or be positioned at phase demodulation frequency and deduct the PLL loop bandwidth scope, then fractional stray will fall into PLL loop bandwidth and can't suppress, and forms more spuious.That is to say that preferred, establishing carrier wave is F ₀, loop bandwidth is the cut-off frequency Fc of second-order low-pass filter, then is preferably in (F ₀-2Fc, F ₀+ 2Fc) use technical scheme of the present invention outside the scope, can obtain better technical effect.

S3: realize the low carrier wave output of making an uproar mutually of phase-locked loop systems.After the little stepping that successfully realizes phase-locked loop systems, take following way to realize the low output of making an uproar mutually of phase-locked loop systems.

Can cause phase noise leakage in the PLL loop bandwidth owing to contain the phase-locked loop systems of second order, third-order low-pass filter; Making to be made an uproar by prevailing skew place of the noise floor of VCO own mutually degenerates; And passive fourth-order system is under the same index of making an uproar mutually; The frequency output area is narrower, need adjust its parameter.Therefore; Adopt the method that increases the loop filter exponent number; Increase the i.e. exponent number of a limit on the basis of the third-order low-pass filter that first step S1 is again set up; Form the quadravalence low pass filter shown in Fig. 5 (b); And the resistance capacitance product R4 * C4 of quadravalence is equated with the resistance capacitance product R3 * C3 on the 3rd rank, and guarantee the voltage-controlled end parasitic capacitance of the capacitance of quadravalence greater than 10 multiplication of voltage controlled oscillators, thus guarantee that the output of phase-locked loop systems carrier wave equals this noise floor in the 1MHz place of VCO in the far-end skew apart from carrier wave like making an uproar mutually of 1MHz place.

S4: what the realization loop was made an uproar mutually seamlessly transits.

Concrete, through regulating the charge pump output current of phase-locked loop chip in the phase-locked loop systems, till the bulge of making an uproar mutually in curve is made an uproar in the output of eliminating phase-locked loop systems mutually, this moment will be in the output of the output under the feedback division coefficient of setting as phase-locked loop systems.Through this means, can effectively reduce the fluctuating of making an uproar mutually of phase-locked loop systems carrier wave output, guarantee the smooth transition of making an uproar mutually.

The contrast sketch map of make an uproar mutually curve and the curve of making an uproar mutually when adopting common phase-locked loop active loop filter when adopting the curve of making an uproar mutually of technical scheme of the present invention output for referencial use with existing employing DDS is as shown in Figure 6.Fig. 6 (a) expression be DDS do with reference to the time, the curve of making an uproar mutually of output wherein had bigger near-end spuious (Near Band Spur) when phase-locked loop realized that the CF small step is advanced; The curve of making an uproar mutually that Fig. 6 (a) expression adopts common phase-locked loop active loop filter to obtain has tangible phase noise bulge; Fig. 6 (c) expression be to adopt the curve of exporting under the technical scheme of the present invention of making an uproar mutually, it is spuious to accomplish there is not near-end, and does not have tangible phase noise bulge, has better near-end and makes an uproar mutually and suppress effect and seamlessly transit effect with making an uproar mutually.

The low small step of making an uproar mutually according to the invention advances to combine frequently implementation method; Through experimental verification, can be under the situation for referencial use without DDS, continual realization 2MHz stepping; In some cases even can reach the kHz stepping; The 1MHz of 2GHz carrier wave skew place mutually the value of making an uproar be merely-135dBc/Hz, and with loop bandwidth in smooth place make an uproar mutually and compare the bulge of making an uproar mutually less than 3dB, guarantee to make an uproar mutually smooth transition.

Through the explanation of embodiment, should be to reach technological means and the effect that predetermined purpose takes to be able to more deeply and concrete understanding to the present invention, yet appended diagram only provide the usefulness of reference and explanation, is not to be used for the present invention is limited.

Claims (7)

1. the one kind low small step of making an uproar mutually advances to combine implementation method frequently, and phase-locked loop systems comprises phase-locked loop chip, low pass filter and voltage controlled oscillator, comprises parametric frequency divider, phase discriminator and feedback divider in the phase-locked loop chip, it is characterized in that, said method comprises:

With the output of constant-temperature crystal oscillator signal input phase-locked loop systems as a reference, and select a low pass filter that satisfies the low condition of making an uproar mutually as the low pass filter in the phase-locked loop systems;

The exponent number of said low pass filter is increased to quadravalence, and makes the resistance capacitance product of quadravalence and the resistance capacitance product coupling on the 3rd rank, and the capacitance of quadravalence is greater than the voltage-controlled end parasitic capacitance of 10 multiplication of voltage controlled oscillators;

Regulate the size of the charge pump output current of phase-locked loop chip in the phase-locked loop systems; Till the bulge of making an uproar mutually in curve is made an uproar in the output of eliminating phase-locked loop systems mutually, this moment will be in the output of the output under the feedback division coefficient of the feedback divider of setting as phase-locked loop systems.

2. the low small step of making an uproar mutually according to claim 1 advances to combine implementation method frequently, it is characterized in that, the said low condition of making an uproar mutually specifically comprises:

The output of phase-locked loop systems stable the showing of curve of making an uproar mutually: the bulge of not making an uproar mutually at the cut-off frequency place of low pass filter, and differ in the theoretical value that the cut-off frequency of low pass filter calculates according to the normalization noise floor of phase-locked loop chip with the interior beguine of the value of making an uproar mutually and to be no more than 20dB.

3. the low small step of making an uproar mutually according to claim 1 advances to combine implementation method frequently, it is characterized in that, the resistance capacitance product of said quadravalence and the resistance capacitance product on the 3rd rank coupling specifically comprise:

The resistance capacitance product of quadravalence is 1～1.5 times of resistance capacitance product on the 3rd rank.

4. the low small step of making an uproar mutually according to claim 1 advances to combine implementation method frequently, it is characterized in that said phase-locked loop chip is HMC700, HMC704 or ADF4350.

5. the low small step of making an uproar mutually according to claim 4 advances to combine implementation method frequently, it is characterized in that the feedback division coefficient of the feedback divider of said setting is 1～17.

6. the low small step of making an uproar mutually according to claim 1 advances to combine implementation method frequently, it is characterized in that the voltage controlled oscillator in the said phase-locked loop systems is the V600ME20-LF chip of Z～communications company.

7. the low small step of making an uproar mutually according to claim 1 advances to combine implementation method frequently, it is characterized in that said low pass filter is second order, three rank or quadravalence low pass filter.

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