CN102420247B - Group-III nitride HEM (High Electron Mobility Transistor) device - Google Patents
Group-III nitride HEM (High Electron Mobility Transistor) device Download PDFInfo
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- CN102420247B CN102420247B CN 201110367070 CN201110367070A CN102420247B CN 102420247 B CN102420247 B CN 102420247B CN 201110367070 CN201110367070 CN 201110367070 CN 201110367070 A CN201110367070 A CN 201110367070A CN 102420247 B CN102420247 B CN 102420247B
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Abstract
The invention discloses a Group-III nitride HEM (High Electron Mobility Transistor) device which comprises a source electrode, a drain electrode, a main grid, an auxiliary grid, an insulating dielectric layer and a heterojunction structure; the source electrode and the drain electrode are electrically connected through two-dimension electron gas formed in the heterojunction structure; the heterojunction structure comprises a first semiconductor and a second semiconductor; the second semiconductor is formed on the surface of the first semiconductor and is provided with a band gap wider than the first semiconductor; the first semiconductor is arranged between the source electrode and the drain electrode; the main grate is arranged on the surface of the second semiconductor near one side of source electrode and is in schottky contact with the second semiconductor; the dielectric layer is formed on the second semiconductor and the surface of the main grid and is arranged between the source electrode and the drain electrode; the auxiliary grid is formed on the surface of the dielectric layer; at least one side edge of the auxiliary grid is extended toward the direction of the source electrode or the drain electrode; meanwhile, an orthographic projection of the auxiliary grid are overlapped with two side edges of the main grate. The Group-III nitride HEM device can fundamentally and effectively inhibit 'Current Collapse Effect'.
Description
Technical field
The present invention relates to a kind of High Electron Mobility Transistor (High Electron Mobility Transistor, HEMT), relate in particular to a kind of III group-III nitride HEMT device.
Background technology
When the HEMT device adopts the III group-III nitride semiconductor, because piezoelectric polarization and spontaneous polarization effect, on heterostructure (Heterostructure), such as AlGaN/GaN, can form the two-dimensional electron gas of high concentration.In addition, the HEMT device adopts the III group-III nitride semiconductor, can obtain very high insulation breakdown electric field strength and good high-temperature stability.HEMT with III group-III nitride semiconductor of heterostructure not only can be used as high-frequency element and uses, and be applicable to high voltage the device for power switching of large electric current.
When existing III group-III nitride semiconductor HEMT device uses as high-frequency element or high voltage switch device, the drain electrode output current does not often catch up with the variation of grid control signal, the large situation of conducting transient delay can appear, " the current collapse phenomenon " that this is III group-III nitride semiconductor HEMT device having a strong impact on the practicality of device.Existing explanation to " current collapse phenomenon " of relatively generally acknowledging is " empty bar phantom "." empty bar phantom " thought when the device OFF state, electronic injection is arranged to semiconductor surface, thereby formed electronegative empty grid by surface state or defect capture, electronegative empty grid are because the electrostatic induction meeting reduces grid leak, the channel electrons of bonding pad, grid source, when device changes from OFF state to conducting state, although the raceway groove under the grid can a large amount of electronics of very fast accumulation, but empty grid electric charge but can not in time discharge, channel electrons concentration under the empty grid is lower, so the drain terminal output current is less, only have after empty grid electric charge fully discharges, the drain terminal electric current just can return to the level of dc state.At present, the method for inhibition " current collapse " commonly used has: semiconductor is carried out surface treatment, reduce surface state or interface state density; Reduce gate electrode near the electric field strength of drain electrode one end by field plate structure, reduce electronics by the probability of defect capture, suppress current collapse.But this type of method effect in the situation of large electric current, large voltage that suppresses current collapse is unsatisfactory.
Summary of the invention
The object of the invention is to propose a kind of III group-III nitride HEMT (High Electron Mobility Transistor, High Electron Mobility Transistor) device, this device has the lamination double-gate structure, it is regulated and control two-dimensional electron gas in the raceway groove by cooperatively interacting of secondary grid and main grid, make HEMT device drain terminal output current can get caught up in the variation of gate voltage, and then fundamentally suppress " current collapse effect ".
For achieving the above object, the present invention has adopted following technical scheme:
A kind of III group-III nitride HEMT device, comprise source electrode, drain electrode and heterostructure, described source electrode is electrically connected by the two-dimensional electron gas that is formed in the heterostructure with drain electrode, described heterostructure comprises the first semiconductor and the second semiconductor, described the first semiconductor is arranged between source electrode and the drain electrode, described the second semiconductor is formed at the first semiconductor surface, and have and be wider than the first semi-conductive band gap, it is characterized in that, described HEMT device also comprises main grid, insulating medium layer and secondary grid, wherein:
Described main grid is arranged at the second semiconductor surface near source electrode one side, and contacts with the second semiconductor formation Xiao Jite;
Described dielectric layer is formed at the second semiconductor and main grid surface, and is arranged between described source electrode and the drain electrode;
Described secondary grid are formed at the dielectric layer surface, and its at least one lateral edges extends to source electrode or drain electrode direction, and simultaneously its orthographic projection and main grid both sides of the edge are all overlapping.
Described source electrode is connected with drain electrode with the electronegative potential of power supply and is connected with high potential.
Described the first semiconductor and the second semiconductor equalizing adopt the III group-III nitride semiconductor.
Extend to source electrode and drain electrode direction respectively the both sides of the edge of described secondary grid, perhaps, also can be that described secondary grid only have a lateral edges to extend to corresponding source electrode or drain electrode direction.
When described HEMT device work, described main grid and secondary grid are respectively by control signal control, and when described HEMT device was processed conducting state, the current potential of described secondary grid-control signal processed was higher than the current potential of main grid control signal.
Description of drawings
Fig. 1 is the cross-sectional view of lamination double grid HEMT of the present invention;
Fig. 2 a is the partial structurtes schematic diagram of common HEMT device;
Fig. 2 b is the partial structurtes schematic diagram of lamination double grid HEMT device of the present invention;
Fig. 3 is the structural representation of HEMT device in the present invention's one preferred embodiments, and wherein secondary grid respectively have extension to leakage and source electrode direction;
Fig. 4 is the structural representation of HEMT device in another preferred embodiments of the present invention, and wherein secondary grid only have extension to the drain electrode direction.
Embodiment
Consult Fig. 2 a, the reason of common HEMT device (take the AlGaN/GaN device as example) current collapse phenomenon is: under the device off state, can accumulate at the interface negative electrical charge at grid metal 4 both sides AlGaN layers 3 with insulating medium layer 6 and form negative electrical charge accumulation area 21, because electrostatic induction effect, these negative electrical charges can reduce again even exhaust fully the two-dimensional electron gas of below channel region, form raceway groove depletion region 22.When grid voltage rises, when device is changed from OFF state to conducting state, grid below two-dimensional electron gas is subjected to grid voltage control and rises, the raceway groove conducting of grid below, but the negative electrical charge of interface charge accumulation area is owing to be in than deep energy level and can not in time disengage, therefore the two-dimensional electron gas below in the raceway groove or less, so fully conducting of device, along with the time increases, the negative electrical charge of interface charge accumulation area discharges from deep energy level gradually, and electron concentration rises in its below raceway groove, and device changes to complete conducting gradually, according to present result of study, negative electrical charge reaches the magnitude of microsecond～second from the time that deep energy level discharges.
For overcoming the defective of aforementioned common HEMT device, the present invention proposes a kind of III group-III nitride HEMT device with lamination double-gate structure, consult Fig. 1, source electrode 7, the drain electrode 8 of this device are positioned at both sides, near the second semiconductor 3(of source electrode 7 one sides as, the AlGaN layer) there is a gate electrode on the surface, is called main grid 4, and there is an insulating medium layer 6 the main grid top (such as Si
3N
4), there is another gate electrode the insulating medium layer top, is called secondary grid 5.As shown in Figure 1, secondary grid are positioned at the top of main grid, on vertical plane with the main grid both sides of the edge have overlapping, and to the source, drain electrode has certain extension.Aforementioned the first semiconductor 2(such as GaN layer) can be located at (such as sapphire, carborundum and silicon etc.) on the substrate 1.
Consult Fig. 2 b, under lamination double grid HEMT device off state of the present invention, main grid 4 is biased in below the threshold voltage, add a sufficiently high positive bias on the secondary grid 5, although main grid metal both sides the second semiconductor 3 can accumulate negative electrical charge (forming negative electrical charge accumulation area 21) at the interface equally with insulating medium layer 6, because sufficiently high forward biased effect on the secondary grid, the interface negative electrical charge can not shield secondary grid electric field fully, there is enough electric fields go to induct two-dimensional electron gas in the channel region, and keeps electric charge accumulating region below raceway groove conducting (forming raceway groove conducting district 23); When main grid voltage rises, when device changed from OFF state to conducting state, secondary gate voltage remained unchanged, the still conducting of raceway groove of interface charge accumulation area below, so the delay that can the generation current avalanche do not cause of device.
If device works in on-off mode, then the type of drive of lamination double grid HEMT device of the present invention can be taked: main grid and secondary grid are added respectively synchronous pulse signal, secondary gate voltage is higher than main grid voltage, when device changes from OFF state to conducting state, the high voltage of secondary grid can overcome the shielding of interface negative electrical charge and thereunder force to generate enough two-dimensional electron gas, has avoided current collapse.It should be noted that when OFF state, the biasing of secondary grid can be independent of main grid, therefore select the biasing of secondary grid under the suitable OFF state, device can obtain better puncture voltage.
More than technical solution of the present invention is summarized, in order to make the public can clearer understanding technological means of the present invention, and can be implemented according to the content of specification, below technical scheme of the present invention is further described as example based on the device of AlGaN/GaN heterojunction.
Consult Fig. 3, as a preferred embodiment of the present invention, this HEMT has: the first semiconductor 13 (GaN) and be formed on the second semiconductor 14(AlGaN on the first semiconductor 13).The first semiconductor 13 specially mixes.In the second semiconductor 14, can mix N-shaped impurity, also can not mix.The band gap of the second semiconductor 14 is wider than the band gap of the first semiconductor 13.The thickness of the second semiconductor 14 is about 15 to 30nm.The first semiconductor 13 and the second semiconductor 14 form heterostructure, are forming at the interface two-dimensional electron gas (2DEG).
This HEMT has by the drain electrode 11 of spacing distance configured separate and source electrode 12.Drain electrode 11 runs through the second semiconductor 14 with source electrode 12 and extends to the first semiconductor 13, is connected with two-dimensional electron gas in the raceway groove.Drain electrode 11 and source electrode 12 are to form ohmic contact by multiple layer metal (as: Ti/Al/Ti/Au or Ti/Al/Ni/Au etc.) by quick high-temp annealing.
Further, this HEMT has major and minor pair of Gate structure, and main grid 16 is manufactured between source electrode and the drain electrode, near an end of source electrode, and main grid 16 direct and the second semiconductor 14 Surface Contacts, and form Schottky contacts.Secondary grid 18 are arranged on insulating medium layer 17 (such as Si
3N
4) on, in vertical direction with main grid have overlapping, and to the source, the drain electrode direction respectively has extension (perhaps, only extend to drain electrode or source electrode direction, Figure 4 shows that secondary grid only extend to the drain electrode direction).
The operation principle of this HEMT is as follows: because of the band gap width of the second semiconductor 14 band gap width greater than the first semiconductor 13, heterojunction boundary at the first semiconductor 13 and the second semiconductor 14 forms Two-dimensional electron gas-bearing formation (2DEG), and this Two-dimensional electron gas-bearing formation (2DEG) is present in a side of the first semiconductor 13 of heterojunction boundary.
When adding high potential on the main grid 16, two-dimensional electron gas is higher in the raceway groove, and device is in opening; When adding electronegative potential on the main grid 16, two-dimensional electron gas is depleted in the raceway groove, and device is in closed condition; So can be by the current potential on the main grid 16 be controlled, control main grid 16 times the two-dimensional electron gas in the corresponding raceway groove, thereby the on off state of control device raceway groove.
Above-described embodiment only is explanation technical conceive of the present invention and characteristics, and its purpose is to allow the personage who is familiar with technique can understand content of the present invention and according to this enforcement, can not limit protection scope of the present invention with this.All equivalences that Spirit Essence is done according to the present invention change or modify, and all should be encompassed within protection scope of the present invention.
Claims (5)
1. III group-III nitride HEMT device, comprise source electrode, drain electrode and heterostructure, described source electrode is electrically connected by the two-dimensional electron gas that is formed in the heterostructure with drain electrode, described heterostructure comprises the first semiconductor and the second semiconductor, described the first semiconductor is arranged between source electrode and the drain electrode, described the second semiconductor is formed at the first semiconductor surface, and have and be wider than the first semi-conductive band gap, it is characterized in that, described HEMT device also comprises main grid, insulating medium layer and secondary grid, wherein:
Described main grid is arranged at the second semiconductor surface near source electrode one side, and contacts with the second semiconductor formation Xiao Jite;
Described dielectric layer is formed at the second semiconductor and main grid surface, and is arranged between described source electrode and the drain electrode;
Described secondary grid are formed at the dielectric layer surface, and its at least one lateral edges extends to source electrode or drain electrode direction, and simultaneously its orthographic projection and main grid both sides of the edge are all overlapping;
And when described HEMT device work, described main grid and secondary grid are respectively by control signal control, and when described HEMT device was in conducting state, the current potential of described secondary grid-control signal processed was higher than the current potential of main grid control signal.
2. III group-III nitride HEMT device according to claim 1 is characterized in that, described source electrode is connected with drain electrode with the electronegative potential of power supply and is connected with high potential.
3. III group-III nitride HEMT device according to claim 1 is characterized in that, described the first semiconductor and the second semiconductor equalizing adopt the III group-III nitride semiconductor.
4. III group-III nitride HEMT device according to claim 1 is characterized in that, extend to source electrode and drain electrode direction respectively the both sides of the edge of described secondary grid.
5. III group-III nitride HEMT device according to claim 1 is characterized in that, described secondary grid only have a lateral edges to extend to corresponding source electrode or drain electrode direction.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201110367070 CN102420247B (en) | 2011-11-18 | 2011-11-18 | Group-III nitride HEM (High Electron Mobility Transistor) device |
| PCT/CN2012/001552 WO2013071699A1 (en) | 2011-11-18 | 2012-11-16 | Group iii nitride hemt device |
| US14/357,911 US9070756B2 (en) | 2011-11-18 | 2012-11-16 | Group III nitride high electron mobility transistor (HEMT) device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201110367070 CN102420247B (en) | 2011-11-18 | 2011-11-18 | Group-III nitride HEM (High Electron Mobility Transistor) device |
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| CN102420247A CN102420247A (en) | 2012-04-18 |
| CN102420247B true CN102420247B (en) | 2013-10-30 |
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| CN 201110367070 Expired - Fee Related CN102420247B (en) | 2011-11-18 | 2011-11-18 | Group-III nitride HEM (High Electron Mobility Transistor) device |
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| WO2013071699A1 (en) * | 2011-11-18 | 2013-05-23 | 中国科学院苏州纳米技术与纳米仿生研究所 | Group iii nitride hemt device |
| CN102856371B (en) * | 2012-09-28 | 2015-08-05 | 中国科学院苏州纳米技术与纳米仿生研究所 | Novel double grid three end III group-III nitride enhancement mode HEMT device |
| CN102856372B (en) * | 2012-09-28 | 2015-12-09 | 中国科学院苏州纳米技术与纳米仿生研究所 | The encapsulating structure of double grid four end group III-nitride enhancement mode HEMT device |
| CN106531789A (en) * | 2015-09-11 | 2017-03-22 | 中国科学院苏州纳米技术与纳米仿生研究所 | Method for achieving enhanced HEMT through polarity control and enhanced HEMT |
| US10283598B2 (en) * | 2016-05-06 | 2019-05-07 | Hangzhou Dianzi University | III-V heterojunction field effect transistor |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1950945A (en) * | 2004-05-11 | 2007-04-18 | 美商克立股份有限公司 | Wide bandgap transistors with multiple field plates |
| JP2008130672A (en) * | 2006-11-17 | 2008-06-05 | Furukawa Electric Co Ltd:The | Nitride-based semiconductor heterojunction field effect transistor |
| CN102074576A (en) * | 2009-10-30 | 2011-05-25 | 万国半导体股份有限公司 | Normally off gallium nitride field effect transistors (fet) |
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| US7388236B2 (en) * | 2006-03-29 | 2008-06-17 | Cree, Inc. | High efficiency and/or high power density wide bandgap transistors |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1950945A (en) * | 2004-05-11 | 2007-04-18 | 美商克立股份有限公司 | Wide bandgap transistors with multiple field plates |
| JP2008130672A (en) * | 2006-11-17 | 2008-06-05 | Furukawa Electric Co Ltd:The | Nitride-based semiconductor heterojunction field effect transistor |
| CN102074576A (en) * | 2009-10-30 | 2011-05-25 | 万国半导体股份有限公司 | Normally off gallium nitride field effect transistors (fet) |
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