CN102386932B - LDPC code constitution method - Google Patents

LDPC code constitution method Download PDF

Info

Publication number
CN102386932B
CN102386932B CN2011103414024A CN201110341402A CN102386932B CN 102386932 B CN102386932 B CN 102386932B CN 2011103414024 A CN2011103414024 A CN 2011103414024A CN 201110341402 A CN201110341402 A CN 201110341402A CN 102386932 B CN102386932 B CN 102386932B
Authority
CN
China
Prior art keywords
row
matrix
ldpc code
col
motherboard
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN2011103414024A
Other languages
Chinese (zh)
Other versions
CN102386932A (en
Inventor
陆连伟
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Guangzhou Haige Communication Group Inc Co
Original Assignee
Guangzhou Haige Communication Group Inc Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Guangzhou Haige Communication Group Inc Co filed Critical Guangzhou Haige Communication Group Inc Co
Priority to CN2011103414024A priority Critical patent/CN102386932B/en
Publication of CN102386932A publication Critical patent/CN102386932A/en
Application granted granted Critical
Publication of CN102386932B publication Critical patent/CN102386932B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Error Detection And Correction (AREA)

Abstract

The invention discloses a constitution method for two LDPC codes with different check matrix structures. The method comprises the steps as follows: firstly, the structure of the rarefaction check matrix H1 of the first LDPC code is confirmed; secondly, the parallel degree P and parameter n of an LDPC code encoder are selected according to the P and n search parameter combination (wrow, wco1 and k2); thirdly, according to the searched combination (wrow, wco1 and k2), a mother board matrix C is constructed; fourthly; a matrix Hi and j replaces the corresponding elements of the motherboard matrix C so as to obtain the check matrix H1of the first LDPC code; and fifthly, and the second check matrix H2 is obtained through ordering the rows and the lines of the H1. According to the invention, the first LDPC code with linear coding complexity and low required memory capacity can be constructed through simple search; the second LDPC code can be obtained through ordering the lines and the rows of the rarefaction check matrix of the first LDPC code; the first LDPC code with the same coed rate but different code lengths can be gained through simple replacing; and the design difficulty is greatly reduced.

Description

The building method of LDPC code
Technical field
The present invention relates to the communications field, particularly the building method of LDPC code.
Background technology
Communication system adopts channel coding technology to guarantee the reliability of in noisy communication channel, communicating by letter usually.Such as, in satellite communication system,, there is a large amount of noise sources in the impact due to geographical and environmental factor.These communication channels have its theoretic maximum communication capacity (namely famous shannon limit), and this capacity can use the bit rate (bps) under specific signal to noise ratio (SNR) condition to represent.Therefore, the design of forward error correction (FEC) is exactly in order to pursue the maximum bit rate near shannon limit.Wherein a kind of coding near shannon limit is exactly low-density checksum (LDPC) code.
The LDPC code is a kind of linear block codes, it can obtain the performance near shannon limit in a large amount of transfer of data and memory channel, be widely used in various wireless communication systems, such as second generation satellite digital video broadcast standard (DVB-S2), China's military satellite communication system and global microwave H access H interoperability technology (WiMax) etc., it is up to a hundred million that the flank speed of supporting at present will reach, and will realize the data rate of hundreds of million future.
Why traditional LDPC code is not widely used, and is because there are a plurality of defects in it, and one of them defect is exactly that the coding techniques of LDPC code is very complicated.If use the generator matrix of LDPC code to encode to information, need non-sparse check matrix of storage, and for the performance of pursuing the LDPC code requires the code length long enough, this just causes this sparse check matrix can be very large, to storage, brings very large problem.Following defect is arranged aspect design of encoder: one, the check matrix of traditional LDPC code has stochastic behaviour, need to store a non-sparse check matrix during decoding, and require the code length long enough for the performance of pursuing the LDPC code, this just causes this sparse check matrix can be very large, to storage, brings very large problem; Two, have contradiction between the decoder throughput of traditional LDPC code and implementation complexity, if use serial decoding, throughput must be very low, if use complete parallel or part parallel decoding, the read-write of memory is controlled and must be become quite loaded down with trivial details.
Summary of the invention
, in order to overcome the deficiencies in the prior art, the object of the present invention is to provide the building method of the LDPC code of simplicity of design.
Purpose of the present invention is achieved through the following technical solutions:
The building method of LDPC code comprises the following steps:
(1) determine the sparse check matrix H of first kind LDPC code 1Structure, H 1Size is mP * nP, has following form:
H 1 = [ H s 1 | H p 1 ] = H 1,1 L H 1 , k H 1 , k + 1 L H 1 , n H 2,1 L H 2 , k H 2 , k + 1 L H 2 , n M O M M O M H m , 1 L H m , k H m , k + 1 L H m , n
H in formula I, jBe the matrix of P * P for size, the row of each matrix is heavy is fixed value 1 or 0, by unit matrix I or null matrix, through cyclic shift, is obtained; 1≤i≤m wherein, 1≤j≤n;
In formula
Figure BDA0000104845420000022
Corresponding informance bit part, size is mP * kP, wherein k=n-m;
Have following structure:
H p 1 = I 0 0 L 0 0 a I I 0 L 0 0 0 0 I I L 0 0 0 L L O O L L L 0 0 0 L I 0 0 0 0 0 L I I 0 0 0 0 L 0 I I ;
Wherein
Figure BDA0000104845420000025
The matrix that upper right corner a represents has following structure:
a = 0 0 Λ Λ 0 1 0 O O M 0 1 O O M M O O 0 0 0 Λ 0 1 0 ;
(2) select degree of parallelism P and the parameter n of ldpc code decoder according to the demand of designed communication system, the code length of LDPC code is nP, and wherein the value of parameter n is the common multiple of designed all code check denominators of communication system; According to P and n search parameter combination (w row, w col, k 2); W wherein rowFor
Figure BDA0000104845420000027
Row heavy, w colFor
Figure BDA0000104845420000028
Column weight, k 2=(m Wrow-3k)/(w col-3);
(3) according to the parameter combinations (w that searches row, w col, k 2), structure motherboard Matrix C, described mother matrix Matrix C is defined as: use matrix H I, jIn the first row, the row mark of 1 position replaces In H I, j, use 0 matrix that replaces full null matrix to obtain;
(4), according to the motherboard Matrix C of structure, use the submatrix H corresponding with each nonzero element in the motherboard Matrix C I, jSubstitute the nonzero element in the mother matrix Matrix C, use the neutral element in full null matrix replacement mother matrix Matrix C, obtain In conjunction with
Figure BDA0000104845420000032
Obtain the check matrix of first kind LDPC code word
Figure BDA0000104845420000033
The submatrix H that wherein nonzero element is corresponding with it I, jCorresponding relation as follows: the value of nonzero element is submatrix H I, jThe first row in the row mark of 1 position.
Can also construct the step of the method for the Equations of The Second Kind LDPC code that is associated with described first kind LDPC code after completing steps (4):
(5) to H 1The row of matrix sorts in the following order:
1,P+1,...,(m-1)P+1,2,P+2,...,(m-1)P+2,P,2P,...,mP;
After being resequenced
Figure BDA0000104845420000034
Submatrix in formula
Figure BDA0000104845420000035
Size is mP * kP,
Figure BDA0000104845420000036
Size is mP * mP, wherein k=n-m;
Then with submatrix
Figure BDA0000104845420000037
Row arrange in the following order,
1,P+1,...,(m-1)P+1,2,P+2,...,(m-1)P+2,P,2P,...,mP,
Namely obtain the sparse check matrix H of Equations of The Second Kind LDPC code 2
The submatrix of step (4) structure
Figure BDA0000104845420000038
Also meet following restrictive condition:
(a) the heavy w of row rowIdentical, span is [3,40];
(b) value of column weight has at most two, and wherein less one is fixed value 3, and shared columns is designated as k 1P, another one is designated as w col, shared columns is designated as k 2P, wherein k 1+ k 2=k;
(c) value of column weight is according to arranging from left to right from big to small, corresponding to information bit from the highest significant bit to minimum effective bit;
(d) with
Figure BDA0000104845420000039
The check matrix H that forms 1Ring length is not 4 ring.
Parameter combinations (the w that the described basis of step (3) searches row, w col, k 2), structure motherboard Matrix C specifically comprises the following steps:
(3-1) design k 2Individual column weight is w colRow, be specially:
(3-1-1) produce at random w colNumbers different between individual [1, m] are listed as the rower at non-zero element place, 1≤i≤k as i in the motherboard Matrix C 2If the heavy w that equaled of the row that rower is corresponding row, will equal the heavy rower of row and be adjusted into the heavy minimum rower of row in nonoptional rower in prostatitis;
(3-1-2) produce at random w colThe nonzero element that number between individual [1, P] is listed as i in the motherboard Matrix C: described w colNumber meets: the value of (1) adjacent two row nonzero elements is different; (2) this w colThe value of any row corresponding row in individual value in any two values and the i-1 row that produce before is not identical;
(3-2) the design column weight is the k of 3 motherboard Matrix C 1=k-k 2Row are specially:
(3-2-1) produce at random the rower of numbers different between 3 [1, m] as i row non-zero element place in the motherboard Matrix C, k 2+ 1≤i≤k; If the heavy w that equaled of the row that rower is corresponding row, will equal the heavy rower of row and be adjusted into the heavy minimum rower of row in nonoptional rower in prostatitis;
(3-2-2) produce at random the nonzero element of 3 numbers between [1, P] as i row in C: described 3 numbers meet: the value of (1) adjacent two row nonzero elements is different; (2) in these 3 values, the value of any row corresponding row in any two values and the i-1 row that produce before is not identical;
The k that (3-3) step (3-1) is produced 2The k that row and step (3-2) produce 1The row amalgamation forms the motherboard Matrix C together.
The described search parameter combination of step (2) (w row, w col, k 2), detailed process is:
At w row(max (3,3k/m)≤w row≤ 40) and w col(3≤w col≤ m) search in scope, search and meet k 2=(mw row-3k)/(w col-3), and k 2Combination (w for nonnegative integer row, w col, k 2) be rational combination.
Completing steps (4) is also constructed the identical but process of the LDPC code check matrix that code length is different of the code check of the first kind LDPC code that obtains from step (4) afterwards: use size as P ' * P ' (P '>P) matrix H " I, jNonzero element in the mother matrix Matrix C that replacement step (3) obtains, use full null matrix replacement wherein the neutral element of size as P ' * P ', obtains matrix
Figure BDA0000104845420000041
Associate(d) matrix again
Figure BDA0000104845420000042
Obtain sparse check matrix H 1 ′ ′ = [ H s 1 ′ ′ | H p 1 ′ ′ ] .
Compared with prior art, the present invention has the following advantages and technique effect:
(1) simplicity of design of the present invention, only need to carry out simply searching for just can construct to have uniform enconding complexity and the low first kind LDPC code of required storage;
The sparse check matrix of the first kind LDPC code that (2) will construct can obtain the check matrix of Equations of The Second Kind LDPC code through the sequence of simple row and column, these two kinds of LDPC code close relation, in actual applications, if the coder of known a kind of yard, can carry out simple sequence to check digit at the input of the output of encoder and decoder and can obtain the coder of another kind of code, greatly simplify design difficulty;
(3) in first kind LDPC code construction process, just can construct a plurality of code checks by simple replacement identical, the first kind LDPC code that code length is different, simplified design difficulty greatly.
Description of drawings
Fig. 1 is the structure flow chart of two class LDPC code check matrixes.
Fig. 2 is the cycle characteristics schematic diagram of the sparse check matrix of Equations of The Second Kind LDPC code.
Embodiment
, below in conjunction with embodiment and accompanying drawing, the present invention is described in further detail, but embodiments of the present invention are not limited to this.
Embodiment
As shown in Figure 1, the building method of LDPC code of the present invention comprises the following steps:
(1) determine the sparse check matrix H of first kind LDPC code 1Structure, H 1Size is mP * nP, has following form:
H 1 = [ H s 1 | H p 1 ] = H 1,1 L H 1 , k H 1 , k + 1 L H 1 , n H 2,1 L H 2 , k H 2 , k + 1 L H 2 , n M O M M O M H m , 1 L H m , k H m , k + 1 L H m , n
H in formula I, jBe the matrix of P * P for size, the row of each matrix is heavy is fixed value 1 or 0, is to be obtained through cyclic shift by unit matrix I or null matrix; 1≤i≤m wherein, 1≤j≤n;
In formula
Figure BDA0000104845420000052
Corresponding informance bit part, size is mP * kP, wherein k=n-m;
Figure BDA0000104845420000053
Have following structure:
H p 1 = I 0 0 L 0 0 a I I 0 L 0 0 0 0 I I L 0 0 0 L L O O L L L 0 0 0 L I 0 0 0 0 0 L I I 0 0 0 0 L 0 I I
Wherein
Figure BDA0000104845420000055
The matrix that upper right corner a represents has following structure:
a = 0 0 Λ Λ 0 1 0 O O M 0 1 O O M M O O 0 0 0 Λ 0 1 0
Figure BDA0000104845420000057
The characteristics of matrix have guaranteed that LDPC code coding has linear complexity,
Figure BDA0000104845420000058
The characteristics of matrix have guaranteed that the LDPC CODEC has lower memory space.
(2) select degree of parallelism P and the parameter n of ldpc code decoder according to the demand of designed communication system, the code length of LDPC code is nP; Such as: when the data rate of design system is had relatively high expectations, should select larger P; While requiring compatible various code rate, the n of selection should be the common multiple of all code check denominators, and guarantee m and k are integer like this.For example, the compatible code check 1/3,1/2,2/3,3/4 of system requirements, 4/5,7/8 o'clock, n should be all code check denominators { integral multiples of the least common multiple 120 of 3,2,3,4,5,8}.
For the check matrix that makes structure simple and practical, can be right
Figure BDA0000104845420000061
Do following restriction:
(a)
Figure BDA0000104845420000062
The heavy w of row rowIdentical, span is [3,40];
(b)
Figure BDA0000104845420000063
The value of column weight have at most two, wherein less one is fixed value 3, shared columns is designated as k 1P, another one is designated as w col, shared columns is designated as k 2P, wherein k 1+ k 2=k;
(c) value of column weight, according to arranging from left to right from big to small, arrives minimum effective bit (LSB, Least Significant Bits) corresponding to information bit from the highest significant bit (MSB, Most Significant Bits);
(d) with
Figure BDA0000104845420000064
The check matrix H that forms after combination 1Ring length is not 4 ring (being called for short ring 4), can resolve into two conditions: (1)
Figure BDA0000104845420000065
Do not encircle 4, (2) Any row in two non-zero submatrices H of arbitrary neighborhood I, jAnd H I+1, jNot identical.According to
Figure BDA0000104845420000067
Characteristics as can be known, like this With
Figure BDA0000104845420000069
H after combination 1Just can not form ring length and be 4 ring.
Search procedure is specially:
(b) knows according to condition, w colHunting zone be 3≤w col≤ m, and by matrix
Figure BDA00001048454200000610
In 1 number fixing as can be known:
(3k 1+w colk 2)P=mPw row(1)
Again due to w col〉=3, k 1+ k 2=k, therefore:
k 2=(mw row-3k)/(w col-3)(2)
w row≥3k/m (3)
In summary, w rowHunting zone be max (3,3k/m)≤w row≤ 40.
To w row(max (3,3k/m)≤w row≤ 40) and w col(3≤w col≤ m) search in the scope of appointment, search and meet formula (2) and be the combination (w of nonnegative integer row, w col, k 2) be exactly reasonably combination.
(3) according to the parameter combinations (w that searches row, w col, k 2), structure motherboard Matrix C, described mother matrix Matrix C is defined as: use matrix H I, jIn the first row, the row mark of 1 position substitutes
Figure BDA00001048454200000611
In H I, jThe matrix that (full null matrix replaces with 0) obtains, for example, matrix H I, jThe first row in 1 be positioned at the 3rd row, use 3 to replace In H I, j
Specifically comprising the following steps of structure motherboard Matrix C:
(3-1) design k 2Individual column weight is w colRow, be specially:
(3-1-1) produce at random w colNumbers different between individual [1, m] are listed as the rower at non-zero element place, 1≤i≤k as i in C 2If the heavy w that equaled of the row that rower is corresponding row, will equal the heavy rower of row and be adjusted into the heavy minimum rower of row in nonoptional rower in prostatitis;
(3-1-2) produce at random w colThe nonzero element that number between individual [1, P] is listed as i in C: described w colNumber meets: the value of (1) adjacent two row nonzero elements is different; (2) this w colThe value of any row corresponding row in individual value in any two values and the i-1 row that produce before is not identical; If do not meet wherein one, need to adjust this w colThe position of number., if through the value that does not still satisfy condition after the several times adjustment, need to restart the search procedure of (3-1-2).Still do not find suitable value if pass through again several times (3-1-2) process, return to (3-1-1) and again search for until satisfy condition;
(3-2) the design column weight is the k of 3 C 1=k-k 2Row are specially:
(3-2-1) produce at random the rower of numbers different between 3 [1, m] as i row non-zero element place in C, k 2+ 2≤i≤k; If the heavy w that equaled of the row that rower is corresponding row, will equal the heavy rower of row and be adjusted into the heavy minimum rower of row in nonoptional rower in prostatitis;
(3-2-2) produce at random the nonzero element of 3 numbers between [1, P] as i row in C: described 3 numbers meet: the value of (1) adjacent two row nonzero elements is different; (2) in these 3 values, the value of any row corresponding row in any two values and the i-1 row that produce before is not identical;
The k that (3-3) step (3-1) is produced 2The k that row and step (3-2) produce 1The row amalgamation forms the motherboard Matrix C together.
(4), according to the motherboard Matrix C of structure, use the submatrix H corresponding with each element value in the motherboard Matrix C I, jThe element (0 element uses full null matrix to replace) that substitutes in the mother matrix Matrix C obtains
Figure BDA0000104845420000071
And then obtain The submatrix H that wherein nonzero element is corresponding with it I, jCorresponding relation as follows: the value of nonzero element is submatrix H I, jThe first row in the row mark of 1 position, for example nonzero element is 3, its corresponding submatrix H I, jThe first row in 1 be positioned at the 3rd row.
By top search condition as can be known,, if the motherboard Matrix C meets the search condition that parameter is P, necessarily meeting the structural environment of the motherboard matrix of P '>P, is therefore the submatrix H of P ' * P ' with size I, jReplace the element in C can obtain the submatrix that parameter is P ' time
Figure BDA0000104845420000073
The LDPC code code check that construct this moment is identical with code word code check before, and just code length is different, and detailed process is:
Use the matrix H of size as P ' * P ' " I, jNonzero element in the mother matrix Matrix C that replacement step (3) obtains, use full null matrix replacement wherein the neutral element of size as P ' * P ', obtains matrix
Figure BDA0000104845420000074
Associate(d) matrix again
Figure BDA0000104845420000081
Obtain sparse check matrix
Figure BDA0000104845420000082
According to H 1" encode;
H wherein " I, jBe the matrix of P ' * P ' for size, P '>P, the row of each matrix is heavy is fixed value 1 or 0, is to be obtained through cyclic shift by unit matrix I or null matrix.
If input information bits s=[s 1, s 2, L, s kP], the check bit p=[p that calculates 1, p 2, L, p mP], the coding method of first kind LDPC code is as follows:
Step 1: utilize input message vector s, calculate intermediate object program x=[x 1, x 2, L, x mP]:
x = s ( H s 1 ) T - - - ( 4 )
Step 2: utilize x computation of parity bits p, adopt following formula:
p i = x i , i = 1 x i &CirclePlus; p ( m - 1 ) P + i - 1 , i < i &le; P x i &CirclePlus; p i - P , i > P - - - ( 5 )
Wherein
Figure BDA0000104845420000085
Addition in expression GF (2).
At first obtain first check bit p during coding 1=x 1, then obtain successively p P + 1 = x P + 1 &CirclePlus; p 1 , p 2 P + 1 = x 2 P + 1 &CirclePlus; p P + 1 , . . . . . . , p ( m - 1 ) P + 1 = x ( m - 1 ) P + 1 &CirclePlus; p ( m - 2 ) P + 1 , p 2 = x 2 &CirclePlus; p ( m - 1 ) P + 1 , . . . . . . , p mP = x mP &CirclePlus; p ( m - 1 ) P .
Code word c=[c after coding 1, c 2, L, c nP]=[s|p].
If need to construct the sparse check matrix H of the Equations of The Second Kind LDPC code that is associated with first kind LDPC code 2, can be undertaken by following steps:
To H 1The row of matrix sorts in the following order:
1,P+1,...,(m-1) P+ 1,2,P+2,...,(m-1)P+2,P,2P,...,mP;
After being resequenced Submatrix in formula
Figure BDA00001048454200000810
Size is mP * kP, Size is mP * mP, wherein k=n-m;
Then with submatrix
Figure BDA00001048454200000812
Row arrange in the following order:
1,P+1,...,(m-1) P+ 1,2,P+2,...,(m-1)P+2,P,2P,...,mP
Can obtain the sparse check matrix H of Equations of The Second Kind LDPC code 2
Equations of The Second Kind LDPC code is that non-canonical repeats accumulated codes (IRA), the sparse check matrix H of such LDPC code 2Following feature is arranged:
H 2 = [ H s 2 | H p 2 ]
Wherein
Figure BDA00001048454200000814
Triangle battle array under notch cuttype:
Figure BDA0000104845420000091
Figure BDA0000104845420000092
The characteristics of matrix have guaranteed that LDPC code coding has linear complexity,
Figure BDA0000104845420000093
The characteristics of matrix have guaranteed that the LDPC CODEC has lower memory space.
Figure BDA0000104845420000094
Matrix has structure as follows
H s 2 = [ A 1 A 2 . . A k ]
Each A wherein i(1≤i≤k) inner column weight is all identical, and size is mP * P, and is circular matrix, has cycle characteristics shown in Figure 2, and the black box that has same numeral in figure represents that the element on the check matrix correspondence position is 1, and colourless square corresponds to 0.As seen from Figure 2, the line number at the square place of same numeral can be determined by the line number of the square of same label in any row, the square line number difference of two row same numerals that face mutually is fixed as m=2mod (mP), and (mod is modulo operation, P=16 wherein), therefore each A in this case i1 line number during only needs storage one is listed as, then by calculating the line number of other row.Generally storing the line number at 1 place in the 1st row, is also initial verification address.
The coding of Equations of The Second Kind LDPC code (being the IRA code) divides following two steps to carry out:
Step 1: utilize input message vector s, calculate intermediate object program x=[x 1, x 2, L, x mP]:
x = s ( H s 2 ) T - - - ( 6 )
Step 2: utilize x computation of parity bits p, adopt following formula:
p i = x i , i = 1 x i &CirclePlus; p i - 1 , 1 < i &le; mP ,
Wherein Addition in expression GF (2).
At first obtain first check bit p during coding 1=x 1, then obtain successively p 2 = x 2 &CirclePlus; p 1 , p 3 = x 3 &CirclePlus; p 2 , . . . , p mP = x mP &CirclePlus; p mP - 1 .
Code word c=[c after coding 1, c 2, L, c nP]=[s|p].
Below discuss the relation between two class LDPC codes.
At first contrast the difference part of both check matrixes:
The code word c that is obtained by check matrix H coding and the pass between H are:
cH T=0(7)
By formula (7) as can be known, the row of check matrix H is exchanged the result that does not affect formula (6), namely do not affect coding result.We can be at first with H thus 1Row adjust (matrix of note after adjusting is:
Figure BDA0000104845420000101
Make matrix after adjusting
Figure BDA0000104845420000102
Part meets Equations of The Second Kind LDPC code
Figure BDA0000104845420000103
Form, namely each size needs to meet characteristic of circular matrix for the matrix in block form of mP * P.For this reason, we discuss H 1In matrix by H 1, i, H 2, i..., H M, iThe size that submatrix forms is mP * P matrix A i(1≤i≤k) wherein:
A i = H 1 , i H 2 , i M H m , i
With A iRow resequence, sort method is: extract each submatrix H 1, i, H 2, i..., H M, iJ capablely form in order a matrix and (be designated as B j, 1≤j≤P), and then with B jForm in order matrix A ' i:
A &prime; i = B 1 B 2 M B P
Due to submatrix H I, jBe to be obtained through cyclic shift by unit matrix I, have characteristic: element of a downward loopy moving of row just can obtain a+1 row (if 1 place behavior last column that a is listed as, next behavior the first row, referring to following formula).
H i , j = 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0
Characteristic is easily found out A ' thus iThe downward loopy moving m element of a row just can obtain a+1 and be listed as.That is to say A ' iIt is circular matrix.Due to all A ' i(wherein 1≤i≤k) obtains circular matrix so matrix through identical row adjustment
Figure BDA0000104845420000111
Meet Equations of The Second Kind LDPC code
Figure BDA0000104845420000112
Characteristic, wherein:
H s 1 &prime; = [ A &prime; 1 A &prime; 2 . . A &prime; k ]
Must, with matrix H 1Row rearrange in the following order, can make the matrix H after adjusting 1'
Figure BDA0000104845420000114
Part meets Equations of The Second Kind LDPC code
Figure BDA0000104845420000115
Form:
1,P+1,...,(m-1) P+ 1,2,P+2,...,(m-1)P+2,P,2P,...,mP
(8)
By top analysis as can be known, with H 1Be converted into the matrix H of equivalence through line ordering 1' afterwards, H 1With H 2Difference only be present in
Figure BDA0000104845420000116
With Part.
Analyze H 1Cataloged procedure:
At first obtain first check bit p during coding 1=x 1, then obtain successively p P + 1 = x P + 1 &CirclePlus; p 1 , p 2 P + 1 = x 2 P + 1 &CirclePlus; p P + 1 , . . . , p ( m - 1 ) P + 1 = x ( m - 1 ) P + 1 &CirclePlus; p ( m - 2 ) P + 1 , p 2 = x 2 &CirclePlus; p ( m - 1 ) P + 1 , . . . , p mP = x mP &CirclePlus; p ( m - 1 ) P .
If:
x &prime; = s ( H s 1 &prime; ) T - - - ( 9 )
By formula (6) as can be known, x iWith
Figure BDA00001048454200001112
Row corresponding one by one, according to
Figure BDA00001048454200001113
With
Figure BDA00001048454200001114
Corresponding relation as can be known the corresponding relation of x and x ' be:
{x 1,x P+1,...,x (m-1)P+1,x 2,x P+2,...,x (m-1)P+2,x 2P,...,x mP}={x′ 1,x′ 2,x′ 3,...,x′ mP}(10)
Hence one can see that, and cataloged procedure becomes:
p 1 = x &prime; 1 , p P + 1 = x &prime; 2 &CirclePlus; p 1 , p 2 P + 1 = x &prime; 3 &CirclePlus; p P + 1 , . . . , p ( m - 1 ) P + 1 = x &prime; m &CirclePlus; p ( m - 2 ) P + 1 , p 2 = x &prime; m + 1 &CirclePlus; p ( m - 1 ) P + 1 , . . . , p mP = x &prime; mP &CirclePlus; p ( m - 1 ) P .
Order
{p 1,p P+1,...,p (m-1)P+1,p 2,p P+2,...,p (m-1)P+2,p P,p 2P,...,p mP}={p′ 1,p′ 2,p′ 3,...,p′ mP}(11)
Cataloged procedure becomes:
p &prime; 1 = x &prime; 1 , p &prime; 2 = x &prime; 2 &CirclePlus; p &prime; 1 , p &prime; 3 = x &prime; 3 &CirclePlus; p &prime; 2 , . . . , p &prime; m m = x &prime; m &CirclePlus; p &prime; m - 1 , p &prime; m + 1 = x &prime; m + 1 &CirclePlus; p &prime; m , . . . , p &prime; mP = x &prime; mP &CirclePlus; p &prime; mP - 1 .
This process and H 2Cataloged procedure identical.From top derivation as can be known, H 1With H 2Difference between code word is that the check digit order is different, and that the order correspondence of check digit is H pThe order of rectangular array, hence one can see that, will
Figure BDA0000104845420000121
Row arrange according to the order shown in formula (7), H 1' can meet H 2The characteristics of matrix.
Because just there is difference in the two class LDPC codes of constructing on the order of check digit, if therefore the coder of a known class LDPC code will be constructed the coder of another kind of LDPC code, only need to sort and get final product the input of the output of encoder and decoder, not need extra modification.
Known H 1, obtain H after the sequence through row and column 2Process be not reversible.Suppose known H 2, the matrix that obtains after sorting according to top inverse process is H 2',
H 2 &prime; = [ H s 2 &prime; | H p 2 &prime; ]
Wherein,
Figure BDA0000104845420000123
With H 1In
Figure BDA0000104845420000124
Part-structure is identical, Have following structure:
H s 2 &prime; = H &prime; 1,1 H &prime; 1,2 L H &prime; 1 , k H &prime; 2,1 H &prime; 2,2 L H &prime; 2 , k M M O M H &prime; m , 1 H &prime; m , 2 L H &prime; m , k
H ' wherein I, jBe that size is the matrix of P * P, the row of each matrix is heavy for fixed value (being not limited to 1 and 0), when row is heavily r wThe time, H ' I, jBy r wThe unit matrix I of individual different process cyclic shift is cumulative to be obtained.
Above-described embodiment is the better execution mode of the present invention; but embodiments of the present invention are not limited by the examples; other any do not deviate from change, the modification done under Spirit Essence of the present invention and principle, substitutes, combination, simplify; all should be the substitute mode of equivalence, within being included in protection scope of the present invention.

Claims (5)

1.LDPC the building method of code, is characterized in that, comprises the following steps:
(1) determine the sparse check matrix H of first kind LDPC code 1Structure, H 1Size is mP * nP, has following form:
Figure FDA00003150878200011
H in formula i,jBe the matrix of P * P for size, the row of each matrix is heavy is fixed value 1 or 0, by unit matrix I or null matrix, through cyclic shift, is obtained; I=1 wherein, 2...m, j=1,2...n;
In formula
Figure FDA00003150878200012
Corresponding informance bit part, size is mP * kP, wherein k=n-m;
Figure FDA00003150878200013
Have following structure:
Figure FDA00003150878200014
Wherein
Figure FDA00003150878200015
The matrix that upper right corner a represents has following structure:
Figure FDA00003150878200016
(2) select degree of parallelism P and the parameter n of ldpc code decoder according to the demand of designed communication system, the code length of LDPC code is nP, and wherein the value of parameter n is the common multiple of designed all code check denominators of communication system; According to P and n search parameter combination (w row, w col, k 2); W wherein rowFor
Figure FDA00003150878200017
Row heavy, w colFor
Figure FDA00003150878200018
Column weight, k 2=(mw row-3k)/(w col-3);
(3) according to the parameter combinations (w that searches row, w col, k 2), structure motherboard Matrix C, described mother matrix Matrix C is defined as: use matrix H i,jIn the first row, the row mark of 1 position replaces In H i,j, use 0 matrix that replaces full null matrix to obtain;
Parameter combinations (the w that described basis searches row, w col, k 2), structure motherboard Matrix C specifically comprises the following steps:
(3-1) design k 2Individual column weight is w colRow, be specially:
(3-1-1) produce at random w colNumbers different between individual [1, m] are listed as the rower at non-zero element place, 1≤i≤k as i in the motherboard Matrix C 2If the heavy w that equaled of the row that rower is corresponding row, will equal the heavy rower of row and be adjusted into the heavy minimum rower of row in nonoptional rower in prostatitis;
(3-1-2) produce at random w colThe nonzero element that number between individual [1, P] is listed as i in the motherboard Matrix C: described w colNumber meets: the value of (1) adjacent two row nonzero elements is different; (2) this w colThe value of any row corresponding row in individual value in any two values and the i-1 row that produce before is not identical;
(3-2) the design column weight is the k of 3 motherboard Matrix C 1=k-k 2Row are specially:
(3-2-1) produce at random the rower of numbers different between 3 [1, m] as i row non-zero element place in the motherboard Matrix C, k 2+ 1≤i≤k; If the heavy w that equaled of the row that rower is corresponding row, will equal the heavy rower of row and be adjusted into the heavy minimum rower of row in nonoptional rower in prostatitis;
(3-2-2) produce at random the nonzero element of 3 numbers between [1, P] as i row in the motherboard Matrix C: described 3 numbers meet: the value of (1) adjacent two row nonzero elements is different; (2) in these 3 values, the value of any row corresponding row in any two values and the i-1 row that produce before is not identical;
The k that (3-3) step (3-1) is produced 2The k that row and step (3-2) produce 1The row amalgamation forms the motherboard Matrix C together;
(4), according to the motherboard Matrix C of structure, use the submatrix H corresponding with each nonzero element in the motherboard Matrix C ijSubstitute the nonzero element in the mother matrix Matrix C, use the neutral element in full null matrix replacement mother matrix Matrix C, obtain
Figure FDA00003150878200021
In conjunction with
Figure FDA00003150878200022
Obtain the check matrix of first kind LDPC code word
Figure FDA00003150878200023
The submatrix H that wherein nonzero element is corresponding with it i,jCorresponding relation as follows: the value of nonzero element is submatrix H i,jThe first row in the row mark of 1 position.
2. the building method of LDPC code according to claim 1, is characterized in that, also constructs the step of the method for the Equations of The Second Kind LDPC code that is associated with described first kind LDPC code after completing steps (4):
(5) to H 1The row of matrix sorts in the following order:
1,P+1,...,(m-1)P+1,2,P+2,...,(m-1)P+2,P,2P,...,mP;
After being resequenced
Figure FDA00003150878200024
Submatrix in formula Size is mP * kP,
Figure FDA00003150878200026
Size is mP * mP, wherein k=n-m;
Then with submatrix
Figure FDA00003150878200027
Row arrange in the following order,
1,P+1,...,(m-1)P+1,2,P+2,...,(m-1)P+2,P,2P,...,mP,
Obtain the sparse check matrix H of Equations of The Second Kind LDPC code 2
3. the building method of LDPC code according to claim 1, is characterized in that, the submatrix of step (4) structure Meet following restrictive condition:
(a) the heavy w of row rowIdentical, span is [3,40];
(b) value of column weight has at most two, and wherein less one is fixed value 3, and shared columns is designated as k 1P, another one is designated as w col, shared columns is designated as k 2P, wherein k 1+ k 2=k;
(c) value of column weight is according to arranging from left to right from big to small, corresponding to information bit from the highest significant bit to minimum effective bit;
(d) with
Figure FDA00003150878200032
The check matrix H that forms 1Ring length is not 4 ring.
4. the building method of LDPC code according to claim 3, is characterized in that, the described search parameter combination of step (2) (w row, w col, k 2), detailed process is:
Max (3,3k/m)≤w row≤ 40 and 3≤w colSearch in≤m scope, search and meet k 2=(mw row-3k)/(w col-3), and k 2Combination (w for nonnegative integer row, w col, k 2) be rational combination.
5. the building method of LDPC code according to claim 1, it is characterized in that, completing steps (4) is also constructed the identical but process of the LDPC code check matrix that code length is different of the code check of the first kind LDPC code that obtains from step (4) afterwards: use the matrix of size as P' * P'
Figure FDA00003150878200033
Nonzero element in the mother matrix Matrix C that replacement step (3) obtains, wherein P'〉P, use full null matrix replacement wherein the neutral element of size as P' * P', obtain matrix
Figure FDA00003150878200034
Associate(d) matrix again
Figure FDA00003150878200035
Obtain sparse check matrix H 1 &prime; &prime; = [ H S 1 &prime; &prime; | H p 1 &prime; &prime; ] .
CN2011103414024A 2011-11-02 2011-11-02 LDPC code constitution method Active CN102386932B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2011103414024A CN102386932B (en) 2011-11-02 2011-11-02 LDPC code constitution method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2011103414024A CN102386932B (en) 2011-11-02 2011-11-02 LDPC code constitution method

Publications (2)

Publication Number Publication Date
CN102386932A CN102386932A (en) 2012-03-21
CN102386932B true CN102386932B (en) 2013-11-13

Family

ID=45825951

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2011103414024A Active CN102386932B (en) 2011-11-02 2011-11-02 LDPC code constitution method

Country Status (1)

Country Link
CN (1) CN102386932B (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116683917A (en) 2016-09-30 2023-09-01 中兴通讯股份有限公司 Quasi-cyclic LDPC (low density parity check) coding and decoding method and device and LDPC coder and decoder
CN112821895B (en) * 2021-04-16 2021-07-09 成都戎星科技有限公司 Code identification method for realizing high error rate of signal
CN117040543B (en) * 2023-10-09 2024-02-20 苏州元脑智能科技有限公司 Error correction coding check matrix generation method, device and storage medium

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101047387A (en) * 2007-03-23 2007-10-03 北京大学 Construction method of multi-code rate compatible LDPC code and its decoder
CN101141133A (en) * 2007-10-23 2008-03-12 北京邮电大学 Method of encoding structured low density check code

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101047387A (en) * 2007-03-23 2007-10-03 北京大学 Construction method of multi-code rate compatible LDPC code and its decoder
CN101141133A (en) * 2007-10-23 2008-03-12 北京邮电大学 Method of encoding structured low density check code

Also Published As

Publication number Publication date
CN102386932A (en) 2012-03-21

Similar Documents

Publication Publication Date Title
US10536169B2 (en) Encoder and decoder for LDPC code
CN100596029C (en) Method of constructing check matrix for LDPC code, and encoding and decoding device of using the method
CN101741396B (en) Method and device for coding or decoding low-density parity-check (LDPC) codes with variable code length, coder and decoder
KR102014905B1 (en) Transmitting apparatus and interleaving method thereof
CN104868925B (en) Coding method, interpretation method, code device and the code translator of structured LDPC code
CN101162907B (en) Method and device for constructing low-density parity code check matrix
KR101986778B1 (en) Transmitting apparatus and interleaving method thereof
CN102057578B (en) Turbo ldpc decoding
CN101164241B (en) Encoding apparatus and encoding method
US7451374B2 (en) Apparatus and method for channel coding in mobile communication system
CN101567697B (en) Coder and method for coding rate-compatible low-density parity-check codes
CN104917536B (en) A kind of method and device for supporting Low Bit-rate Coding
CN102468855A (en) Apparatus and method for correcting at least one bit error within a coded bit sequence
CN103053116A (en) Encoding method and apparatus for low density parity check code
KR100975695B1 (en) Apparatus and method for receiving signal in a communication system
US8145971B2 (en) Data processing systems and methods for processing digital data with low density parity check matrix
CN102386932B (en) LDPC code constitution method
CN101764620B (en) Apparatus and method for decoding using channel code
CN101800627B (en) Hardware implementation of multiple-code-rate-compatible high-speed low-density parity-check code encoder
US20080320374A1 (en) Method and apparatus for decoding a ldpc code
CN102088294A (en) QC-LDPC (quasi-cyclic low-density parity-check codes) coder and coding method
KR101065693B1 (en) Method of encoding or decoding using LDPC code and method of generating LDPC code
CN102037651A (en) Decoding device, data storage device, data communication system, and decoding method
CN102412844A (en) Decoding method and decoding device of IRA (irregular repeat-accumulate) series LDPC (low density parity check) codes
CN1805291B (en) Parallel low intensity parity code encoding method and encoding apparatus

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant