CN102314404A - I2C equipment communication circuit - Google Patents
I2C equipment communication circuit Download PDFInfo
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- CN102314404A CN102314404A CN2010102153111A CN201010215311A CN102314404A CN 102314404 A CN102314404 A CN 102314404A CN 2010102153111 A CN2010102153111 A CN 2010102153111A CN 201010215311 A CN201010215311 A CN 201010215311A CN 102314404 A CN102314404 A CN 102314404A
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Abstract
The invention discloses an I2C equipment communication circuit, which comprises a switch circuit, a first group of secondary control equipment and a second group of secondary control equipment, wherein the first group of secondary control equipment and the second group of secondary control equipment both comprise a plurality of pieces of secondary control equipment; each piece of secondary control equipment comprises a data signal pin and a clock signal pin connecting switching circuit; main control equipment comprises a data signal pin, a clock signal pin and a general purpose input/output (GPIO) pin, which are all connected with a switch circuit. The GPIO pin of the main control equipment outputs a level signal to selectively control the connection or disconnection of the switch circuit, so that the first group of secondary control equipment and the second group of secondary control equipment are controlled to receive a command signal output by the main control equipment through an I2C BUS, address information in the received command signal is compared with addresses of the first group of secondary control equipment and the second group of secondary control equipment, and if the address in the command signal received by the secondary control equipment is the same as the addresses of the first group of secondary control equipment and the second group of secondary control equipment, the secondary control equipment communicates with the main control equipment.
Description
Technical field
The present invention relates to a kind of I2C (Inter-Integrated Circuit) devices communicating circuit.
Background technology
The I2C bus is a kind of twin wire universal serial bus (comprising clock cable and data signal line) by the exploitation of PHILIPS company, is used to connect microcontroller and peripherals thereof.The I2C bus resulted from the eighties, was initially the audio and video equipment exploitation, nowadays mainly in server admin, used, comprising the communication of single component state.
Please refer to Fig. 1, when main control equipment 100 need be through the I2C bus with when control equipment 200 communicates, general main control equipment 100 with connected mode from control equipment 200 is: said main control equipment 100 has clock signal port SCL and data-signal port SDA.Wherein, The data-signal port SDA of said main control equipment 100 links to each other with said data-signal port SDA from control equipment 200; The clock signal port SCL of said main control equipment 100 links to each other with said clock signal port SCL from control equipment 200; Said main control equipment 100 with communicate from control equipment 200 need for be connected on the I2C bus from addresses that control equipment 200 is set separately; And the address from control equipment 200 that is connected on the I2C bus is provided with through pin P1 and P2, as said address from control equipment 200 is set reaches " 11 " for " 00 ", " 01 ", " 10 ".Therefore main control equipment 100 can only communicate from control equipment 200 with 4 at most through an I2C bus; Yet it is a plurality of during from control equipment 200 when need using; Will cause and saidly repeat from the control device address, said main control equipment can't be discerned and control from the problem of control equipment.
Summary of the invention
In view of foregoing, be necessary to provide a kind of I2C devices communicating circuit of extendible I2C bus, to solve the not enough problem of I2C bus usage quantity.
A kind of I2C devices communicating circuit comprises:
One on-off circuit;
First and second group is from control equipment; First and second group includes several from control equipment from control equipment; Each comprises a data signal pin and a clock signal pins from control equipment, and each data signal pin and clock signal pins from control equipment connect said on-off circuit; And
One main control equipment; Comprise a data signal pin, a clock signal pins and a GPIO pin; The data signal pin of said main control equipment, clock signal pin and GPIO pin all connect said on-off circuit; The GPIO pin of said main control equipment is exported a level signal and is optionally controlled said on-off circuit conducting or end; Thereby control in said first and second group and receive the command signal that said main control equipment is exported through the I2C bus from control equipment; And address information in the command signal that receives and oneself address compared, if said address from the command signal that control equipment receives is identical with the address of oneself, then saidly communicate from control equipment and said main control equipment.
Compare prior art; Said main control equipment is exported the control end that a level signal is given said first and second switch through said GPIO pin; So that said first and second switch conduction or end, said main control equipment is corresponding to be communicated from control equipment with one thereby make.Said I2C telecommunication circuit method is simple, cost is low.
Description of drawings
Combine embodiment that the present invention is described in further detail with reference to the accompanying drawings:
Fig. 1 is existing I2C devices communicating schematic diagram.
Fig. 2 is the schematic diagram of the preferred embodiments of I2C devices communicating circuit of the present invention.
The main element symbol description
From control equipment 200,20
K switch 1, K2
Phase inverter U1
On-off circuit 30
Embodiment
Please refer to Fig. 2, the preferred embodiments of I2C devices communicating circuit of the present invention comprises a main control equipment 10, an on-off circuit 30 and some from control equipment 20.Said on-off circuit 30 comprises K switch 1 and a K2 and a phase inverter U1.Here be that example is explained with eight from control equipment 20, wherein, four first group connects said K switch 1 from control equipment 20, and other four second group connects said K switch 2 from control equipment 20.
Said main control equipment 10 comprises a data signal pin SDA, a clock signal pins SCL and a GPIO (General purpose input/output Port, universal input and output port) pin.Said main control equipment 100 can be CPU, microcontroller or PIC (PeripheralInterface Controller, peripheral controls).Each comprises a data signal pin SDA, a clock signal pins SCL and two-address setting pin P1 and P2 from control equipment 20.Said K switch 1 and K2 include four contact A 1, A2, B1, B2 and a control end EN, and wherein, said contact A 1 is corresponding with A2, and said contact B1 is corresponding with B2.
Each data signal pin SDA from control equipment 20 connects the contact A 2 of said K switch 1 in said first group; The data signal pin SDA of said main control equipment 10 connects the contact A 1 of said K switch 1; Each connects the contact B2 of said K switch 1 in said first group from the clock signal pin SCL of control equipment 20; The clock signal pin SCL of said main control equipment 10 connects the contact B1 of said K switch 1; Each data signal pin SDA from control equipment 20 connects the contact A 2 of said K switch 2 in said second group; The data signal pin SDA of said main control equipment 10 connects the contact A 1 of said K switch 2, and each connects the contact B2 of said K switch 2 from the clock signal pin SCL of control equipment 20 in said second group, and the clock signal pin SCL of said main control equipment 10 connects the contact B1 of said K switch 2; The GPIO pin of said main control equipment 10 connects the control end EN of said K switch 1 and the input end of said phase inverter U1, and the output terminal of said phase inverter U1 connects the control end EN of said K switch 2.Said K switch 1 and K2 also can be other switches that comprise a control end.
In this embodiment; Utilize a GPIO pin of said main control equipment 10; Can the I2C bus be extended for two groups; And then can connect eight from control equipment 20; The present invention is at said main control equipment 10 and said from having designed said K switch 1, K2 and phase inverter U1 between the control equipment 20, and the GPIO pin output high-low level signal of said main control equipment 10 is given the control end EN of said K switch 1, K2, so that the contact A 1 of said K switch 1, K2 is connected with A2 or disconnection and contact B1 are connected with B2 or break off; The data signal pin SDA of said main control equipment 10 and clock signal pins SCL are transferred to said on the data signal pin SDA and clock signal pins SCL of control equipment 20 through said K switch 1 and K2 correspondence, so that saidly communicate from control equipment 20 and said main control equipment 10.In other embodiments, through utilizing other GPIO pins of said main control equipment 10, can increase the quantity that said main control equipment 10 connects from control equipment 20.
During work, be that each sets a unique address from control equipment 200 at first through each address setting pin P1 and P2 from control equipment 200.When the GPIO of said main control equipment 10 pin is exported a high level signal; The control end EN of said K switch 1 receives said high level signal so that the contact A 1 of said K switch 1 is connected with A2 and contact B1 is connected with B2; Receive the command signal that said main control equipment 10 is exported from control equipment 20 through the I2C bus in said first group; And address information in the command signal that receives and oneself address compared; If a address from the command signal that control equipment 20 receives is identical with the address of oneself, then saidly communicate from control equipment 20 and said main control equipment 10, other haves no right to communicate with said main control equipment 10 from 20 of control equipment.Other is identical with above-mentioned principle of work with the communication between the main control equipment 10 from control equipment 20, repeats no more.
When the GPIO of said main control equipment 10 pin is exported a low level signal; The control end EN of said K switch 1 receives said low level signal so that the contact A 1 of said K switch 1 is broken off with A2 and said contact B1 and B2 disconnection; The low level signal of said main control equipment 10 outputs is imported the input end of said phase inverter U1; The output terminal of said phase inverter U1 is exported the control end EN that a high level signal is given said K switch 2; The control end EN of said K switch 2 receives said high level signal so that the contact A 1 of said K switch 2 is connected with A2 and contact B1 is connected with B2; Receive the command signal of said main control equipment 10 outputs from control equipment 20 through the I2C bus in said second group, and the address of the address information in the command signal that receives with oneself compared, if a address from the command signal that control equipment 20 receives is identical with the address of oneself; Then saidly communicate from control equipment 20 and said main control equipment 10, other haves no right to communicate with said main control equipment 10 from 20 of control equipment.Other is identical with above-mentioned principle of work with the communication between the main control equipment 10 from control equipment 20, repeats no more.
Said main control equipment 10 is exported the control end EN that a level signal is given said K switch 1, K2 through said GPIO pin; So that the contact A 1 of said K switch 1, K2 is connected with A2 or disconnection and contact B1 are connected with B2 or break off, said main control equipment 10 is corresponding to be communicated from control equipment 20 with one thereby make.Said I2C telecommunication circuit method is simple, cost is low.
Claims (6)
1. I2C devices communicating circuit comprises:
One on-off circuit;
First and second group is from control equipment; First and second group includes several from control equipment from control equipment; Each comprises a data signal pin and a clock signal pins from control equipment, and each data signal pin and clock signal pins from control equipment connect said on-off circuit; And
One main control equipment; Comprise a data signal pin, a clock signal pins and a GPIO pin; The data signal pin of said main control equipment, clock signal pin and GPIO pin all connect said on-off circuit; The GPIO pin of said main control equipment is exported a level signal and is optionally controlled said on-off circuit conducting or end; Thereby control in said first and second group and receive the command signal that said main control equipment is exported through the I2C bus from control equipment; And address information in the command signal that receives and oneself address compared, if said address from the command signal that control equipment receives is identical with the address of oneself, then saidly communicate from control equipment and said main control equipment.
2. I2C devices communicating circuit as claimed in claim 1; It is characterized in that: said on-off circuit comprises a phase inverter, first and second switch; Said first and second switch includes a control end; Each is from the data signal pin of control equipment and the clock signal pins connects said main control equipment through said first switch data signal pin and clock signal pins in said first group; Each is from the data signal pin of control equipment and the clock signal pins connects said main control equipment through said second switch data signal pin and clock signal pins in said second group; The GPIO pin of said main control equipment connects the control end of said first switch and the input end of said phase inverter, and the output terminal of said phase inverter connects the control end of said second switch.
3. I2C devices communicating circuit as claimed in claim 2; It is characterized in that: when the GPIO of said main control equipment pin is exported a high level signal; The control end of said first switch receives said high level signal and conducting; The high level signal of said main control equipment output is imported the input end of said phase inverter; The output terminal of said phase inverter is exported a low level signal, and the control end of said second switch receives said low level signal and ends, and receives the command signal of said main control equipment output in said first group through the I2C bus from control equipment; And address information in the command signal that receives and oneself address compared; If said address from the command signal that control equipment receives is identical with the address of oneself, then saidly communicate, when the GPIO of said main control equipment pin is exported a low level signal from control equipment and said main control equipment; The control end of said first switch receives said low level signal and ends; The low level signal of said main control equipment output is imported the input end of said phase inverter, and the output terminal of said phase inverter is exported a high level signal, and the control end of said second switch receives said high level signal and conducting; Receive the command signal that said main control equipment is exported from control equipment through the I2C bus in said second group; And address information in the command signal that receives and oneself address compared, if said address from the command signal that control equipment receives is identical with the address of oneself, then saidly communicate from control equipment and said main control equipment.
4. I2C devices communicating circuit as claimed in claim 2; It is characterized in that: first and second switch all also comprises first to fourth contact; Said first and second contact is corresponding; The said the 3rd is corresponding with the 4th contact, connects second contact of said first switch in said first group from the data signal pin of control equipment, and the data signal pin of said main control equipment connects first contact of said first switch; Clock signal pin from control equipment in said first group connects the 4th contact of said first switch; The clock signal pin of said main control equipment connects the 3rd contact of said first switch, connects second contact of said second switch in said second group from the data signal pin of control equipment, and the data signal pin of said main control equipment connects first contact of said second switch; Each clock signal pin from control equipment connects the 4th contact of said second switch in said second group; The clock signal pin of said main control equipment connects the 3rd contact of said second switch, and when said first and second switch conduction, said first and second contact connects and the 3rd is connected with the 4th contact; When said first and second switch ended, said first and second contact was broken off and the 3rd and the 4th contact is broken off.
5. I2C devices communicating circuit as claimed in claim 1 is characterized in that: each includes the two-address from control equipment and sets pin, is used to be provided with said address from control equipment.
6. I2C devices communicating circuit as claimed in claim 1 is characterized in that: said main control equipment is CPU, microcontroller or PIC.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010102153111A CN102314404A (en) | 2010-07-01 | 2010-07-01 | I2C equipment communication circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010102153111A CN102314404A (en) | 2010-07-01 | 2010-07-01 | I2C equipment communication circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN102314404A true CN102314404A (en) | 2012-01-11 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2010102153111A Pending CN102314404A (en) | 2010-07-01 | 2010-07-01 | I2C equipment communication circuit |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103399837A (en) * | 2013-08-13 | 2013-11-20 | 杭州威力克通信系统有限公司 | Communication device applied to principal and subordinate equipment |
| CN105530153A (en) * | 2015-12-11 | 2016-04-27 | 上海新时达电气股份有限公司 | Slave device communication method in network, communication network, master device and slave device |
| CN106485959A (en) * | 2015-08-25 | 2017-03-08 | 青岛歌尔声学科技有限公司 | A kind of extension picture |
| CN110471490A (en) * | 2019-07-12 | 2019-11-19 | 晶晨半导体(上海)股份有限公司 | A kind of no source crystal oscillator common circuit |
| CN112988635A (en) * | 2021-03-10 | 2021-06-18 | 英业达科技有限公司 | Communication system of mainboard and backplate and server that is suitable for thereof |
-
2010
- 2010-07-01 CN CN2010102153111A patent/CN102314404A/en active Pending
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103399837A (en) * | 2013-08-13 | 2013-11-20 | 杭州威力克通信系统有限公司 | Communication device applied to principal and subordinate equipment |
| CN103399837B (en) * | 2013-08-13 | 2017-02-08 | 杭州威力克通信系统有限公司 | Communication device applied to principal and subordinate equipment |
| CN106485959A (en) * | 2015-08-25 | 2017-03-08 | 青岛歌尔声学科技有限公司 | A kind of extension picture |
| CN105530153A (en) * | 2015-12-11 | 2016-04-27 | 上海新时达电气股份有限公司 | Slave device communication method in network, communication network, master device and slave device |
| CN105530153B (en) * | 2015-12-11 | 2019-02-05 | 上海新时达电气股份有限公司 | Slave equipment communication means, communication network, main equipment in network and from equipment |
| CN110471490A (en) * | 2019-07-12 | 2019-11-19 | 晶晨半导体(上海)股份有限公司 | A kind of no source crystal oscillator common circuit |
| CN110471490B (en) * | 2019-07-12 | 2023-07-28 | 晶晨半导体(上海)股份有限公司 | Passive crystal oscillator sharing circuit |
| CN112988635A (en) * | 2021-03-10 | 2021-06-18 | 英业达科技有限公司 | Communication system of mainboard and backplate and server that is suitable for thereof |
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Application publication date: 20120111 |