CN102279802A - Method and device for increasing reading operation efficiency of synchronous dynamic random storage controller - Google Patents
Method and device for increasing reading operation efficiency of synchronous dynamic random storage controller Download PDFInfo
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Abstract
The invention provides a method and device for increasing the reading operation efficiency of a synchronous dynamic random storage controller. The method comprises the following steps: the synchronous dynamic random storage controller receives a writing operation request of a user and copies writing operation data to one or more mirror image spaces of a synchronous dynamic random storage, wherein the mirror image spaces are address spaces which are positioned in the synchronous dynamic random storage and are positioned in different storage arrays with a write-in address in the writing operation request; the synchronous dynamic random storage controller processes a plurality of reading operation requests in parallel, wherein the mirror image spaces for reading out data selected by each reading operation request are positioned in different storage arrays in the synchronous dynamic random storage. Compared with the prior art, the invention has the advantages that: the user reading operation request processing speed of the synchronous dynamic random storage controller can be increased, the delay processing time of the reading operation request is reduced greatly, and the reading operation sequence and fixed time delay of reading operation are ensured.
Description
Technical field
The present invention relates to the data read operation technical field, relate in particular to the method and apparatus of the read operation efficient that improves the synchronous dynamic random memory controller.
Background technology
Along with the development of communication network multimedia service, network also increases fast to the demand of communication transmission bandwidth, along with the rapid increase of network data amount, the treatment technology of mass data is become the bottleneck of network development.In processing, the visit of external memory storage is become the bottleneck of processing data packets speed again to the mass data bag.Improve the efficient of external memory access effectively, become the key of external memory access design of Controller.The method of using in the prior art is to adopt synchronous random access memory (SynchronousRandom Access Memory, abbreviation SRAM) device of type is done, the device of this type can satisfy the demand to memory access bandwidth, is used widely but the high characteristics of the little cost of capacity have influenced it.And high capacity cheaply synchronous DRAM (Synchronous Dynamic RandomAccess Memory, be called for short SDRAM) make traditional controller very low but because the restriction of device itself at the access efficiency that some gets under the situation of access mode.Solution of the prior art generally improves access efficiency by the address space of efficient scheduling visit; but this scheduling mode regular meeting causes that the order that order that the user sends visit and controller carry out is different; out of order situation occurs, cause request of access to be delayed.These defectives also can cause the complicacy of dispatching algorithm design and the instability of efficient, influence the stability of entire system.
Summary of the invention
The technical problem to be solved in the present invention provides a kind of method and apparatus that improves the read operation efficient of synchronous dynamic random memory controller, improves the speed of read operation, reduces the time that controller is handled the delay of read operation request.
In order to solve the problems of the technologies described above, the invention provides a kind of method that improves the read operation efficient of synchronous dynamic random memory controller, comprise: after the synchronous dynamic random memory controller is received user's write operation requests, the write operation data are copied to one or more mirror images space in the synchronous DRAM, described mirror image space be in synchronous DRAM with described write operation requests in write the address space that the address is positioned at different storage arrays; The a plurality of read operation requests of described synchronous dynamic random memory controller parallel processing simultaneously, the mirror image space of selecting for each read operation request that is used for sense data is positioned at different storage arrays at synchronous DRAM.
Further, said method can also have following characteristics:
When described synchronous dynamic random memory controller carries out data image, be arranged in the synchronous DRAM of different sheets at the determined different mirror images of same write operation data space, perhaps be arranged in different storage arrays with a slice synchronous DRAM.
In order to solve the problems of the technologies described above, the present invention also provides the device that improves the read operation efficient of synchronous dynamic random memory controller, comprise continuous synchronous dynamic random memory controller and synchronous DRAM, described synchronous dynamic random memory controller, after being used to receive user's write operation requests, selection is used to back up one or more mirror images space of write operation data, described mirror image space be in synchronous DRAM with described write operation requests in write the address space that the address is positioned at different storage arrays; Also be used for a plurality of read operation requests of parallel processing, the mirror image space of selecting for each read operation request that is used for sense data is positioned at different storage arrays at synchronous DRAM; Described synchronous DRAM is used for when handling write operation requests, the write operation data is backuped in each mirror image space of synchronous dynamic random memory controller indication; Also be used for when handling the read operation request sense data from the mirror image space of described synchronous DRAM indication.
Further, said apparatus can also have following characteristics:
Described synchronous dynamic random memory controller comprises continuous operation generator module and mirror image operation processing module; Described operation generator module, the operation requests that is used for receiving are sent to described mirror image operation processing module and described synchronous DRAM; Described mirror image operation processing module, after being used for receiving write operation requests from described operation generator module, determine a plurality of mirror images space and with the address notification in each mirror image space to described synchronous DRAM; After also being used to receive the read operation request, in synchronous DRAM, select to be used for the mirror image space of sense data in the different storage arrays for each read operation request, and with the address notification in the mirror image space selected to described synchronous DRAM.
Further, said apparatus can also have following characteristics:
Described mirror image operation processing module comprises operation requests type judging unit, mirror image space address scheduling unit, mirror image space address storage unit; Described operation requests type judging unit be used to analyze the type of the request message of knowing from described operation generator module, and notice is to described mirror image space address scheduling unit; Described mirror image space address scheduling unit is used for when receiving the read operation request, determine a plurality of mirror images space and with the address notification in mirror image space to described mirror image space address storage unit; Be used for when receiving the read operation request, from described mirror image space address storage unit, select the mirror image space; Described mirror image space address storage unit is used to store the address in each mirror image space.
Further, said apparatus can also have following characteristics:
Described mirror image space address scheduling unit also is used for determining that according to the execution frequency needs of read operation the write operation implementation carries out the number in the mirror image space of mirror image operation.
Further, said apparatus can also have following characteristics:
Described mirror image space address scheduling unit when also being used for determining a plurality of mirror images space, makes the different mirror images space of determining be arranged in the synchronous DRAM of different sheets, perhaps is arranged in the different storage arrays with a slice synchronous DRAM.
In order to solve the problems of the technologies described above, the present invention also provides the synchronous dynamic random memory controller that improves read operation efficient, described synchronous dynamic random memory controller, after being used to receive user's write operation requests, selection is used to back up one or more mirror images space of write operation data, described mirror image space be in synchronous DRAM with described write operation requests in write the address space that the address is positioned at different storage arrays; Also be used for a plurality of read operation requests of parallel processing, the mirror image space of selecting for each read operation request that is used for sense data is positioned at different storage arrays at synchronous DRAM.
Further, above-mentioned synchronous dynamic random memory controller can also have following characteristics:
Described synchronous dynamic random memory controller comprises continuous operation generator module and mirror image operation processing module; Described operation generator module, the operation requests that is used for receiving are sent to described mirror image operation processing module and described synchronous DRAM; Described mirror image operation processing module, after being used for receiving write operation requests from described operation generator module, determine a plurality of mirror images space and with the address notification in each mirror image space to described synchronous DRAM; After also being used to receive the read operation request, in synchronous DRAM, select to be used for the mirror image space of sense data in the different storage arrays for each read operation request, and with the address notification in the mirror image space selected to described synchronous DRAM.
Further, above-mentioned synchronous dynamic random memory controller can also have following characteristics:
Described mirror image operation processing module comprises operation requests type judging unit, mirror image space address scheduling unit, mirror image space address storage unit; Described operation requests type judging unit be used to analyze the type of the request message of knowing from described operation generator module, and notice is to described mirror image space address scheduling unit; Described mirror image space address scheduling unit is used for when receiving the read operation request, determine a plurality of mirror images space and with the address notification in mirror image space to described mirror image space address storage unit; Be used for when receiving the read operation request, from described mirror image space address storage unit, select the mirror image space; Described mirror image space address storage unit is used to store the address in each mirror image space.
The present invention compared with prior art can improve synchronous dynamic random memory controller process user read operation rate request, significantly reduces the delay processing time to the read operation request, guarantees the order of read operation and the constant time lag of read operation.And among the present invention, support in scope and the storage space utilization factor support scope, when clearly controller read operation efficient being required, can increase the access efficiency of controller read operation by the number that increases the mirror image space in the performance of hardware device.
Description of drawings
Fig. 1 is the composition structural drawing of the device of the read operation efficient of raising synchronous dynamic random memory controller among the embodiment;
Fig. 2 is the composition structural drawing of synchronous dynamic random memory controller among the embodiment;
The composition structural drawing of mirror image operation processing module among the embodiment among Fig. 3.
Embodiment
As shown in Figure 1, improve the device of the read operation efficient of synchronous dynamic random memory controller, comprise continuous synchronous dynamic random memory controller and synchronous DRAM.This synchronous DRAM can be the SDRAM that uses always, also can be Double Data Rate synchronous DRAM (DoubleData Rate Synchronous Dynamic Random Access Memory, be called for short DDRSDRAM), DDR3 SDRAM for example.
The synchronous dynamic random memory controller, after being used to receive user's write operation requests, selection is used to back up one or more mirror images space of write operation data, described mirror image space be in synchronous DRAM with write operation requests in write the address space that the address is positioned at different storage arrays; Also be used for a plurality of read operation requests of parallel processing, the mirror image space of selecting for each read operation request that is used for sense data is positioned at different storage arrays at synchronous DRAM.
The different mirror images space that same write operation data copy to is arranged in the synchronous DRAM of different sheets, perhaps is arranged in the different storage arrays with a slice synchronous DRAM.
When synchronous DRAM is used to handle write operation requests, the write operation data are backuped in each mirror image space of synchronous dynamic random memory controller indication; Also be used for when handling the read operation request sense data from the mirror image space of synchronous DRAM indication.
As shown in Figure 2, the synchronous dynamic random memory controller comprises continuous operation generator module 11 and mirror image operation processing module 12, and these two modules link to each other by the operation requests type bus.This controller also comprises the physical interface module 13 that all links to each other with operation generator module and mirror image operation processing module, this physical interface module is used for finishing information interaction and communicating by letter with synchronous DRAM, and this physical interface module can be used the common interfaces device that can be communicated with synchronous dynamic random memory controller and synchronous DRAM in the prior art.
The operation requests that operation generator module 11 is used for receiving is sent to mirror image operation processing module 12 and synchronous DRAM, comprise the address that the user need visit in this operation requests, be that this request is when the write operation requests, the address that the user need visit is the destination address that will write data, when this request was the read operation request, the address that the user need visit was a destination address of wanting sense data.
Concrete, operation generator module 11 comprises read-write operation analytic unit 111, write operation generator unit 112, read operation generator unit 113.
Read-write operation analytic unit 111 is used for that request message is carried out type to be judged, judges when this request message is write operation requests after receiving request message, and this write operation requests is sent to write operation generator module 112; Judge when this request message is the read operation request, this read operation request is sent to read operation generator module 113.After write operation generator unit 112 is used to receive write operation requests, this write operation requests is sent to mirror image operation processing module and synchronous DRAM.After read operation generator unit 113 is used to receive the read operation request, this read operation request is sent to mirror image operation processing module and synchronous DRAM.
Read-write operation analytic unit 111 can also link to each other with a read-write formation cache module outside the operation generator module 11 by operation requests and answer bus, and these two modules are communicated by letter with the handshake mechanism of replying by asking.The solicited message that read-write formation cache module is used for receiving is carried out the order buffer memory, and when having request message in buffer queue, successively request message is sent to read-write operation analytic unit 111.
Mirror image operation processing module 12 is used for from operation after generator module receives write operation requests, determine a plurality of mirror images space and with the address notification in each mirror image space to synchronous DRAM; After also being used to receive the read operation request, in synchronous DRAM, select to be used for the mirror image space of sense data in the different storage arrays for each read operation request, and with the address notification in the mirror image space selected to synchronous DRAM.
Owing to introduced the technical characterictic that write data is carried out mirror image operation among the present invention, mirror image operation processing module 12 does not need buffer memory and operation dispatching are carried out in the read operation request, directly the read operation request that receives is carried out successively according to the order that receives, make each read operation processing of request institute appearance consuming time together, and read operation processing of request efficient is not subjected to the influence of external interface bus bandwidth.
Concrete, as shown in Figure 3, the mirror image operation processing module comprises operation requests type judging unit 301, mirror image space address scheduling unit 302, mirror image space address storage unit 303.
Operation requests type judging unit 301 is used to analyze the type of the request message of knowing from the operation generator module, and notifies to mirror image space address scheduling unit 302.
Mirror image space address scheduling unit 302 is used for when receiving the read operation request, determine a plurality of mirror images space and with the address notification in mirror image space to mirror image space address storage unit 303, also be used for when receiving the read operation request, from mirror image space address storage unit 303, select the mirror image space.When mirror image space address scheduling unit 302 also is used for determining a plurality of mirror images space, make the different mirror images space of determining be arranged in the synchronous DRAM of different sheets, perhaps be arranged in different storage arrays with a slice synchronous DRAM.Mirror image space address scheduling unit 302 also is used for determining that according to the execution frequency needs of read operation the write operation implementation carries out the number in the mirror image space of mirror image operation.Generally speaking, determine the number in mirror image space after, do not change in the implementation in operation.
Mirror image space address storage unit 303 is used to store the address in each mirror image space.
The present invention also provides a kind of synchronous dynamic random memory controller that improves read operation efficient, and its function repeats no more with identical as what describe in the above-mentioned device herein.
In the prior art, in the reading of data, twice data read operation centre needs the delay of a period of time in the same storage array (Rank) of SDRAM.Among the present invention by carrying out the many places mirror image to writing in the behaviour request write data, make controller that a plurality of selections arranged when handling the read operation request, sense data in the address that is not limited to only in the read operation request, indicate, can be in a plurality of mirror images space of having backed up sense data, the a plurality of read operations of parallel processing are applicable to that typically the mirror image space of these a plurality of read operation correspondences is in the situation of different storage arrays.Controller can be placed on the read operation to same address in the different mirror image spaces and finish when handling the read operation request.Therefore when controller receives continuous read operation request, the address in the mirror image space that can send according to the mirror image operation processing module, these read operations are put in the different mirror image spaces finish, thereby improve the efficient of read operation effectively, significantly reduce the processing delay that the buffer memory of read operation request causes.
Corresponding to said apparatus, the method that improves the read operation efficient of synchronous dynamic random memory controller among the present invention comprises: after the synchronous dynamic random memory controller is received user's write operation requests, the write operation data are copied to one or more mirror images space in the synchronous DRAM, described mirror image space be in synchronous DRAM with described write operation requests in write the address space that the address is positioned at different storage arrays; The a plurality of read operation requests of synchronous dynamic random memory controller parallel processing simultaneously, the mirror image space of selecting for each read operation request that is used for sense data is positioned at different storage arrays at synchronous DRAM.
Wherein, when the synchronous dynamic random memory controller carries out data image, be arranged in the synchronous DRAM of different sheets at the determined different mirror images of same write operation data space, perhaps be arranged in different storage arrays with a slice synchronous DRAM.
The present invention with the data image in the storer in the different address spaces of DDR3 SDRAM, by being dispatched in different mirror image spaces, finishes read-write operation, realization is finished read operation redirect in different data images of address space, thereby minimum time-delay to the read operation of DDR3 SDRAM address space, guaranteed the succession of read operation and the stationarity of time-delay simultaneously, be implemented in the unit interval read operation frequency the maximum of DDR3SDRAM.The invention provides the implement device of this method simultaneously, can be widely used in field programmable gate array (Field-Programmable Gate Array, be called for short FPGA) and special IC (Application Specific Integrated Circuit, abbreviation ASIC) Logic Circuit Design in.
Certainly; the present invention also can have other various embodiments; under the situation that does not deviate from spirit of the present invention and essence thereof; those of ordinary skill in the art work as can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection domain of the appended claim of the present invention.
One of ordinary skill in the art will appreciate that all or part of step in the said method can instruct related hardware to finish by program, described program can be stored in the computer-readable recording medium, as ROM (read-only memory), disk or CD etc.Alternatively, all or part of step of the foregoing description also can use one or more integrated circuit to realize.Correspondingly, each the module/unit in the foregoing description can adopt the form of hardware to realize, also can adopt the form of software function module to realize.The present invention is not restricted to the combination of the hardware and software of any particular form.
Claims (10)
1. improve the method for the read operation efficient of synchronous dynamic random memory controller, it is characterized in that,
After the synchronous dynamic random memory controller is received user's write operation requests, the write operation data are copied to one or more mirror images space in the synchronous DRAM, described mirror image space be in synchronous DRAM with described write operation requests in write the address space that the address is positioned at different storage arrays;
The a plurality of read operation requests of described synchronous dynamic random memory controller parallel processing simultaneously, the mirror image space of selecting for each read operation request that is used for sense data is positioned at different storage arrays at synchronous DRAM.
2. the method for claim 1 is characterized in that,
When described synchronous dynamic random memory controller carries out data image, be arranged in the synchronous DRAM of different sheets at the determined different mirror images of same write operation data space, perhaps be arranged in different storage arrays with a slice synchronous DRAM.
3. improve the device of the read operation efficient of synchronous dynamic random memory controller, comprise continuous synchronous dynamic random memory controller and synchronous DRAM, it is characterized in that,
Described synchronous dynamic random memory controller, after being used to receive user's write operation requests, selection is used to back up one or more mirror images space of write operation data, described mirror image space be in synchronous DRAM with described write operation requests in write the address space that the address is positioned at different storage arrays; Also be used for a plurality of read operation requests of parallel processing, the mirror image space of selecting for each read operation request that is used for sense data is positioned at different storage arrays at synchronous DRAM;
Described synchronous DRAM is used for when handling write operation requests, the write operation data is backuped in each mirror image space of synchronous dynamic random memory controller indication; Also be used for when handling the read operation request sense data from the mirror image space of described synchronous DRAM indication.
4. device as claimed in claim 3 is characterized in that,
Described synchronous dynamic random memory controller comprises continuous operation generator module and mirror image operation processing module;
Described operation generator module, the operation requests that is used for receiving are sent to described mirror image operation processing module and described synchronous DRAM;
Described mirror image operation processing module, after being used for receiving write operation requests from described operation generator module, determine a plurality of mirror images space and with the address notification in each mirror image space to described synchronous DRAM; After also being used to receive the read operation request, in synchronous DRAM, select to be used for the mirror image space of sense data in the different storage arrays for each read operation request, and with the address notification in the mirror image space selected to described synchronous DRAM.
5. device as claimed in claim 4 is characterized in that,
Described mirror image operation processing module comprises operation requests type judging unit, mirror image space address scheduling unit, mirror image space address storage unit;
Described operation requests type judging unit be used to analyze the type of the request message of knowing from described operation generator module, and notice is to described mirror image space address scheduling unit;
Described mirror image space address scheduling unit is used for when receiving the read operation request, determine a plurality of mirror images space and with the address notification in mirror image space to described mirror image space address storage unit; Be used for when receiving the read operation request, from described mirror image space address storage unit, select the mirror image space;
Described mirror image space address storage unit is used to store the address in each mirror image space.
6. device as claimed in claim 5 is characterized in that,
Described mirror image space address scheduling unit also is used for determining that according to the execution frequency needs of read operation the write operation implementation carries out the number in the mirror image space of mirror image operation.
7. device as claimed in claim 5 is characterized in that,
Described mirror image space address scheduling unit when also being used for determining a plurality of mirror images space, makes the different mirror images space of determining be arranged in the synchronous DRAM of different sheets, perhaps is arranged in the different storage arrays with a slice synchronous DRAM.
8. improve the synchronous dynamic random memory controller of read operation efficient, it is characterized in that,
Described synchronous dynamic random memory controller, after being used to receive user's write operation requests, selection is used to back up one or more mirror images space of write operation data, described mirror image space be in synchronous DRAM with described write operation requests in write the address space that the address is positioned at different storage arrays; Also be used for a plurality of read operation requests of parallel processing, the mirror image space of selecting for each read operation request that is used for sense data is positioned at different storage arrays at synchronous DRAM.
9. synchronous dynamic random memory controller as claimed in claim 8 is characterized in that,
Described synchronous dynamic random memory controller comprises continuous operation generator module and mirror image operation processing module;
Described operation generator module, the operation requests that is used for receiving are sent to described mirror image operation processing module and described synchronous DRAM;
Described mirror image operation processing module, after being used for receiving write operation requests from described operation generator module, determine a plurality of mirror images space and with the address notification in each mirror image space to described synchronous DRAM; After also being used to receive the read operation request, in synchronous DRAM, select to be used for the mirror image space of sense data in the different storage arrays for each read operation request, and with the address notification in the mirror image space selected to described synchronous DRAM.
10. synchronous dynamic random memory controller as claimed in claim 9 is characterized in that,
Described mirror image operation processing module comprises operation requests type judging unit, mirror image space address scheduling unit, mirror image space address storage unit;
Described operation requests type judging unit be used to analyze the type of the request message of knowing from described operation generator module, and notice is to described mirror image space address scheduling unit;
Described mirror image space address scheduling unit is used for when receiving the read operation request, determine a plurality of mirror images space and with the address notification in mirror image space to described mirror image space address storage unit; Be used for when receiving the read operation request, from described mirror image space address storage unit, select the mirror image space;
Described mirror image space address storage unit is used to store the address in each mirror image space.
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| CN2010102076717A CN102279802A (en) | 2010-06-13 | 2010-06-13 | Method and device for increasing reading operation efficiency of synchronous dynamic random storage controller |
| PCT/CN2011/071568 WO2011157067A1 (en) | 2010-06-13 | 2011-03-07 | Method and apparatus for reading data with synchronous dynamic random access memory controller |
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| CN113190477A (en) * | 2021-04-19 | 2021-07-30 | 烽火通信科技股份有限公司 | Low-delay DDR control method and device suitable for table look-up application |
| CN116662019A (en) * | 2023-07-31 | 2023-08-29 | 苏州浪潮智能科技有限公司 | Request distribution method and device, storage medium and electronic device |
| CN116662019B (en) * | 2023-07-31 | 2023-11-03 | 苏州浪潮智能科技有限公司 | Request distribution method and device, storage medium and electronic device |
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| WO2011157067A1 (en) | 2011-12-22 |
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