CN102195489B - Current peak compression method for switching circuit - Google Patents

Abstract

The invention provides a current peak compression control method for a switching circuit. The control method comprises the following steps: monitoring whether the operation of the switching circuit enters a pulse skipping mode; step two: if the switching circuit enters a pulse skipping mode, entering action one; if the switching circuit does not enter the pulse skipping mode, entering action two; the first action is as follows: firstly, obtaining the equivalent frequency of a switching circuit; secondly, receiving the equivalent frequency to obtain a pulse processing signal which changes in a reverse direction with the equivalent frequency; obtaining a light-load peak current processing signal which changes in a reverse direction with the pulse processing signal, and controlling the peak current of the switch circuit, so that the equivalent frequency is kept at a set value and is out of an audio frequency range; step three, jumping to the step one; and the second action: and jumping to the first step. The peak current flowing through the main switching tube is changed according to the change of the load, so that the equivalent frequency is prevented from entering the audible frequency range of human ears.

Description

A kind of current peak compression for switching circuit

The application be that September 1, application number in 2009 are 200910306436.2 the applying date, the dividing an application of application for a patent for invention that denomination of invention is " current peak compression and adopt the control circuit of the method ".

Technical field

The present invention relates to switching circuit and control method thereof, more particularly, the present invention relates to the control method at the switching circuit of pulse-skip pattern lower compression current peak.

Background technology

Switching circuit is widely used in various occasions.Wherein multi-mode is controlled owing to can making circuit obtain high efficiency under various loads, is widely adopted at present.Conventionally, in multi-mode is controlled, wherein a kind of pattern is pulse-skip pattern, i.e. burst pattern.Yet when switching circuit is under burst pattern, equivalent frequency is very low, when equivalent frequency is during lower than 20kHz, entered the audiorange that people's ear can be heard, just produced noise.

Therefore be necessary to provide a kind of control circuit of improved switching circuit, while making it under burst pattern, it is too low that equivalent frequency is unlikely to, thereby eliminate noise.

Summary of the invention

Therefore the object of the present invention is to provide a kind of control circuit and method thereof of improved switching circuit.Switching circuit based on this control circuit and method, when it enters burst pattern, changes and flows through the peak current of main switch according to the variation of load, thereby avoid equivalent frequency to enter the audiorange that people's ear can be heard.

A current peak compression for switching circuit, comprises

Step 1: whether the operation of monitoring described switching circuit enters pulse-skip pattern;

Step 2: if described switching circuit enters pulse-skip pattern, enter action one; If described switching circuit does not enter pulse-skip pattern, enter action two;

Action one:

The first step, has the time of switching signal in the described switching circuit one-period of sampling and there is no time of switching signal, obtains the equivalent frequency of switching circuit;

Second step, receives described equivalent frequency by pulse processor, obtains becoming with described equivalent frequency the burst process signal of inverse change; By underloading peak current processor, receive described burst process signal, obtain becoming with described burst process signal the underloading peak current processing signals of inverse change, utilize described underloading peak current processing signals to control the peak current of described switching circuit, thereby make equivalent frequency remain on set point, and outside audiorange;

The 3rd step, skips to step 1;

Action two: skip to step 1.

The present invention adopts said structure and/or method, can be at switching circuit when it enters burst pattern, commutation circuit enters underloading processing procedure, changes and flows through the peak current of main switch, thereby avoid equivalent frequency to enter the audiorange that people's ear can be heard according to the variation of load.

Accompanying drawing explanation

Fig. 1 is according to a kind of switching circuit 100 of the present invention.

Fig. 2 is the control chip IC of switching circuit 100 shown in Fig. 1 ₁ physical circuit 110.

Fig. 3 oscillogram that to be the switching frequency of switching circuit 100 described in Fig. 1 and peak current change with the variation of feedback signal.

Fig. 4 is that switching circuit 100 is applied to main switch M under pulse-skip pattern ₁the switching signal waveform of control end.

Fig. 5 is the underloading peak current processor U of circuit 110 described in Fig. 2 ₄particular circuit configurations Figure 80.

Embodiment

As shown in Figure 1, be typical switching circuit 100.In the present embodiment, the topology of switching circuit 100 is flyback topology.Switching circuit 100 comprises a reception ac input signal V _iNrectifier bridge, an input capacitance C who is connected in parallel with described rectifier bridge _iN, a transformer T(those skilled in the art will appreciate that transformer T is for energy-storage travelling wave tube that can storage power), a control chip IC ₁, an armature winding T by transformer T ₀, secondary winding T ₁, diode D ₁, output capacitance C _oUTthe typical flyback topology forming, an auxiliary winding T by transformer T ₂, diode D ₂, capacitor C ₁, resistance R _cthe auxiliary power supply loop forming, one by photoelectrical coupler D ₀, resistance R _fB1, resistance R _fB2and Zener diode D ₃the feedback component forming, a sampling resistor R _san and capacitor C ₀.

The armature winding T of transformer T wherein ₀one end receive through rectifier bridge and input capacitance C _iNdirect current signal V after rectification _dC, its other end is connected to control chip IC ₁a pin D.The secondary winding T of transformer T ₁with diode D ₁be connected in series rear and output capacitance C _oUTbe connected in parallel, output capacitance C _oUTboth end voltage is the output voltage V of switching circuit 100 _oUT.Feedback component photoelectrical coupler D ₀, resistance R _fB1and Zener diode D ₃be connected in series successively rear and output capacitance C _oUTbe connected in parallel, thus feedback output voltage V _oUTto control chip IC ₁feedback pin FB.Due to photoelectrical coupler D ₀what feed back is current signal, so resistance R _fB2with photoelectrical coupler D ₀triode portion series connection, the current signal of flowing through on it is converted to corresponding voltage signal, i.e. switching circuit 100 output voltage V _oUTfeedback voltage V _fB.In the present embodiment, this feedback voltage V _fBit is the value of feedback of output signal.The auxiliary winding T of transformer T ₂with diode D ₂, resistance R _cbe connected in series rear and capacitor C ₁be connected in parallel, thereby when switching circuit 100 normal work, be provided for control chip IC ₁the auxiliary power supply voltage that in-line power source is required.

Figure 2 shows that according to control chip IC of the present invention ₁inside physical circuit Figure 110.As shown in Figure 2, circuit 110 comprises: main switch M ₁, be connected to control chip IC ₁pin D and pin S between, and then by the armature winding T of transformer T ₀receive input signal V with rectifier bridge _iN; Switching frequency control circuit 1, comprises by current source U _s, switch S ₁with pin C _texternal capacitor C ₀the sawtooth wave generating circuit forming, switching frequency control circuit 1 also comprises the first comparator U ₁with the switching frequency reference signal given circuit being formed by contact resistance R and Zener diode D4; Subtraction circuit 2, is connected to pin FB, in order to receiving key circuit output voltage V _oUTfeedback voltage V _fB, and by feedback voltage V _fBwith its inner setting value V _sUBsubtract each other, and obtain difference signal V _sUB-V _fB, can see difference signal V _sUB-V _fBequidirectional variation (the output voltage V of output with switching circuit 100 _oUTincrease difference signal V _sUB-V _fBalso increase; Otherwise, output voltage V _oUTreduce, difference signal V _sUB-V _fBalso reduce), so difference signal V _sUB-V _fBfeedback signal for switching circuit 100 output signals.In this embodiment, due to feedback voltage V _fBoutput voltage V with switching circuit 100 _oUTchanging inversely, in order to obtain and output voltage V _oUTthe feedback signal of equidirectional variation, at control chip IC ₁this subtraction circuit 2 is inside set, yet feedback circuit does some and adjusts, control chip IC if those skilled in the art will appreciate that ₁can not need subtraction circuit 2.

Circuit 110 also comprises peak current reference signal decision circuit 3, and an one input receives reference signal V _sense, its another input is connected to switchable status switch S ₂, and then by status switch S ₂receive difference signal V _sUB-V _fBor underloading peak current processing signals V _th, this is below having concrete elaboration, and its output signal is peak current reference signal V _ir, peak current reference signal decision circuit 3 is two signals of its input relatively, and wherein less signal is as a result of exported; Peak current comparator 4, an one input receives to characterize and flows through main switch electric current I _m1sampled signal, flow through main switch M ₁electric current I _m1flow through the outer sampling resistor R between pin S and ground that is connected on simultaneously _sthereby, be converted into corresponding voltage signal, i.e. sampled signal, its another input receives peak current reference signal V _ir, its output signal is peak current control signal; Light condition testing circuit, hysteresis comparator 5, and an one input receives underloading reference signal V _ref, another input receives difference signal V _sUB-V _fB, output light condition control signal; Pattern commutation circuit 6, comprises rest-set flip-flop U ₅with with door U ₀, rest-set flip-flop U wherein ₅set end S as its first input end, receiving key frequency control signal, rest-set flip-flop U ₅reset terminal R as its second input, receive peak current control signal, rest-set flip-flop U ₅output Q be connected to and door U ₀input and switch S ₁control end, with door U ₀another input as the 3rd input of pattern commutation circuit 6, receive light condition control signal, with door U ₀output as the output of this pattern commutation circuit 6, output mode switching signal; Drive circuit 7, receiving mode switching signal, and output switching signal Pulse is to main switch M ₁control end, and then control main switch M ₁conducting and disconnection.Wherein peak current reference signal decision circuit 3 has following characteristic: it receives two input signals, and judges the size of two signals, the peak current reference signal V using less signal as its output _ir.The stagnant ring value of hysteresis comparator 5 is V _t, on its stagnant ring, be limited to V _bRH=V _ref+ V _t, under its stagnant ring, be limited to V _bRL=V _ref-V _t.

Circuit 110 also comprises underloading treatment circuit 8 and state switching circuit 9.Wherein underloading treatment circuit comprises sampling oscillator U ₂, output sampling oscillator signal; Pulse processor U ₃, it receives sampling oscillator signal and mode switching signal, and exports burst process signal V _cL; Underloading peak current processor U ₄, its received pulse processing signals V _cL, and export underloading peak current processing signals V _th.In one embodiment, sampling oscillator U ₂can receive light condition control signal, oscillator U samples ₂an input can be connected to the output (not shown) of light condition testing circuit, thereby output sampling oscillator signal when light condition control signal makes switching circuit 100 enter burst pattern, certainly, sampling oscillator U ₂also can in the whole process of switching circuit 100 operations, export sampling oscillator signal.State switching circuit 9 receives light condition control signal, and output state switching signal is to status switch S ₂thereby, at switching circuit 100, entering light condition, i.e. in burst pattern lower time,, by status switch S ₂be connected to the output of underloading treatment circuit 8, terminal 20, make another input of peak current reference signal decision circuit 3 receive underloading peak current processing signals V _th; And when switching circuit 100 exits light condition, by status switch S ₂be connected to the output of subtraction circuit 2, terminal 10, make another input of peak current reference signal decision circuit 3 receive the difference signal V that subtraction circuit 2 is exported _sUB-V _fB.

In order to make peak current comparator 4 receive better sampled signal, circuit 110 also comprises module LEB(leading edge blanking), in order to prevent due to diode reverse recovery, the switching tube misoperation that the factors such as parasitic concussion cause.But those skilled in the art will appreciate that in the present invention, can elision module LEB.

When the normal operation of switching circuit 100, if load change to some extent, i.e. output voltage V _oUTchange, its feedback voltage V _fBchange thereupon.Be embodied in: if load lightens, feedback voltage V _fBincrease; Otherwise, feedback voltage V _fBreduce.Therefore, when load reduces gradually, those skilled in the art can see, following situations will appear in switching circuit 100:

Situation (1): work as V _fB<V _d4, V _sUB-V _fB>V _sense, V _sUB-V _fB>V _bRLtime, state switching circuit 9 is by status switch S ₂be connected to 10 terminals, make another input receiving feedback signals of peak current reference signal decision circuit 3, be i.e. the difference signal V of subtraction circuit 2 outputs _sUB-V _fB.V wherein _d4for Zener diode D ₄the clamp voltage at two ends.Now, the switching frequency f=1/ (T of switching circuit 100 _charge+ T _pulse)=1/ (C _c0* V _fB/ I _ct+ T _pulse), T wherein _chargefor external capacitor C ₀charging interval, T _pulsefor switch S ₁the time being switched on, C _c0for external capacitor C ₀capacitance, I _ctfor current source U _soutput current value.Its peak current reference signal is V _sense, its peak current remains unchanged, and switching frequency f reduces with the reduction of switching circuit 100 loads, and switching circuit 100 enters pattern 1: peak current is constant, switching frequency changing pattern, as shown in Figure 3.

Situation (2): work as V _fB<V _d4, V _sUB-V _fB<V _sense, V _sUB-V _fB>V _bRLtime, status switch S ₂still be connected to terminal 10, another input receiving feedback signals of peak current reference signal decision circuit 3, i.e. the difference signal V of subtraction circuit 2 outputs _sUB-V _fB.Now, the switching frequency f=1/ (T of switching circuit 100 _charge+ T _pulse)=1/ (C _c0* V _fB/ I _ct+ T _pulse), its peak current reference signal is V _sUB-V _fB, its peak current and switching frequency f all reduce with the reduction of switching circuit 100 loads, and switching circuit 100 enters pattern 2: the equal changing pattern of peak current and switching frequency, as shown in Figure 3.

Situation (3): work as V _fB>V _d4, V _sUB-V _fB<V _sense, V _sUB-V _fB>V _bRLtime, status switch S ₂still be connected to terminal 10, another input receiving feedback signals of peak current reference signal decision circuit 3, i.e. the difference signal V of subtraction circuit 2 outputs _sUB-V _fB.Now, the switching frequency f=1/ (T of switching circuit 100 _charge+ T _pulse)=1/ (C _c0* V _d4/ I _ct+ T _pulse), its peak current reference signal is V _sUB-V _fB, its peak current reduces with the reduction of switching circuit 100 loads, and its switching frequency f remains unchanged, and switching circuit 100 enters mode 3: peak current changes, the constant pattern of switching frequency, as shown in Figure 3.

Situation (4): V _fB>V _d4, V _sUB-V _fB<V _sense, V _sUB-V _fB<V _bRLtime, switching circuit 100 enters burst pattern.Now, state switching circuit 9 is by status switch S ₂be connected to terminal 20, make another input of peak current reference signal decision circuit 3 receive underloading peak current processing signals V _th.Next emphasis is set forth the now work of switching circuit 100.

Referring to Fig. 4, for switching circuit 100 is applied to main switch M under pulse-skip pattern ₁the switching signal waveform of control end.Wherein the longitudinal axis represents switching signal Pulse, and transverse axis represents time t, T _sfor the switch periods of switching circuit 100, X is the switching signal number that has switch periods, i.e. XT _sfor there is the time of switching signal in an equivalent period; Y is the switching signal number of skipping while there is no switch periods, i.e. YT _sfor there is no the time of switching signal in an equivalent period.Now the equivalent frequency of switching circuit 100 is

for traditional pulse-skip pattern, along with the reduction gradually of load, there is the time of switching signal to diminish gradually, do not have the time of switching signal to become gradually greatly, X diminishes, and it is large that Y becomes, equivalent frequency f _eqreduce, when it is reduced to audiorange, just caused audio-frequency noise.The problem to be solved in the present invention, for when switching circuit 100 enters burst pattern, further reduces peak current, and X value is increased, and Y value reduces, thereby makes the equivalent frequency f of switching circuit 100 _eqraise.

In order to achieve the above object, when switching circuit 100 of the present invention enters burst pattern, sampling oscillator U ₂export a series of instructions to pulse processor U ₃, make pulse processor U ₃sampling switch signal, and record the time XT of switching signal _swith the time YT that there is no switching signal _sthereby, record the now equivalent frequency f of switching circuit 100 _eq, and with the X of default _setand Y _setvalue compares, and compares f _eqwith set point f _eqsetsize.Work as f _eq<f _eqsettime, pulse processor U ₃the burst process signal V of output _cLincrease; Otherwise, work as f _eq>f _eqsettime, burst process signal V _cLreduce.Subsequently, pulse processor U ₃by burst process signal V _cLbe delivered to underloading peak current processor U ₄, obtain and V _cLthe underloading peak current processing signals V of inverse change _th.Final by underloading peak current processor U ₄effect, make X value stabilization at X _setplace, Y value are stabilized in Y _setplace, makes equivalent frequency f _eqbe stabilized in f _eqsetplace.Underloading peak current processor U ₄specific works concrete elaboration that see below.

Referring to Fig. 5, be underloading peak current processor U ₄particular circuit configurations Figure 80.Circuit 80 comprises the first operational amplifier A ₁, its in-phase input end received pulse processor U ₃the burst process signal V of output _cL, its output is connected to the 5th N-shaped triode Q ₅base stage, the 5th N-shaped triode Q ₅emitter be connected to the first operational amplifier A ₁inverting input and the first resistance R ₁one end, the first resistance R ₁other end ground connection.I.e. the first operational amplifier A ₁, the first resistance R ₁and the 5th N-shaped triode Q ₅form the first voltage follower.The 5th N-shaped triode Q ₅collector electrode be connected to the first p-type triode Q ₁collector electrode; The first p-type triode Q ₁form the first current-mirror structure with the second p-type triode Q2, and can be seen by Fig. 5, both current ratios are 1:m, flow through the second p-type triode Q ₂electric current I ₂to flow through the first p-type triode Q ₁electric current I ₁m doubly, i.e. I ₂=m * I ₁.Meanwhile, the 3rd p-type triode Q ₃with the 4th p-type triode Q ₄form the second current-mirror structure, both current ratios are 1:n, flow through the 4th p-type triode Q ₄electric current I ₄to flow through the 3rd p-type triode Q ₃electric current I ₃n doubly, i.e. I ₄=n * I ₃.The second operational amplifier A ₂, the second resistance R ₂and the 6th N-shaped triode Q ₆form second voltage follower, its annexation is each other as the first operational amplifier A ₁, the first resistance R ₁with the 5th N-shaped triode Q ₅the same, no longer describe in detail here.While the 6th N-shaped triode Q ₆collector electrode be connected to the second p-type triode Q ₂collector electrode and the 3rd p-type triode Q ₃collector electrode, flow through the 6th N-shaped triode Q ₆electric current I ₆=I ₂+ I ₃.The 4th p-type triode Q ₄collector electrode by the 3rd resistance R ₃be connected to ground and the 3rd resistance R ₃the voltage at two ends is the underloading peak current processing signals V of circuit 80 outputs _th.That is, the first operational amplifier A ₁, the 5th N-shaped triode Q ₅with the first resistance R ₁form into the first voltage follower, received pulse processing signals V _cL, and export the first current signal I ₁; The first p-type triode Q ₁with the second p-type triode Q ₂form the first current mirror, receive the first current signal I ₁, and export the second current signal I ₂; The second operational amplifier A ₂, the second resistance R ₂and the 6th N-shaped triode Q ₆form second voltage follower, receive the second reference signal V _r, and export the 6th current signal I ₆; The 3rd p-type triode Q ₃with the 4th p-type triode Q ₄form the second current mirror, receive the 6th current signal I ₆with the second current signal I ₂poor, i.e. I ₆-I ₂, output the 4th current signal I ₄; The 3rd resistance R ₃receive the 4th current signal I ₄, output underloading peak current processing signals V _th.

Can see, the pass of each electric current and voltage is:

${\mathrm{<figure-callout\; id="1"\; label="I"\; filenames="110603102332.png,110603102929.png"\; state="\{\{state\}\}">I</figure-callout>}}_1=\frac{V_{\mathrm{CL}}}{R_1}---\left(1\right)$

$I_6=\frac{V_R}{R_2}---\left(2\right)$

$I_2=m\&times;{\mathrm{<figure-callout\; id="1"\; label="I"\; filenames="110603102332.png,110603102929.png"\; state="\{\{state\}\}">I</figure-callout>}}_1=m\&times;\frac{V_{\mathrm{CL}}}{R_1}---\left(3\right)$

${\mathrm{<figure-callout\; id="3"\; label="I"\; filenames="110603102332.png,110603102929.png"\; state="\{\{state\}\}">I</figure-callout>}}_3=I_6-I_2=\frac{V_R}{R_2}-m\&times;\frac{V_{\mathrm{CL}}}{R_1}---\left(4\right)$

${\mathrm{<figure-callout\; id="4"\; label="I"\; filenames="110603102929.png"\; state="\{\{state\}\}">I</figure-callout>}}_4=n\&times;{\mathrm{<figure-callout\; id="3"\; label="I"\; filenames="110603102332.png,110603102929.png"\; state="\{\{state\}\}">I</figure-callout>}}_3=n\&times;(\frac{V_R}{R_2}-m\&times;\frac{V_{\mathrm{CL}}}{R_1})---\left(5\right)$

Therefore, underloading peak current processing signals V _thfor

$V_{\mathrm{th}}={\mathrm{<figure-callout\; id="4"\; label="I"\; filenames="110603102929.png"\; state="\{\{state\}\}">I</figure-callout>}}_4\&times;{\mathrm{<figure-callout\; id="3"\; label="R"\; filenames="110603102332.png,110603102929.png"\; state="\{\{state\}\}">R</figure-callout>}}_3=n\&times;{\mathrm{<figure-callout\; id="3"\; label="I"\; filenames="110603102332.png,110603102929.png"\; state="\{\{state\}\}">I</figure-callout>}}_3\&times;{\mathrm{<figure-callout\; id="3"\; label="R"\; filenames="110603102332.png,110603102929.png"\; state="\{\{state\}\}">R</figure-callout>}}_3=n\&times;(\frac{V_R}{R_2}-m\&times;\frac{V_{\mathrm{CL}}}{R_1})\&times;R_3---\left(6\right)$

If the first resistance R ₁, the second resistance R ₂with the 3rd resistance R ₃get identical resistance value, i.e. R ₁=R ₂=R ₃, and get m=1, and n=1, equation (6) becomes

V _th=V _R-V _CL （7）

Be underloading peak current processing signals V _thwith burst process signal V _cLbecome inverse change.And from aforementioned, burst process signal V _cLwith equivalent frequency f _eqbecome inverse change, so underloading peak current processing signals V _thwith equivalent frequency f _eqbecome positive change.If equivalent frequency f _eqlower, underloading peak current processing signals V _thless, V now _th<V _sense, now the peak current reference signal of switching circuit 100 reduces, and its peak current reduces, thereby makes equivalent frequency f _eqincrease, avoid it to enter audiorange.

When switching circuit 100 exits burst pattern, state switching circuit 9 is connected to terminal 10 by status switch, makes another input of peak current reference signal decision circuit 3 receive the difference signal V that subtraction circuit 2 is exported _sUB-V _fB, switching circuit 100 according to current state, enter situation (1), or situation (2), or situation (3).

Can see, by whole control, when switching circuit 100 enters burst pattern, X reduces, Y increases, the equivalent frequency f of switching circuit 100 _eqreduce.Pulse processor U ₃by the X of X value now and Y value and default _setand Y _setcompare, now X<X _set, Y>Y _set, i.e. f _eq<f _eqsetso, pulse processor U ₃the burst process signal V of output _cLincrease; Become large burst process signal V _cLbe transported to underloading peak current processor U ₄, make the underloading peak current processing signals V of its output _threduce, thereby make X value increase to set point X _set, make Y value be decreased to set point Y _set, and finally make f _eqincrease to f _eqset.Therefore, for pre-set X _set, Y _set, the equivalent frequency f of switching circuit 100 _eqcan remain on set point f relatively stablely _eqsetplace.So just can control system, eliminate audio-frequency noise.And set point X _set, Y _setadjustable, i.e. set point f _eqsetadjustable.

The invention also discloses a kind of current peak compression for switching circuit, comprise

Step 1: whether the operation of monitoring described switching circuit enters pulse-skip pattern;

Step 2: if described switching circuit enters pulse-skip pattern, enter action one; If described switching circuit does not enter pulse-skip pattern, enter action two;

Action one: the first step, the described switching circuit of sampling has the time of switching signal and there is no the time of switching signal, obtains the equivalent frequency of switching circuit; Second step, receives described equivalent frequency by pulse processor, obtains the burst process signal that is directly proportional to described equivalent frequency and changes; By underloading peak current processor, receive described burst process signal, obtain the underloading peak current processing signals that is inversely proportional to and changes with described burst process signal; The 3rd step, skips to step 1;

Action two: skip to step 1.

As described above, in second step by the equivalent frequency f obtaining _eqwith set point f _eqsetcompare, if equivalent frequency is less than set point, burst process signal increases; If equivalent frequency is greater than set point, burst process signal reduces.

The sampled signal that flows through the electric current of its switch in underloading peak current processing signals and described switching circuit compares, output peak current control signal is coupled to the control end of described switch, by controlling the peak current of described switch, regulate described equivalent frequency to remain on set point, to make it, outside audiorange, avoiding noise.

Need statement, foregoing invention content and embodiment are intended to prove the practical application of technical scheme provided by the present invention, should not be construed as limiting the scope of the present invention.Those skilled in the art are in spirit of the present invention and principle, when doing various modifications, be equal to and replace or improve.Protection scope of the present invention is as the criterion with appended claims.

Disclosed all features in this specification, or the step in disclosed all methods or process, except mutually exclusive feature and/or step, all can combine by any way.

Disclosed arbitrary feature in this specification (comprising any accessory claim, summary and accompanying drawing), unless narration especially all can be replaced by other equivalences or the alternative features with similar object.That is,, unless narration especially, each feature is an example in a series of equivalences or similar characteristics.

The present invention is not limited to aforesaid embodiment.The present invention expands to any new feature or any new combination disclosing in this manual, and the arbitrary new method disclosing or step or any new combination of process.

Claims (3)

1. for a current peak compression for switching circuit, comprise

Step 1: whether the operation of monitoring described switching circuit enters pulse-skip pattern;

Step 2: if described switching circuit enters pulse-skip pattern, enter action one; If described switching circuit does not enter pulse-skip pattern, enter action two;

Action one:

The first step, has the time of switching signal in the described switching circuit one-period of sampling and there is no time of switching signal, obtains the equivalent frequency of switching circuit;

Second step, receives described equivalent frequency by pulse processor, obtains becoming with described equivalent frequency the burst process signal of inverse change, by underloading peak current processor, receive described burst process signal, obtain becoming with described burst process signal the underloading peak current processing signals of inverse change, utilize described underloading peak current processing signals to control the peak current of described switching circuit, thereby make equivalent frequency remain on set point, and outside audiorange, the sampled signal that flows through the electric current of its switch in wherein said underloading peak current processing signals and described switching circuit compares, output peak current control signal is coupled to the control end of described switch, by controlling the peak current of described switch, regulate described equivalent frequency to remain on set point,

The 3rd step, skips to step 1;

Action two: skip to step 1.

2. method according to claim 1, is characterized in that, described underloading peak current processor comprises

The first voltage follower, receives described burst process signal, output the first current signal;

The first current mirror, receives described the first current signal, output the second current signal;

Second voltage follower, receives the second reference signal, output the 6th current signal;

The second current mirror, receives the poor of described the 6th current signal and described the second current signal, output the 4th current signal;

The 3rd resistance, receives described the 4th current signal, obtains and export described underloading peak current processing signals.

3. method according to claim 1 and 2, is characterized in that, in described second step, the equivalent frequency obtaining and set point is compared, if equivalent frequency is less than set point, burst process signal increases; If equivalent frequency is greater than set point, burst process signal reduces.

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