CN102176453B - Vertical-structure on-chip integrated transformer - Google Patents
Vertical-structure on-chip integrated transformer Download PDFInfo
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- CN102176453B CN102176453B CN 201110064627 CN201110064627A CN102176453B CN 102176453 B CN102176453 B CN 102176453B CN 201110064627 CN201110064627 CN 201110064627 CN 201110064627 A CN201110064627 A CN 201110064627A CN 102176453 B CN102176453 B CN 102176453B
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Abstract
The invention discloses a vertical-structure on-chip integrated transformer. As the structure of a transformer is made vertical to the horizontal direction of the chip, the occupied chip plane area is greatly reduced, the area of an inductance-covered substrate is reduced, the parasitic capacitance between the transformer and substrate is reduced, the resonance frequency of the transformer is improved, and the structure is suitable for a high-frequency circuit.
Description
Technical field
The invention belongs to microelectronics technology, relate to the transformer on a kind of, be specifically related to a kind of transformer of integrated spiral structure.
Background technology
Maturation along with silicon process technology, radio communication has realized revolutionary breakthrough, PCS Personal Communications System for example, WLAN, satellite communication and global positioning system aspect further cause radio frequency integrated circuit (RFICs) manufacturing technology and specificity analysis to become the focus of research.Because the existence of mutual inductance makes on the relative sheet of operating efficiency of on-chip spiral transformer integrated inductor higher, therefore, the on-chip spiral transformer has been widely applied in the design process of radio frequency integrated circuit and analog front circuit.For example in the impedance transformation in the radio frequency integrated circuit, impedance matching, DC-isolation, the signal coupling.In more than ten years in the past, for how designing the high-performance spiral transformer, people have done a large amount of experiments and theoretical research work, and they have high quality factor, high resonance frequency and minimum chip area.In order effectively to improve the quality factor of spiral transformer, scholars propose a lot of technologic or prioritization schemes in shape, unsettled vertical stratification for example, and the differential driving pattern is used High Resistivity Si as substrate, inserts trellis earth shield (PGS) etc.Further, the area that chip takies also is one of key factor that affects chip performance, in the economization chip area footprints, improves the transformer resonance frequency how, also is the problem that the designer should note.
Summary of the invention
Reduce the area that inductance covers substrate when the object of the invention is to reduce the chip area of plane, improve the resonance frequency of transformer, make it to be applicable to high-frequency circuit.
For achieving the above object, the present invention adopts following technical scheme:
A kind of vertical-structure on-chip integrated transformer, comprise primary coil, secondary coil, the one one lead-in wire (11) of primary coil and the one or two lead-in wire (12), the one or three lead-in wire (13) of secondary coil and the one or four lead-in wire (14), primary coil by the 7th metal level (1) respectively through the 21 through hole (V21), the 21 metal level (21), the two or two through hole (V22), the two or two metal level (22), the two or three through hole (V23), the two or three metal level (23), the second four-way hole (V24), the two or four metal level (24), the second five-way hole (V25) is connected to an end of the 31 metal level (31), the other end of the 31 metal level (31) is respectively through the 41 through hole (V41), the 41 metal level (41), the four or two through hole (V42) is connected to an end of metal level on May Day (51), metal level on May Day (51) other end is connected to an end of the 8th metal level (6) through through hole on May Day (V51), the other end of the 8th metal level (6) is connected to an end of the five or two metal level (52) through the five or two through hole (V52), the other end of the five or two metal level (52) is respectively through the four or three through hole (V43), the four or two metal level (42), the 4th four-way hole (V44) is connected to an end of the three or two metal level (32), the three or two metal level (32) other end is respectively through the Seventh Five-Year Plan through hole (V75), the Seventh Five-Year Plan metal level (75), the 7th four-way hole (V74), the seven or four metal level (74), the seven or three through hole (V73), the seven or three metal level (73), the seven or two through hole (V72), the seven or two metal level (72), the end that the through hole July 1st (V71) is connected to the 9th metal level (8) forms; Secondary coil is connected to an end of the one or five metal level (15) through the five or three through hole (V53) by the one or three metal level (13), the other end of the one or five metal level (15) is respectively through the two or six through hole (V26), the two or six metal level (26), the two or seven through hole (V27), the two or seven metal level (27), the two or eight through hole (V28) is connected to the two or eight metal level (28), the other end of the two or eight metal level (28) is through the May 4th through hole (V54), the May 4th metal level (54), the 5th five-way hole (V55), the five or five metal level (55), the five or six through hole (V56) is connected to an end of the one or six metal level (16), and the other end of the one or six metal level (16) is connected to the one or four metal level (14) through the five or seven through hole (V57)
An end become;
Described the one one lead-in wire (11) links to each other with the 7th metal level (1), the one or two lead-in wire (12) links to each other with the 9th metal level (8), the one or three lead-in wire (13) links to each other with an end of the one or five metal level (15) through the five or three through hole (V53), and the one or four lead-in wire (14) links to each other with an end of the one or six metal level (16) through the five or seven through hole (V57);
Described the 7th metal level (1) and the 9th metal level (8) belong to the first metal layer and mutually insulated, the one or five metal level (15), the one or six metal level (16), the 21 metal level (21) and the seven or two metal level (72) belong to the second metal level and mutually insulated, the two or two metal level (22), the two or six metal level (26), the five or five metal level (55), the 8th metal level (6) and the seven or three metal level (73) belong to the 3rd metal level and mutually insulated, the two or three metal level (23), the two or seven metal level (27), metal level on May Day (51), the five or two metal level (52), the May 4th metal level (54) and the seven or four metal level (74) belong to the 4th metal level and mutually insulated, the two or four metal level (24), the two or eight metal level (28) and the Seventh Five-Year Plan metal level (75) belong to the 5th metal level and mutually insulated, and the 31 metal level (31) and the three or two metal level (32) belong to the 6th metal level and mutually insulated;
Described metal level on May Day (51) and the five or two metal level (52), the 41 metal level (41) and the four or two metal level (42), the 31 metal level (31) becomes Central Symmetry with the three or two metal level (32);
The axis of the axis of the axis of the axis of the axis of the axis of described the first metal layer, the second metal level, the 3rd metal level, the 4th metal level, the 5th metal level, the 6th metal level is positioned at same plane, and this plane is perpendicular to the chip upper and lower surface;
Described primary coil and secondary coil mutually insulated.
As possibility, described the first, second, third, fourth, the 5th, the 6th metal level is made of from top to down 6 layers of metal level in the standard C OMS technique.
As possibility, its thickness of described the first metal layer is that 4um, its thickness of the second metal level are that 3um, its thickness of the 3rd metal level are that 0.5um, its thickness of the 4th metal level are that 0.25um, its thickness of the 5th metal level are that 0.25um, its thickness of the 6th metal level are 0.25um; Through hole thickness between described the first metal layer and the second metal level is that its thickness of through hole between 1.5 um, the second metal level and the 3rd metal level is that through hole thickness between 2.1um, the 3rd metal level and the 4th metal level is that through hole thickness between 0.5 um, the 4th metal level and the 5th metal level is that through hole thickness between 0.245 um, the 5th metal level and the 6th metal level is 0.245 um.
Beneficial effect of the present invention is that one side becomes the structure fabrication of transformer perpendicular to the chip level direction, its the most obvious advantage is exactly greatly to have reduced the shared chip area of plane, on the other hand, this structure has reduced the area of inductance covering substrate, thus one, the parasitic capacitance between transformer and substrate has just reduced, and is conducive to like this improve the resonance frequency of transformer, therefore, this kind structure is applicable to high-frequency circuit.
Description of drawings
Fig. 1 is the forward stereogram of integrated transformer;
Fig. 2 is the left view of integrated transformer;
Fig. 3 is the front view of integrated transformer;
Fig. 4 is that the L-f of the embodiment of the invention concerns analogous diagram;
Fig. 5 is that the Q-f of the embodiment of the invention concerns analogous diagram.
Embodiment
The invention will be further described below in conjunction with the drawings and specific embodiments.
This structure adopts six layers of metal of IBM standard technology altogether, from top to bottom being followed successively by its thickness of the first metal layer is 4um, its thickness of the second metal level is 3um, its thickness of the 3rd metal level is 0.5um, its thickness of the 4th metal level is 0.25um, its thickness of the 5th metal level is 0.25um, its thickness of the 6th metal level is 0.25um, connect with through hole between parallel each layer metal, through hole thickness between the first metal layer and the second metal level is 1.5 um, its thickness of through hole between the second metal level and the 3rd metal level is 2.1um, through hole thickness between the 3rd metal level and the 4th metal level is 0.5 um, through hole thickness between the 4th metal level and the 5th metal level is 0.245 um, and the through hole thickness between the 5th metal level and the 6th metal level is 0.245 um.
As shown in Figure 1, the CONSTRUCTED SPECIFICATION of transformer is: at first describe primary coil, lead-in wire 11, lead-in wire 12 are two ports of transformer on the first metal layer, and metal level 1, metal level 8 are with the interconnection line on the layer metal; Line 2 is perpendicular to the line on the chip direction, and its concrete formation from top to bottom is followed successively by through hole V21, metal level 21, through hole V22, metal level 22, through hole V23, metal level 23, through hole V24, metal level 24 and through hole V25; Metal level 31 is the interconnection line on the 6th metal level, sees from left to right, and its trend makes up a segment length for the edge-x of elder generation direction of principal axis, then extends a segment distance along the y direction of principal axis.As shown in Figure 2, metal level 41 is the interconnection line on the 5th metal level; Metal level 51 is the interconnection line on the 4th metal level, sees from left to right, and its trend makes up a segment length for the edge-x of elder generation direction of principal axis, and edge-y direction of principal axis extends a segment distance then, the equal in length that this extended distance and metal level 31 extend at the y direction of principal axis.Metal level 6 is interconnection line on the 3rd metal level; Metal level 52 and metal level 51, metal level 42 and metal level 41,31 one-tenth Central Symmetries of metal level 32 and metal level are not given unnecessary details here, and line 7 is identical with line 2 structures and become Central Symmetry, also is perpendicular to the line on the chip direction.
The current direction of primary coil is: lead-in wire 11, metal level 1, line 2, metal level 31, through hole V41, metal level 41, through hole V42, metal level 51, through hole V51, metal level 6, through hole V52, metal level 52, through hole V43, metal level 42, through hole V44, metal level 32, line 7, metal level 8, lead-in wire 12.
The structure of secondary coil is two ports of transformer secondary output coil on the first metal layer for lead-in wire 13, lead-in wire 14, and metal level 15, metal level 16 are the interconnection line on the second metal level; Line 21 is perpendicular to the line on the chip direction, and its concrete formation from top to bottom is followed successively by through hole V26, metal level 26, through hole V27, metal level 27, through hole V28; Metal level 28 is the interconnection line on the 5th metal level; Line 71 is identical with the structure of line 21, also is perpendicular to the line on the chip direction, does not give unnecessary details here.
The current direction of secondary coil is: lead-in wire 13, through hole V53, metal level 15, line 21, metal level 28, line 71, metal level 16, through hole V57, lead-in wire 14.
Embodiment one:
This piezoelectric transformer primary coil external diameter OD_pri=140um, the outer radial line OD_sec=60um of secondary coil, live width W=8um, each through hole length in the x-direction also is 8um, the length of four ports is 20um.As shown in Figure 4, circle point curve L11 represents the self-induction value of primary coil, and trigonometric curve L22 represents the self-induction value of secondary coil, and the transformation ratio of primary coil and secondary coil is about 1.5.Meanwhile, the self-resonant frequency of this structure is higher, resonance not yet during 60GHz, its applicable and high-frequency circuit of this behavioral illustrations.Fig. 5 is that the Q-f of the present embodiment concerns analogous diagram, and same circle point curve Q11 represents the quality factor q value of primary coil, and triangulation point curve Q22 represents the quality factor q value of secondary coil.As can be seen from the figure primary coil quality factor maximum peak Q is about 6, and secondary coil quality factor maximum peak Q is about 12.When electric current when the transformer coil, the periodic magnetic field that alternating current produces only produces magnetic field in the peripheral region of wire, and then the induced electricity that produces in substrate fails to be convened for lack of a quorum corresponding very littlely, so this transformer has higher Q value.Frequency when reaching peak Q is higher, and this property illustrates that also it is applicable to the circuit of upper frequency.
The above only is preferred implementation of the present invention; should be pointed out that for those skilled in the art, without departing from the inventive concept of the premise; can also make some improvements and modifications, these improvements and modifications also should be considered within the scope of protection of the present invention.
Claims (3)
1. vertical-structure on-chip integrated transformer, comprise primary coil, secondary coil, the one one lead-in wire (11) of primary coil and the one or two lead-in wire (12), the one or three lead-in wire (13) of secondary coil and the one or four lead-in wire (14), it is characterized in that, primary coil by the 7th metal level (1) respectively through the 21 through hole (V21), the 21 metal level (21), the two or two through hole (V22), the two or two metal level (22), the two or three through hole (V23), the two or three metal level (23), the second four-way hole (V24), the two or four metal level (24), the second five-way hole (V25) is connected to an end of the 31 metal level (31), the other end of the 31 metal level (31) is respectively through the 41 through hole (V41), the 41 metal level (41), the four or two through hole (V42) is connected to an end of metal level on May Day (51), metal level on May Day (51) other end is connected to an end of the 8th metal level (6) through through hole on May Day (V51), the other end of the 8th metal level (6) is connected to an end of the five or two metal level (52) through the five or two through hole (V52), the other end of the five or two metal level (52) is respectively through the four or three through hole (V43), the four or two metal level (42), the 4th four-way hole (V44) is connected to an end of the three or two metal level (32), the three or two metal level (32) other end is respectively through the Seventh Five-Year Plan through hole (V75), the Seventh Five-Year Plan metal level (75), the 7th four-way hole (V74), the seven or four metal level (74), the seven or three through hole (V73), the seven or three metal level (73), the seven or two through hole (V72), the seven or two metal level (72), the end that the through hole July 1st (V71) is connected to the 9th metal level (8) forms; Secondary coil is connected to an end of the one or five metal level (15) through the five or three through hole (V53) by the one or three metal level (13), the other end of the one or five metal level (15) is respectively through the two or six through hole (V26), the two or six metal level (26), the two or seven through hole (V27), the two or seven metal level (27), the two or eight through hole (V28) is connected to the two or eight metal level (28), the other end of the two or eight metal level (28) is through the May 4th through hole (V54), the May 4th metal level (54), the 5th five-way hole (V55), the five or five metal level (55), the five or six through hole (V56) is connected to an end of the one or six metal level (16), and the other end of the one or six metal level (16) is connected to the one or four metal level (14) through the five or seven through hole (V57)
An end become;
Described the one one lead-in wire (11) links to each other with the 7th metal level (1), the one or two lead-in wire (12) links to each other with the 9th metal level (8), the one or three lead-in wire (13) links to each other with an end of the one or five metal level (15) through the five or three through hole (V53), and the one or four lead-in wire (14) links to each other with an end of the one or six metal level (16) through the five or seven through hole (V57);
Described the 7th metal level (1) and the 9th metal level (8) belong to the first metal layer and mutually insulated, the one or five metal level (15), the one or six metal level (16), the 21 metal level (21) and the seven or two metal level (72) belong to the second metal level and mutually insulated, the two or two metal level (22), the two or six metal level (26), the five or five metal level (55), the 8th metal level (6) and the seven or three metal level (73) belong to the 3rd metal level and mutually insulated, the two or three metal level (23), the two or seven metal level (27), metal level on May Day (51), the five or two metal level (52), the May 4th metal level (54) and the seven or four metal level (74) belong to the 4th metal level and mutually insulated, the two or four metal level (24), the two or eight metal level (28) and the Seventh Five-Year Plan metal level (75) belong to the 5th metal level and mutually insulated, and the 31 metal level (31) and the three or two metal level (32) belong to the 6th metal level and mutually insulated;
Described metal level on May Day (51) and the five or two metal level (52), the 41 metal level (41) and the four or two metal level (42), the 31 metal level (31) becomes Central Symmetry with the three or two metal level (32);
The axis of the axis of the axis of the axis of the axis of the axis of described the first metal layer, the second metal level, the 3rd metal level, the 4th metal level, the 5th metal level, the 6th metal level is positioned at same plane, and this plane is perpendicular to the chip upper and lower surface;
Described primary coil and secondary coil mutually insulated.
2. a kind of vertical-structure on-chip integrated transformer according to claim 1 is characterized in that, described the first, second, third, fourth, the 5th, the 6th metal level is made of from top to down 6 layers of metal level in the standard CMOS process.
3. a kind of vertical-structure on-chip integrated transformer according to claim 1, it is characterized in that, its thickness of described the first metal layer is that 4um, its thickness of the second metal level are that 3um, its thickness of the 3rd metal level are that 0.5um, its thickness of the 4th metal level are that 0.25um, its thickness of the 5th metal level are that 0.25um, its thickness of the 6th metal level are 0.25um; Through hole thickness between described the first metal layer and the second metal level is that its thickness of through hole between 1.5 um, the second metal level and the 3rd metal level is that through hole thickness between 2.1um, the 3rd metal level and the 4th metal level is that through hole thickness between 0.5 um, the 4th metal level and the 5th metal level is that through hole thickness between 0.245 um, the 5th metal level and the 6th metal level is 0.245 um.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201110064627 CN102176453B (en) | 2011-03-17 | 2011-03-17 | Vertical-structure on-chip integrated transformer |
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| Application Number | Priority Date | Filing Date | Title |
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| CN 201110064627 CN102176453B (en) | 2011-03-17 | 2011-03-17 | Vertical-structure on-chip integrated transformer |
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| CN102176453A CN102176453A (en) | 2011-09-07 |
| CN102176453B true CN102176453B (en) | 2013-04-24 |
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| CN 201110064627 Expired - Fee Related CN102176453B (en) | 2011-03-17 | 2011-03-17 | Vertical-structure on-chip integrated transformer |
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Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103760395A (en) * | 2014-01-02 | 2014-04-30 | 国家电网公司 | Multiple-output electronic voltage transformer for GIS |
| US10236115B2 (en) | 2014-06-16 | 2019-03-19 | Stmicroelectronics S.R.L. | Integrated transformer |
| CN108039344B (en) * | 2017-11-29 | 2018-12-28 | 温州大学 | A kind of restructural on piece integrated transformer and its adjusting method |
| CN108447862B (en) * | 2018-02-27 | 2020-01-14 | 温州大学 | Reconfigurable on-chip integrated transformer and method for adjusting inductance value of signal line thereof |
| CN109686549B (en) * | 2019-01-11 | 2020-12-29 | 杭州矽磁微电子有限公司 | Integrated transformer with multiple winding coils manufactured through micro-nano processing |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6486765B1 (en) * | 1999-09-17 | 2002-11-26 | Oki Electric Industry Co, Ltd. | Transformer |
| CN1522450A (en) * | 2001-06-29 | 2004-08-18 | 皇家菲利浦电子有限公司 | Multiple-interleaved integrated circuit transformer |
| CN101142638A (en) * | 2005-08-04 | 2008-03-12 | 加利福尼亚大学董事 | Interleaved three-dimensional on-chip differential inductors and transformers |
| US7821372B2 (en) * | 2008-12-31 | 2010-10-26 | Taiwan Semiconductor Manufacturing Co., Ltd. | On-chip transformer BALUN structures |
-
2011
- 2011-03-17 CN CN 201110064627 patent/CN102176453B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6486765B1 (en) * | 1999-09-17 | 2002-11-26 | Oki Electric Industry Co, Ltd. | Transformer |
| CN1522450A (en) * | 2001-06-29 | 2004-08-18 | 皇家菲利浦电子有限公司 | Multiple-interleaved integrated circuit transformer |
| CN101142638A (en) * | 2005-08-04 | 2008-03-12 | 加利福尼亚大学董事 | Interleaved three-dimensional on-chip differential inductors and transformers |
| US7821372B2 (en) * | 2008-12-31 | 2010-10-26 | Taiwan Semiconductor Manufacturing Co., Ltd. | On-chip transformer BALUN structures |
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