CN102043729B - Memory management method and system of dynamic random access memory - Google Patents
Memory management method and system of dynamic random access memory Download PDFInfo
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- CN102043729B CN102043729B CN2009102363615A CN200910236361A CN102043729B CN 102043729 B CN102043729 B CN 102043729B CN 2009102363615 A CN2009102363615 A CN 2009102363615A CN 200910236361 A CN200910236361 A CN 200910236361A CN 102043729 B CN102043729 B CN 102043729B
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Abstract
The invention provides a memory management method of a dynamic random access memory (DRAM), which is used for carrying out memory management based on a table in the memory. The method comprises the following steps: incorporating a table index and relative offset address information in the table into a user command; mapping in accordance with the table index and the relative offset address information in the table to obtain a global address and an operating type in an input command of a DRAM controller and judge whether an automatic precharge operation needs to be accompanied; and controlling the read/write of DRAM particles by the DRAM controller in accordance with the global address and the operating type in the input command. The invention also provides a DRAM management device using the method. By using the memory management method and device provided by the invention, the memory management can be carried out based on the table, and one DRAM controller can carry out flexible address management and operation management on multiple tables of different total capacities and different table-item widths.
Description
Technical field
The present invention relates to storage control technology, particularly EMS memory management process and the system of a kind of dynamic RAM (DRAM).
Background technology
At present, the DRAM technology obtains great development, main use the polytypes such as synchronous dynamic random incoming memory (SDRAM), Double Data Rate (DDR) SDRAM, 2nd generation Double Data Rate (DDR2) SDRAM and the 3rd generation Double Data Rate (DDR3) SDRAM are arranged.DRAM for existing the above-mentioned type, referring to Fig. 1, real application systems all comprises DRAM Memory Controller Hub and DRAM memory grain at least, the DRAM Memory Controller Hub sends control command to the DRAM memory grain, comprise clock signal, command-control signal and address signal, and the DRAM memory grain is carried out the read-write operation of data-signal by above-mentioned control command control.
Specifically, memory grain has 4 or 8 memory banks (BANK) usually, before controller carries out the read-write operation of data-signal to some BANK, need to open this BANK one corresponding row with activating (ACTIVE) order, can read and write the data in this row.If read and write the space that other row of this BANK comprises, then need to utilize first precharge (PRECHARGE) order to close other opened row, and then utilize the ACTIVE order to open this corresponding row.In order to improve the utilization factor of data bus in the read and write access of the DRAM of many BANK, the DRAM Memory Controller Hub can be opened a plurality of BANK usually simultaneously, and interts the data read-write operation that carries out a plurality of BANK.
The read write command that CPU sends is called user instruction, in majority is used, often is the input command that user instruction becomes the DRAM Memory Controller Hub, and the DRAM Memory Controller Hub is controlled the DRAM memory grain according to input command.User instruction finally is presented as the read and write access to the DRAM storage space.User instruction comprises action type and operation address information, and wherein action type comprises read or write; Operation address information provides certain address in the connected reference space that can happen suddenly.Operation address information can be mapped as and specify sheet to select space (CS), BANK space and concrete row address (ROW) and column address (COL).At present, the mapping method of CS/BANK/ROW/COL address that the operation address information of user instruction is mapped as the input command of dram controller has two kinds, respectively right and wrong BANK mapping and the BANK mapping that interweaves that interweaves.
Non-BANK interweave the mapping an instantiation as shown in table 1.
| 31:30 | 29 | 28 | 27:25 | 24:10 | 9:0 |
| Action type | Keep | Sheet selects space (CS) | BANK space (BANK) | Row address (ROW) | Column address (COL) |
Table 1
When adopting non-BANK to interweave mapping method, the DRAM internal storage management system as shown in Figure 2.User instruction directly inputs to the DRAM Memory Controller Hub as the input command of DRAM Memory Controller Hub.Adopt non-BANK interleaving mode not take full advantage of the advantage of many BANK, performance is lower when the larger data of randomness are read and write.
In order to take full advantage of the advantage of many BANK, the PRECHARGE etc. that hides the line feed address space access postpones expense, adopts the BANK mapping mode that interweaves.But user instruction generally provides certain address in a connected reference space.The low bit address information of part wherein is mapped as BANK information.
BANK interweave the mapping an instantiation as shown in table 2, in table 2, equal 4 as example take burst access length.
| 31:30 | 29 | 28 | 27 | 26:12 | 11:4 | 3:2 | 1:0 |
| Action type | Keep | Sheet selects space (CS) | Part BANK space (BANK) | Row address (ROW) | Part rows address (COL) | Part BANK space (BANK) | Part rows address (COL) |
Table 2
When adopting BANK to interweave mapping method, the DRAM internal storage management system as shown in Figure 3.Be mapped as the input command of DRAM Memory Controller Hub after the user instruction process BANK interleave unit, and, the BANK interleave unit also links to each other with configuration interface, provides configuration information by configuration interface for the BANK interleave unit, and configuration information comprises the BANK quantity that burst access length and participation interweave etc.The BANK interleave unit according to configuration information extract some bit information as the BANK input information to dram controller, the concrete bit information that extracts is determined by configuration information.
The data that need in the data communications equipment to read and write often are stored among the BANK with form, treatment circuit (such as dedicated processes chips such as on-site programmable gate array FPGAs) needs a plurality of forms of access in data-signal read-write process, list item size and the form total volume possibility difference of each form are very large, might take a BANK by a form, also might need to take a plurality of BANK by a form, a plurality of forms may a certain or some BANK of the unity of possession.Existing BANK interweaves in the mapping method, shines upon according to the input command that comprises the BANK address, can't satisfy so meticulous address mapping demand.
In addition, the access process of a plurality of forms is presented as the read and write access that randomness is larger, in order to take full advantage of the advantage of many BANK, realizes largeizationr of random access performance, sometimes will clearly indicate the current read or write of dram controller will follow auto precharge operation.For the situation of a plurality of forms of management under the same controller, CPU or dedicated processes circuit are difficult to judge to provide the indication that will follow auto precharge operation in which user instruction.When existing mapping method needs to send such indication if can not being judged.
In a word, existing DRAM EMS memory management process and device are difficult to satisfy the form of a plurality of different capabilities of same DRAM Memory Controller Hub flexible management, different list item width, and the advantage that also is difficult to take full advantage of many BANK realizes a plurality of largeizationr of table access performance.
Summary of the invention
The embodiment of the invention provides the EMS memory management process of a kind of dynamic RAM DRAM, is intended to the form of a plurality of different capabilities of flexible management, different list item width.
The embodiment of the invention provides the internal storage management system of a kind of dynamic RAM DRAM, is intended to the form of a plurality of different capabilities of flexible management, different list item width.
For first purpose, the technical scheme of the embodiment of the invention specifically is achieved in that
The EMS memory management process of a kind of dynamic RAM DRAM comprises:
Reception comprises the user instruction of action type and operation address information, comprises relativity shift address information in table index and this form in the described operation address information;
Shine upon the input command that obtains the DRAM Memory Controller Hub according to user instruction and pre-configured form management table and form BANK spatial mappings table, comprise global address and action type in the described input command;
The DRAM Memory Controller Hub is according to the reading and writing data of input command control DRAM memory grain.
In the such scheme, the pre-configured method of described form management table and form BANK spatial mappings table comprises:
Receive configuration information;
According to configuration information burst access length is set, sheet selects space number, BANK address width, row address width and column address width;
According to configuration information form management table and form BANK spatial mappings table are set, each list item of described form management table comprises the BANK number that a form takies, and described form BANK spatial mappings table comprises the BANK address.
In the such scheme, the described input command that obtains the DRAM Memory Controller Hub according to user instruction and pre-configured form management table and the mapping of form BANK spatial mappings table comprises:
User's total drift in the computation sheet, computing method are: relativity shift address information in the user's skew=form in the form;
The BANK number that takies according to burst access length and form is calculated BANK and is searched sequence number and BANK offset address;
Search sequence number composition form BANK spatial mappings table index according to table index and BANK, inquire about described form BANK spatial mappings table according to form BANK spatial mappings table index, obtain BANK address corresponding to user instruction;
Calculate the BANK total drift, computing method are: BANK total drift=BANK offset address;
According to required row address and the total bit of column address, the corresponding figure place from low level in the BANK total drift is mapped as column address and row address.
In the such scheme, the described BANK number that takies according to burst access length and form calculates that BANK searches sequence number and the BANK offset address comprises:
Determine the low bit of burst according to burst access length, hang down the BANK number that bit position in addition takies divided by form with burst in the skew of the user in the form, remainder is that BANK searches sequence number, and the low bit of burst forms the BANK offset address in the user's skew in merchant and the form.
In the such scheme,
Each list item of described form management table further comprises: the user instruction additional offset;
The computing method of user's total drift are in the described computation sheet: relativity shift address information in the user's skew=form in the form+user instruction additional offset.
In the such scheme,
Described form BANK spatial mappings table further comprises: the BANK additional offset;
The computing method of described calculating BANK total drift are: BANK total drift=BANK offset address+BANK additional offset.
In the such scheme,
Described form BANK spatial mappings table further comprises: the auto-precharge indication, and indicate current read-write operation whether to need to follow auto precharge operation, if necessary, then action type is revised as read/write by read/write operation and follows auto precharge operation.
For above-mentioned second purpose, this technical scheme is such:
A kind of DRAM internal storage management system comprises:
The memory management device, be used for receiving the user instruction that comprises action type and operation address information, comprise relativity shift address information in table index and the form in the described operation address information, shine upon the input command that obtains the DRAM Memory Controller Hub according to user instruction and pre-configured form management table and form BANK spatial mappings table, comprise global address and action type in the described input command;
The DRAM Memory Controller Hub is used for according to input command the DRAM memory grain being carried out data read-write operation;
The DRAM memory grain is used for form storage data.
In the such scheme, described memory management device comprises:
The form management table carries out pre-configuredly according to configuration information, inquire the shared BANK number of form of needs access according to user instruction, offers address mapping unit;
Form BANK spatial mappings table carries out pre-configuredly according to configuration information, inquire the BANK address of the form of needs access according to user instruction, offers address mapping unit;
Address mapping unit, receive user instruction, according to user's total drift in the relative address offset information computation sheet in the form in the user instruction, determine the low bit of burst according to pre-configured burst access length, hang down the BANK number that bit position in addition takies divided by form with burst in the skew of the user in the form, remainder is that BANK searches sequence number, the low bit of burst forms the BANK offset address in user's skew in merchant and the form, calculate the BANK total drift according to the BANK offset address, according to pre-configured row address and the total bit of column address, the corresponding figure place from low level in the BANK total drift is mapped as column address and row address.
In the such scheme,
Described form management table further comprises: the user instruction additional offset;
Described address mapping unit obtains the user instruction additional offset from described form management table, with relative address offset information in the form in the user instruction and the addition of user instruction additional offset, obtains user's total drift in the form.
In the such scheme,
Described form BANK spatial mappings table further comprises: the BANK additional offset;
Described address mapping unit obtains the BANK additional offset from described form BANK spatial mappings table, with the address offset information in the user instruction and the addition of BANK additional offset, obtains the BANK total drift.
In the such scheme,
Described form BANK spatial mappings table further comprises: the auto-precharge indication;
Whether the current read-write operation of described auto-precharge indication indication needs to follow auto precharge operation, and if necessary, then described address mapping unit is revised as read/write with action type by read/write operation and follows auto precharge operation.
As seen from the above technical solutions, the form that the present invention is based in the internal memory carries out memory management, in user instruction, comprise relativity shift address information in table index and this form, shine upon according to relativity shift address information in table index and this form, obtain the global address in the input command of DRAM Memory Controller Hub, the DRAM Memory Controller Hub is according to the read-write of the control of the global address in input command DRAM memory grain.Because carry out memory management based on form, therefore a DRAM Memory Controller Hub can carry out flexible management to the form of a plurality of different total volumies, different list item width.
Description of drawings
Fig. 1 is DRAM application system structural representation;
Fig. 2 is the DRAM internal storage management system synoptic diagram that non-BANK interweaves and shines upon in the prior art;
Fig. 3 is the DRAM internal storage management system synoptic diagram that BANK interweaves and shines upon in the prior art;
Fig. 4 is a preferred embodiment of the present invention DRAM internal storage management system synoptic diagram;
Fig. 5 is the composition structural representation of memory management device in a preferred embodiment of the present invention.
Embodiment
For making purpose of the present invention, technical scheme and advantage clearer, referring to the accompanying drawing embodiment that develops simultaneously, the present invention is described in more detail.
In the embodiment of the DRAM EMS memory management process that the present invention proposes, user instruction still comprises action type and operation address information.Identical in action type and the prior art, comprise read or write.Unlike the prior art be, comprise relativity shift address information in table index and this form in the operation address information in the embodiment of the invention, wherein, table index is in order to the some forms of indication access, and the relativity shift address information is in order to the side-play amount of indication in above table in this form.Shine upon according to relativity shift address information in the table index in the above-mentioned user instruction and this form, obtain the input command of DRAM Memory Controller Hub, comprise global address and action type in the input command, the DRAM Memory Controller Hub is according to the reading and writing data of input command control DRAM memory grain.
The EMS memory management process that adopts the present invention to propose is shone upon the user instruction that comprises above-mentioned information, obtains the input command of DRAM Memory Controller Hub, and an instantiation of mapping relations is as shown in table 3.For 32 DRAM Memory Controller Hub input command, the 31st and the 30th is used for the expression action type, and the 29th to the 27th is used for the expression table index, and the 26th to the 0th is used for relativity shift address information in this form of expression.
| 31:30 | 29:27 | 26:0 |
| Action type | Table index [2:0] | Relativity shift address information in this form |
Table 3
When adopting the EMS memory management process of the present invention's proposition, need to improve the DRAM internal storage management system, that is, BANK interleave unit shown in Figure 3 be replaced with the memory management device, the DRAM internal storage management system after the improvement as shown in Figure 4.The composition structure of memory management device inside as shown in Figure 5.
Referring to Fig. 4 and Fig. 5, memory management device inside comprises address mapping unit 501, form management table 502 and form BANK spatial mappings table 503.The memory management device receives user instruction and configuration information, in advance according to configuration information configuration form admin table 502 and form BANK spatial mappings table 503, after receiving user instruction, the input command that maps out the DRAM Memory Controller Hub according to user instruction and pre-configured form management table 502 and form BANK spatial mappings table 503.
Configuration information sends the memory management device to by configuration interface, can form management table 502 and form BANK spatial mappings table 503 be set by configuration information, and the information such as burst access length, BANK address width, row address width and column address width are set.
Each list item of form management table 502 carries out index by the table index value in the user instruction, the BANK number that each list item takies in order to indicate a form.After the memory management device receives user instruction, in form management table 502, inquire the shared BANK number of form of needs access according to user instruction, and offer address mapping unit 501.Preferably, can also in the list item of form management table 502, comprise the user instruction additional offset, in order to the offset address of indicating this user instruction to add, provide it to address mapping unit 501.
The BANK that each list item of form BANK spatial mappings table 503 is calculated by the table index value in the user instruction and address mapping unit 501 searches sequence number and unites and carry out index, and the list item of form BANK spatial mappings table 503 is indicated this user instruction to be mapped to concrete which BANK of DRAM particle and offered address mapping unit 501.Preferably, can also in the list item of form BANK spatial mappings table 503, comprise the BANK additional offset, in order to the offset address of indicating this user instruction to add, provide it to address mapping unit 501.Further, can also in the list item of form BANK spatial mappings table 503, comprise the auto-precharge indication, whether need to follow auto-precharge in order to indicate this user instruction, this indicator signal is offered address mapping unit 501.
The Ben Biaoge that address mapping unit 501 provides according to burst access length, form management table 502 takies BANK quantity and user instruction additional offset, calculate BANK corresponding to this user instruction and search sequence number and the interior offset address of BANK, BANK is searched sequence number offer form BANK spatial mappings table.And BANK address and BANK additional offset that address mapping unit 501 provides according to form BANK spatial mappings table 503 generate the address informations such as the BANK address send to dram controller, row address, column address.Preferably, address mapping unit 501 receives the auto-precharge indication that form BANK spatial mappings table 503 provides, and need to follow auto-precharge if auto-precharge is designated as, and then action type is revised as and follows auto precharge operation.Address mapping unit 501 offers dram controller with the address information of its generation and action type as the input command of DRAM Memory Controller Hub.
The below is elaborated with the workflow of a specific embodiment to address mapping unit 501, in the present embodiment, equal 4 with burst access length, have 8 BANK in the DRAM memory grain, it is 1 that sheet selects the space number, the BANK address width is 3, and the row address width is 15, and column address width is 10 and is example.
The BANK number that each list item of form management table 502 takies in order to indicate a form, preferably, each list item of form management table 502 also comprises the user instruction additional offset, the BANK number that some forms are taken is labeled as n, and the user instruction additional offset of some forms is labeled as Offset1.Address mapping unit 501 obtains n and the Offset1 of the form of required access from form management table 502.
User's total drift in address mapping unit 501 computation sheets, circular is: relativity shift address information in the user's total drift in the form=this form+user instruction additional offset Offset1, wherein Offset1 is optional.Offset address in the form as 27 as example, it is labeled as ADDR1[26:0], then the user's total drift in the form is 27 also, and it is labeled as ADDR2[26:0].
Form BANK spatial mappings table 503 provides BANK address and optional BANK additional offset, and the BANK address is designated as BA[2:0], the BANK additional offset is designated as Offset2.Address mapping unit 501 obtains BA[2:0 from form BANK spatial mappings table 503] and Offset2.
The CS signal takies the part of BANK address.For example, only have 4 BANK in this DRAM memory grain, if need to realize under a controller 8 BANK being arranged, then need two CS spaces, CS space CS[0] expression.In this example, CS[0]=BA[2], BANK[1:0] }=BA[1:0].
The below is described in detail the EMS memory management process that adopts the present invention to propose with a specific embodiment, in the present embodiment, 5 forms of a controller management, its form management table is as shown in table 4, and form BANK spatial mappings table is as shown in table 5.
| Table index [2:0] | The BANK quantity that takies | User instruction additional offset (optional) |
| 0 | 1 | 0x000_0000 |
| 1 | 1 | 0x000_0000 |
| 2 | 2 | 0x000_0000 |
| 3 | 4 | 0x000_0000 |
| 4 | 4 | 0x100_0000 |
| 5 | Not 0 (not using) | |
| 6 | Not 0 (not using) | |
| 7 | Not 0 (not using) |
Table 4
| { table index [2:0], BANK searches sequence number [2:0] } | The BANK address | The auto-precharge indication | BANK additional offset (optional) |
| 3’b000，3’b000 | 0 | 0 | 0x000_0000 |
| 3’b001，3’b000 | 1 | 0 | 0x000_0000 |
| 3’b010，3’b000 | 2 | 1 | 0x000_0000 |
| 3’b010，3’b001 | 3 | 1 | 0x000_0000 |
| 3’b011，3’b000 | 4 | 1 | 0x000_0000 |
| 3’b011，3’b001 | 5 | 1 | 0x000_0000 |
| 3’b011，3’b010 | 6 | 1 | 0x000_0000 |
| 3’b011，3’b011 | 7 | 1 | 0x000_0000 |
| 3’b100，3’b000 | 4 | 1 | 0x000_0000 |
| 3’b100，3’b001 | 5 | 1 | 0x000_0000 |
| 3’b100，3’b010 | 6 | 1 | 0x000_0000 |
| 3’b100，3’b011 | 7 | 1 | 0x000_0000 |
| Other | Not 0 (not using) |
Table 5
Referring to table 4, the configuration of the form of present embodiment is as follows:
Form 0 and form 1 take respectively 1 BANK, are respectively BANK0 and BANK1;
Form 2 takies 2 BANK, is BANK2 and BANK3;
Form 3 and form 4 take 4 BANK jointly, and namely form 3 and form 4 take BANK4, BANK5, BANK6 and BANK7 jointly, realize sharing BANK by user instruction additional offset 0x100_0000 is set for form 4.
Referring to form 5, the auto-precharge indication bit in the form 5 is used to indicate whether need to follow auto precharge operation, and in the present embodiment, auto-precharge is designated as 0 expression and keeps original action type; Auto-precharge is designated as the current read/write operation of 1 expression need to follow auto precharge operation.0 or the 1 represented situation that also auto-precharge in the present embodiment can be designated as is exchanged, and whether expression needs to follow auto precharge operation.
In the present embodiment, provide with a user instruction form 4 carried out read access operation, and in the user instruction in this form the relativity shift address be that 0x000_0810 is example.Therefore, the table index that needs to inquire about in the form management table equals 4, i.e. 3 ' b100, and the form management table informs that form 4 takies 4 BANK, i.e. n=4, and user instruction additional offset is 0x100_0000.
Address mapping unit calculates the user's total drift ADDR2 in the form, and computing method are ADDR2[26:0]=0x000_0810+0x100_0000=0x100_0810.
Still take burst access length as 4 as example, then burst bit is low 2 bits.N=4 is with the position ADDR2[26:2 beyond low 2 bits among the ADDR2] divided by n, calculating the gained remainder is that BANK searches sequence number, then BANK searches sequence number=3 ' b000; Calculate gained merchant and ADDR2[1:0] composition BANK offset address ADDR3, i.e. ADDR3[26:0]=0x040_0024.
Therefore, the index that obtains form BANK spatial mappings table equal 3 ' b100,3 ' b000} obtain BANK address BA[2:0]=3 ' b100, optional auto-precharge indication=1, optional BANK additional offset Offset2=0x000_0000.
Address mapping unit calculates BANK total drift ADDR4, and circular is: ADDR4[26:0]=0x040_0024+0x000_0000=0x040_0024.
If the row address width is 15 bits, column address width is 10 bits, then row address row[14:0]=ADDR4[24:10]=15 ' b001_0000_0000_0000; Column address col[9:0]=ADDR4[9:0]=10 ' b00_0010_0100; BANK[2:0]=BA[2:0]=3 ' b100.Only have a sheet to select the space in the present embodiment, corresponding CS address is 0 always.Simultaneously, because auto-precharge is designated as 1, address mapping unit is revised as action type by the read access operation reads to follow auto precharge operation.Comprehensive above-mentioned mapping result, address mapping unit offers consisting of of dram controller input command: action type=read to follow auto precharge operation, global address is CS=0, BANK[2:0]=3 ' b100, row[14:0]=15 ' b001_0000_0000_0000, col[9:0]=10 ' b00_0010_0100.
According to above-described embodiment as seen, the embodiment of the invention compared with prior art, improvements are to carry out address administration and operational administrative based on the form in the DRAM internal memory, in user instruction, comprise relativity shift address information in table index and this form, shine upon according to relativity shift address information in table index and this form, obtain the global address in the input command of DRAM Memory Controller Hub, the DRAM Memory Controller Hub is according to the read-write of the control of the global address in input command DRAM memory grain.Because carry out address administration and operational administrative based on form, therefore a DRAM Memory Controller Hub can carry out flexible address administration to the form of a plurality of different total volumies, different list item width, and keeps higher random access performance.
In a word, the above is preferred embodiment of the present invention only, is not for limiting protection scope of the present invention.Within the spirit and principles in the present invention all, any modification of doing, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (14)
1. the EMS memory management process of a dynamic RAM DRAM is characterized in that, comprising:
Reception comprises the user instruction of action type and operation address information, comprise relativity shift address information in table index and this form in the described operation address information, described table index is in order to which form of indication access, and the relativity shift address information is in order to the side-play amount of indication in described form in this form;
Shine upon the input command that obtains the DRAM Memory Controller Hub according to user instruction and pre-configured form management table and form BANK spatial mappings table, each list item of described form management table comprises the BANK number that a form takies, and the list item indicating user command mappings of described form BANK spatial mappings table is to the address of concrete which BANK of DRAM particle; Comprise global address and action type in the described input command;
The DRAM Memory Controller Hub is according to the reading and writing data of input command control DRAM memory grain.
2. EMS memory management process as claimed in claim 1 is characterized in that, the pre-configured method of described form management table and form BANK spatial mappings table comprises:
Receive configuration information;
According to configuration information burst access length is set, sheet selects space number, BANK address width, row address width and column address width;
According to configuration information form management table and form BANK spatial mappings table are set.
3. EMS memory management process as claimed in claim 2 is characterized in that, the described input command that obtains the DRAM Memory Controller Hub according to user instruction and pre-configured form management table and the mapping of form BANK spatial mappings table comprises:
User's total drift in the computation sheet, computing method are: relativity shift address information in the user's total drift=form in the form;
The BANK number that takies according to burst access length and form is calculated BANK and is searched sequence number and BANK offset address;
Search sequence number composition form BANK spatial mappings table index according to table index and BANK, inquire about described form BANK spatial mappings table according to form BANK spatial mappings table index, obtain BANK address corresponding to user instruction;
Calculate the BANK total drift, computing method are: BANK total drift=BANK offset address;
According to required row address and the total bit of column address, the corresponding figure place from low level in the BANK total drift is mapped as column address and row address.
4. EMS memory management process as claimed in claim 3 is characterized in that, the described BANK number that takies according to burst access length and form calculates that BANK searches sequence number and the BANK offset address comprises:
Determine the low bit of burst according to burst access length, hang down the BANK number that bit position in addition takies divided by form with burst in the user's total drift in the form, remainder is that BANK searches sequence number, and the low bit of burst forms the BANK offset address in the user's total drift in merchant and the form.
5. such as claim 3 or 4 described EMS memory management process, it is characterized in that,
Each list item of described form management table further comprises: the user instruction additional offset;
The computing method of user's total drift are in the described computation sheet: relativity shift address information in the user's total drift=form in the form+user instruction additional offset.
6. such as claim 3 or 4 described EMS memory management process, it is characterized in that,
Described form BANK spatial mappings table further comprises: the BANK additional offset;
The computing method of described calculating BANK total drift are: BANK total drift=BANK offset address+BANK additional offset.
7. such as claim 3 or 4 described EMS memory management process, it is characterized in that,
Described form BANK spatial mappings table further comprises: the auto-precharge indication, and indicate current read-write operation whether to need to follow auto precharge operation, if necessary, then action type is revised as read/write by read/write operation and follows auto precharge operation.
8. the internal storage management system of a dynamic RAM DRAM is characterized in that, comprising:
First device, be used for receiving the user instruction that comprises action type and operation address information, comprise relativity shift address information in table index and the form in the described operation address information, described table index is in order to which form of indication access, and the relativity shift address information is in order to the side-play amount of indication in described form in this form;
The second device, be used for shining upon the input command that obtains the DRAM Memory Controller Hub according to user instruction and pre-configured form management table and form BANK spatial mappings table, each list item of described form management table comprises the BANK number that a form takies, and each list item indicating user command mappings of described form BANK spatial mappings table is to the address of concrete which BANK of DRAM particle; Comprise global address and action type in the described input command;
The 3rd device is used for the DRAM Memory Controller Hub and according to input command the DRAM memory grain is carried out data read-write operation.
9. internal storage management system as claimed in claim 8 is characterized in that, also comprises the pre-configured device of described form management table and form BANK spatial mappings table, is used for:
Receive configuration information;
According to configuration information burst access length is set, sheet selects space number, BANK address width, row address width and column address width;
According to configuration information form management table and form BANK spatial mappings table are set.
10. internal storage management system as claimed in claim 9 is characterized in that, the described input command that obtains the DRAM Memory Controller Hub according to user instruction and pre-configured form management table and the mapping of form BANK spatial mappings table comprises:
User's total drift in the computation sheet, computing method are: relativity shift address information in the user's total drift=form in the form;
The BANK number that takies according to burst access length and form is calculated BANK and is searched sequence number and BANK offset address;
Search sequence number composition form BANK spatial mappings table index according to table index and BANK, inquire about described form BANK spatial mappings table according to form BANK spatial mappings table index, obtain BANK address corresponding to user instruction;
Calculate the BANK total drift, computing method are: BANK total drift=BANK offset address;
According to required row address and the total bit of column address, the corresponding figure place from low level in the BANK total drift is mapped as column address and row address.
11. internal storage management system as claimed in claim 10 is characterized in that, the described BANK number that takies according to burst access length and form calculates that BANK searches sequence number and the BANK offset address comprises:
Determine the low bit of burst according to burst access length, hang down the BANK number that bit position in addition takies divided by form with burst in the user's total drift in the form, remainder is that BANK searches sequence number, and the low bit of burst forms the BANK offset address in the user's total drift in merchant and the form.
12. such as claim 10 or 11 described internal storage management systems, it is characterized in that,
Each list item of described form management table further comprises: the user instruction additional offset;
The computing method of user's total drift are in the described computation sheet: relativity shift address information in the user's total drift=form in the form+user instruction additional offset.
13. such as claim 10 or 11 described internal storage management systems, it is characterized in that,
Described form BANK spatial mappings table further comprises: the BANK additional offset;
The computing method of described calculating BANK total drift are: BANK total drift=BANK offset address+BANK additional offset.
14. such as claim 10 or 11 described internal storage management systems, it is characterized in that,
Described form BANK spatial mappings table further comprises: the auto-precharge indication, and indicate current read-write operation whether to need to follow auto precharge operation, if necessary, then action type is revised as read/write by read/write operation and follows auto precharge operation.
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| CN102662853A (en) * | 2012-03-22 | 2012-09-12 | 北京北大众志微系统科技有限责任公司 | Memory management method and device capable of realizing memory level parallelism |
| US8832158B2 (en) * | 2012-03-29 | 2014-09-09 | International Business Machines Corporation | Fast predicate table scans using single instruction, multiple data architecture |
| CN104346234B (en) | 2013-08-09 | 2017-09-26 | 华为技术有限公司 | A kind of method of internal storage access, equipment and system |
| CN104699414B (en) * | 2013-12-09 | 2018-02-13 | 华为技术有限公司 | A kind of data read-write method and storage device |
| CN105988952B (en) * | 2015-02-28 | 2019-03-08 | 华为技术有限公司 | The method and apparatus for distributing hardware-accelerated instruction for Memory Controller Hub |
| CN107180001B (en) | 2016-03-10 | 2020-02-21 | 华为技术有限公司 | Method and bus for accessing Dynamic Random Access Memory (DRAM) |
| WO2017156747A1 (en) * | 2016-03-17 | 2017-09-21 | 华为技术有限公司 | Memory access method and computer system |
| CN110334032A (en) * | 2019-07-02 | 2019-10-15 | 深圳市德名利电子有限公司 | Flash disk operation method and system based on mixed size unit |
| CN111949213B (en) * | 2020-07-28 | 2022-08-30 | 新华三半导体技术有限公司 | Memory particle access control chip, memory particle access control system and method |
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