CN101968628A - Saturated self-adjusting controller for time-varying delay uncertain system - Google Patents

Saturated self-adjusting controller for time-varying delay uncertain system Download PDF

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CN101968628A
CN101968628A CN201010276412XA CN201010276412A CN101968628A CN 101968628 A CN101968628 A CN 101968628A CN 201010276412X A CN201010276412X A CN 201010276412XA CN 201010276412 A CN201010276412 A CN 201010276412A CN 101968628 A CN101968628 A CN 101968628A
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房方
魏乐
刘吉臻
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North China Electric Power University
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Abstract

The invention discloses a saturated self-adjusting controller for a time-varying delay uncertain system. The controller comprises three parts, namely a self-adjusting limiter, a conventional PID controller and an anti-integral saturator, wherein the conventional PID controller generates a control command uc(t) according to the offset of the controlled parameter y(t) and a target value r(t) thereof; the self-adjusting limiter calculates a steady-state gain K of a time-varying delay uncertain object under the corresponding working condition under the driving of a working condition variable s(t), dynamically generates a limiting value according to the K and r(t), timely limits the uc(t) and generates a final control function u(t); and the anti-integral saturator limits the integral function in the PID controller according to the offset of the uc(t) and u(t) in order to solve the possible integral saturation problem. By applying the invention, an engineering technician can conveniently apply effective control to a class of time-varying delay uncertain systems widely present in the process industry on an industrial control system (device) or in the mode of combining a hardware circuit with software programming so as to improve the safety and operating level of the production process.

Description

The time become the saturated self-adjusting controller of time lag uncertain system
Technical field
The invention belongs to the control technology field, particularly a kind of at the time become the saturated self-adjusting controller of time lag uncertain system.Specifically be a kind of at conventional PID controller output end amplitude is set can self-adjusting limiter, take the saturated measure of anti-integration simultaneously, in order to the optimal controller of guaranteeing that time lag system still has good stability and dynamic property when the operating mode wide variation.
Background technology
Time lag system exists in production runes such as electric power, chemical industry, iron and steel in a large number, belongs to the typical controlled plants in process control field.Generally speaking, along with the change of operating mode, big variation also can take place in the delay time of time lag system, gain etc.Because time-lag process (especially the delay time long and the time process that becomes) can produce significant negative influence to the operation and the control of total system, and this influence is difficult to effectively overcome by the control device of routine, therefore, to the time become time lag uncertain system control problem research be the focus content of academic research and engineering application always.
People such as Su Hongye were " robotization journal " (1999, the 4th phase, 513-517 page or leaf) article of delivering on the robust output FEEDBACK CONTROL of time lag uncertain system " time become " becomes the time lag uncertain system realizes robust stabilizing based on the dynamic output feedback of state observer analysis and synthesis problem when having studied.Proposed to guarantee that this system can pass through the adequate condition of output robust state feedback, and this adequate condition has been converted into the LMI problem, finally constructed output FEEDBACK CONTROL rule by finding the solution two LMIs.But this research more biases toward theoretical analysis and proof, the typical industry object is not carried out necessary simulating, verifying; From the engineering application point of view, the result that this research institute gets is comparatively abstract, complicated, does not also provide the implementation step of strong operability, is unfavorable for that engineering technical personnel grasp and use.
Summary of the invention
Be unsuitable for the problem that engineering is used for solving prior art, the invention provides the saturated self-adjusting controller that becomes the time lag uncertain system when a kind of.
The present invention realizes by the following technical solutions:
Saturated self-adjusting controller comprises conventional PID controller, self-adjusting limiter and anti-integration saturator;
Described conventional PID controller is according to the deviation generation steering order u of controlled parameter y (t) with its desired value r (t) c(t);
Described self-adjusting limiter becomes the steady-state gain K of the uncertain object of time lag under corresponding operating mode when at first calculating under the driving of operating mode variable s (t), dynamically generate amplitude limit value according to K and r (t) then, in good time to u c(t) limit and produce final control action u (t);
Described anti-integration saturator is according to u c(t) deviation with u (t) limits the integral action in the described conventional PID controller.
Concrete implementation step is as follows:
1. become the steady-state gain of the uncertain controlled device of time lag during identification;
With the differential equation represent the time to become the general type of time lag uncertain system as follows:
b 0 y ( t ) ( m ) + b 1 y ( t ) ( m - 1 ) + · · · + b m - 1 y ( t ) ( 1 ) + b m y ( t ) = a 0 u ( t - τ ) ( n ) + a 1 u ( t - τ ) ( n - 1 ) + · · · + a n - 1 u ( t - τ ) ( 1 ) + a n u ( t - τ ) , n ≥ m
Wherein, u (t) is system's input variable, and y (t) is system's output variable, and t is a time variable, b 0~b m, a 0~a nBe the coefficient of differential equation all-order derivative, τ is time lag (delaying) time.For the time become the time lag uncertain system, τ is always greater than zero and change within the specific limits.
This system's output is defined as the steady-state gain of input:
Figure BSA00000262809200022
The steady-state gain of considering controlled device may change in the variable working condition process on a large scale, generally according to operating mode by low (as 30% operating mode) → in three gains of (as 60% operating mode) → high (as 90% operating mode) identification K L, K M, K H, the gain under other operating mode is asked for by the method for interpolation.
2. design the self-adjusting limiter;
The self-adjusting limiter is output as u (t), is input as the output u of conventional PID controller c(t), its pass is:
u ( t ) = u c ( t ) , | u c ( t ) | ≤ K c | r ( t ) K | K c · r ( t ) K , | u c ( t ) | > K c | r ( t ) K | - - - ( 1 )
Wherein, r (t) is control target (set-point), and K is the steady-state gain of controlled device, K cFor amplitude limit is adjusted coefficient,
Figure BSA00000262809200032
Be the amplitude limit value of limiter.Obviously, amplitude limit value is with r (t), K and K cVariation change.K cCan be provided with as required, but in the systematic steady state precision under guaranteeing action of small disturbance not the stability to system exert an influence K cGenerally get about 1.1.
K chooses steady-state gain K based on basic, normal, high three operating points that pick out L, K M, K H, under the driving of operating mode variable s (t) (embodying the physical quantity of working conditions change), try to achieve by the method for interpolation as the generated energy in the thermal power generation process, steam flow etc.:
K = K L , s ( t ) < S L K M - K L S M - S L [ s ( t ) - S L ] + K L , S L &le; s ( t ) &le; S M K H - K M S H - S M [ s ( t ) - S M ] + K M , S M < s ( t ) &le; S H K H , S H < s ( t ) - - - ( 2 )
Wherein, S L, S M, S HCorresponding operating mode variable s (t) is at the numerical value of basic, normal, high three operating points respectively, and this numerical value can check in from systems design specification or operating standard.
Described self-adjusting limiter has three outside input variable: r (t), u c(t) and s (t), there are 7 inside that parameter is set: K L, K M, K H, S L, S M, S H, K c, limiter output u (t) calculates according to formula (2) and (1) successively.
3. prepare conventional PID controller;
Conventional PID controller can be expressed as:
u c ( t ) = K P e ( t ) + K I &Integral; 0 t e ( t ) dt + K D de ( t ) dt - - - ( 3 )
Wherein, u c(t) be controller output, e (t)=r (t)-y (t) is the deviation signal of controlled parameter, K P, K I, K DBe respectively ratio, integration, differential coefficient.
The PID controller parameter can adopt theory or engineering method to adjust, and selects according to real needs in the application.
4. add anti-integration saturator;
Anti-integration saturator is chosen signal from the input and output side of self-adjusting limiter respectively and is carried out anti-integration saturation arithmetic:
e a(t)=K a[u c(t)-u(t)] (4)
Wherein, e a(t) be the output of anti-integration saturator, K aFor anti-integration saturation coefficient, get K usually a=10K I
The output of anti-integration saturator joins with negative interaction in the integral action of PID controller, and then the output of PID controller becomes:
u c ( t ) = K P e ( t ) + &Integral; 0 t [ K I e ( t ) - e a ( t ) ] dt + K D de ( t ) dt - - - ( 5 )
Described saturated self-adjusting controller can the mode by software programming or configuration be realized in the overwhelming majority's industrial control system (device), if the memory capacity exclusive disjunction of industrial control system (device) load is limited, the mode that can adopt hardware circuit to combine with software programming realizes saturated self-adjusting controller.
Described hardware circuit comprises central processing unit, I/O interface, communication interface, clock synchronization circuit, EPROM, RAM, failure detector circuit and power-fail detection circuit.
Controller architecture of the present invention is simple, closing to reality ruuning situation, is easy to Project Realization.Engineering technical personnel can become the time lag uncertain system to a time-like that extensively exists in the process industry easily and implement effectively control, improve the security and the operation level of production run.
Description of drawings
Below in conjunction with accompanying drawing the present invention is elaborated:
Fig. 1 be at the time become the principle assumption diagram of the saturated self-adjusting controller of time lag uncertain system;
Fig. 2 is for realizing the hardware circuit figure of saturated self-adjusting controller;
Fig. 3 is the test curve of different operating mode change of following time time lag uncertain system trace performances;
Fig. 4 is the test curve of different operating mode change of following time time lag uncertain system Immunity Performances.
Reference numeral:
The conventional PID controller of 1-self-adjusting limiter, 2-, the anti-integration saturator of 3-,
Become the time lag uncertain system during 4-.
Embodiment
The present invention propose at the time become the time lag uncertain system saturated self-adjusting controller can in the overwhelming majority's industrial control system (device), the mode by software programming or configuration realize.
If the memory capacity exclusive disjunction of industrial control system (device) load is limited, the mode that needs to adopt hardware circuit to combine with software programming realizes saturated self-adjusting controller.This hardware circuit except that comprising central processing unit, also comprises I/O interface, communication interface, clock synchronization circuit, EPROM, RAM, failure detector circuit, power-fail detection circuit in the circuit as shown in Figure 2.
Wherein, the I/O interface is used to connect human-computer interaction devices such as keyboard, display; Communication interface is used for carrying out data transmission with industrial control system (device); Clock synchronization circuit is used for data acquisition and the time synchronized of transmitting; EPROM is used to store the output rule by conventional PID controller, self-adjusting limiter and the anti-integration saturator of software programming; RAM is used to store the real time data from the scene; Failure detector circuit is used for the program that automatically resets when computing is failed; Power-fail detection circuit is used for the status information of protection central processing unit when voltage die or instant cut-off.Communication interface becomes the real time data y (t) and the s (t) of the uncertain object of time lag when the production scene obtains, send back to industrial control system (device) by communication interface again through the control action u (t) that produces after the central processing unit computing, and then drive topworks's enforcement control.
Become the time lag uncertain system when certain fuel-burning power plant 600MW unit system unit main steam temperature controlled device is typical, its transfer function model at 3 operating points is respectively:
30% operating mode: S=160kg/s
60% operating mode:
Figure BSA00000262809200062
S=300kg/s
90% operating mode:
Figure BSA00000262809200063
S=500kg/s
Wherein, s is steam flow (kg/s), represents the physical quantity of controlled device working conditions change, controlled variable y be main steam temperature (℃), controlled quentity controlled variable u is the spray flow (kg/s) of attemperator.Based on above-mentioned model, realize that the concrete steps of the saturated self-adjusting controller that the present invention provides are as follows:
1) be provided with and store inner parameter:
K L=5.1,K M=2.6,K H=1.2,S L=160,S M=300,S H=500,K c=1.1
Inner parameter will be used to calculate in real time according to formula (1) and formula (2) amplitude limit value of self-adjusting limiter;
2), realize the self-adjusting limiter according to the form of formula (1) and formula (2) in the mode of software programming or configuration; Form according to formula (4) and formula (5) realizes anti-integration saturator and the PID controller that adds anti-integration saturation respectively;
3) be respectively in adjust out the parameter of PID controller of the model of 90% operating point according to controlled device: K P=0.1, K I=0.02, K D=0.03, the corresponding K that obtains a=10K I=0.2;
4) introduce the measured value y (t) of the desired value r (t) of controlled parameter, controlled parameter and the parameter s (t) of change time lag uncertain system working conditions change when represent, form according to Fig. 1, finish self-adjusting limiter 1, conventional PID controller 2, anti-integration saturator 3 and be connected, can realize the saturated self-adjusting control of system with the I/O of controlled device.
In order to check the performance of the saturated self-adjusting controller that the present invention proposes, carry out following emulation testing:
1. trace performance test
Respectively at 30%, 60%, 90% 3 operating point, the desired value r of controlled parameter is increased to controlled device response curve under 1, three operating point when the t=10s by 0 step relativity as shown in Figure 3.From simulation curve as can be seen, in the gain of controlled device, inertia time constant, delay time when all wide variation being arranged, saturated self-adjusting controller not only can be guaranteed the stable of system responses process, can also make each response process have quick, level and smooth response performance.It is to be noted, among the figure under 90% operating mode initial segment response speed of response curve very fast, but the response speed of posterior segment will be slower than 30% and 60% operating mode, trace it to its cause, the steady-state gain of controlled device is 1.1 under 90% operating mode, significantly descends than other two kinds of operating modes (steady-state gain of 60% operating mode is that the steady-state gain of 1.6,30% operating modes is 2.1), simultaneously, the PID controller parameter that adopts in the middle of the whole test does not have variation (to be K P=0.1, K I=0.02, K D=0.03), therefore, the full gain of open cycle system is minimum under 90% operating mode, adds the effect of self-adjusting limiter, makes response speed integral body under 90% operating mode less than 30% and 60% operating mode.Can consider to change the conventional PID controller among the present invention into self-adaptive PID controller as changing this kind situation, concrete grammar can be consulted pertinent literature, repeats no more herein.
2. Immunity Performance test
Keep the desired value of controlled parameter constant, respectively at 30%, 60%, 90% 3 operating point, when t=200s, adding amplitude at the input end of controlled device is 0.1 step disturbance signal, and the relativity of controlled device response curve as shown in Figure 4 under three operating points.From simulation curve as can be seen, saturated self-adjusting controller has good Immunity Performance when all wide variation being arranged in gain, inertia time constant, the delay time of controlled device.
The above is the preferred embodiments of the present invention only, is not limited to the present invention, and for a person skilled in the art, the present invention can realize becoming when different effective control of time lag uncertain system by Tuning PID Controller device parameter again.Within the spirit and principles in the present invention all, any modification of being done, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.

Claims (3)

1. become the saturated self-adjusting controller of time lag uncertain system the time, it is characterized in that, comprise conventional PID controller, self-adjusting limiter and anti-integration saturator;
Described conventional PID controller is according to the deviation generation steering order u of controlled parameter y (t) with its desired value r (t) c(t);
Described self-adjusting limiter becomes the steady-state gain K of the uncertain object of time lag under corresponding operating mode when at first calculating under the driving of operating mode variable s (t), dynamically generate amplitude limit value according to K and r (t) then, in good time to u c(t) limit and produce final control action u (t);
Described anti-integration saturator is according to u c(t) deviation with u (t) limits the integral action in the described conventional PID controller.
2. saturated self-adjusting controller as claimed in claim 1 is characterized in that, described self-adjusting limiter has three outside input variables: controlled parameter objectives value r (t), conventional PID controller output u c(t) and operating mode variable s (t);
Described self-adjusting limiter has seven inside that parameter is set: the steady-state gain K of controlled device when hanging down operating mode L, the steady-state gain K of controlled device during middle operating mode M, the steady-state gain K of controlled device during high operating mode H, the numerical value S of operating mode variable during low operating mode L, the numerical value S of operating mode variable during middle operating mode M, the numerical value S of operating mode variable during high operating mode H, amplitude limit adjusts COEFFICIENT K c
Described self-adjusting limiter has an output variable u (t);
The output u (t) of self-adjusting limiter and input u c(t) funtcional relationship is:
u ( t ) = u c ( t ) , | u c ( t ) | &le; K c | r ( t ) K | K c &CenterDot; r ( t ) K , | u c ( t ) | > K c | r ( t ) K |
Wherein, the amplitude limit value of limiter
Figure FSA00000262809100012
With r (t), K and K cVariation and change; K cBe provided with as required; K chooses steady-state gain K based on basic, normal, high three operating points that picked out by production data L, K MAnd K H, under the driving of operating mode variable s (t), try to achieve by the method for interpolation:
K = K L , s ( t ) < S L K M - K L S M - S L [ s ( t ) - S L ] + K L , S L &le; s ( t ) &le; S M K H - K M S H - S M [ s ( t ) - S M ] + K M , S M < s ( t ) &le; S H K H , S H < s ( t ) .
3. saturated self-adjusting controller as claimed in claim 1, it is characterized in that, described saturated self-adjusting controller is under the limited situation of the memory capacity exclusive disjunction load of industrial control system or device, and the mode that can adopt hardware circuit to combine with software programming realizes;
Described hardware circuit comprises central processing unit, I/O interface, communication interface, clock synchronization circuit, EPROM, RAM, failure detector circuit and power-fail detection circuit.
CN201010276412XA 2010-09-08 2010-09-08 Saturated self-adjusting controller for time-varying delay uncertain system Pending CN101968628A (en)

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CN104252135A (en) * 2014-10-10 2014-12-31 四川理工学院 Intelligent integration method for anti-integral windup and overshoot suppression of PID (Proportional, Integral and Derivative) control system
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Application publication date: 20110209