CN101958719A - Method and system for encoding by using convolution Turbo codes - Google Patents
Method and system for encoding by using convolution Turbo codes Download PDFInfo
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- CN101958719A CN101958719A CN2009101593200A CN200910159320A CN101958719A CN 101958719 A CN101958719 A CN 101958719A CN 2009101593200 A CN2009101593200 A CN 2009101593200A CN 200910159320 A CN200910159320 A CN 200910159320A CN 101958719 A CN101958719 A CN 101958719A
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Abstract
The invention discloses a method and system for encoding by using convolution Turbo codes. The method comprises the steps of: encoding an input original information bit sequence; after obtaining the encoded original information bit sequence and a check bit sequence, carrying out interleaving treatment and mapping to a constellation diagram for transmission. Before, when or after carrying out the interleaving treatment, the method further comprises the step of: scrambling the encoded original information bit sequence to ensure that different units formed by the interleaved original information bit sequence during the mapping have average bit reliability, or/and, scrambling the encoded check bit sequence to ensure that different units formed by the interleaved check bit sequence during the mapping have average bit reliability. The method and the system provided by the invention can improve the stray distribution characteristic of the bit reliability of subsequently mapping the constellation diagram.
Description
Technical field
The present invention relates to chnnel coding and modulation technique in the wireless mobile communications field, particularly a kind of employing CTC Methods for Coding and system.
Background technology
Development along with wireless mobile telecommunication technology, mobile global microwave access intercommunication (WiMAX has appearred, World wide Interoperability for Microwave Access) system, the WiMAX system is that a kind of employing wireless mode replacement is wired, realizes " last km " broadband access technology.The WiMAX system has merged mobile communications network and fixed broadband network, by adopting the network configuration of wireless access wide band technology and flexibility and changeability on a large scale, provides the mobile broadband of convenient high speed to connect.The WiMAX system is based on the IEEE802.16 series standard at microwave and millimeter wave frequency band proposition, and target is on the basis of fixed wireless access research on standard, supports the mobility of broadband access.In the WiMAX system, because CTC (CTC) is the Turbo code that a class has some convolution schemes to be used, it has the high-performance error correction characteristic, so be included in the IEEE802.16 series standard.The WiMAX system is a kind of implementation in the information transmission system.
Fig. 1 is the CTC coder structure schematic diagram of prior art, comprising: CTC encoder 101, block interleaver 102 and card punch 103.Card punch 103 can also be called the bit selector, and block interleaver 102 abbreviates interleaver 102 in this application as.In present specification, the CTC encoder of employing is that 1/3 encoder describes, and still, the CTC encoder that present specification limited is not defined as 1/3 encoder.
Wherein, the bit sequence of input is by behind the coding of CTC encoder 101, bit sequence behind the output encoder, the bit sequence of coding back output is 3 times of the bit numbers of the bit sequence of input, the bit sequence of exporting behind 102 pairs of codings of interleaver carries out interleaving treatment, and the bit sequence after obtaining interweaving is selected the bit sequence after interweaving according to required transmission rate by card punch 103 at last, carry out the modulation symbol mapping according to modulation constellation, finish whole Turbo cataloged procedure.
CTC adopts duobinary system circulation recursive systematic convolutional code to become demal as it, just 1/3 CTC encoder 101 specifically comprises CTC interleaver 105 and composition encoder 104, wherein, A among Fig. 1 and B represent the bit sequence of two inputs, bit sequence A and bit sequence B need carry out twice coding: at first carry out duobinary system circulation recursive system convolutional encoding by 104 pairs of bit sequence A of composition encoder and bit sequence B, obtain check bit sequence Y
1With check bit sequence W
1, after bit sequence A and bit sequence B passed through interweaving of CTC interleaver 105 then, the bit sequence A and the bit sequence B that enter after 106 pairs of composition encoders interweave carried out duobinary system circulation recursive system convolutional encoding again, obtain check bit sequence Y
2With check bit sequence W
2With bit sequence A, bit sequence B, check bit sequence Y
1, check bit sequence W
1, check bit sequence Y
2With check bit sequence W
2Bit sequence as the output of coding back.K original information bits or N in the bit sequence of input, have been comprised to original information bits, be K=2 * N, wherein, parameter commonly used in the real system is: K is 8 multiple, and N is 4 multiple, and N satisfies more than or equal to 24, smaller or equal to 4096, the bit sequence of coding back output comprises that K original information bits or N to original information bits, also comprise the check bit number, and the bit sequence of coding back output is 3 times of the number of bits of the bit sequence imported.In addition, that input CTC encoder 101 should be bit sequence, for example an A
0, B
0, A
1, B
1..., A
N-1, B
N-1, be that the CTC encoder automatically splits into two input bit sequence A and B, i.e. A=A to this sequence
0, A
1..., A
N-1And B=B
0, B
1..., B
N-1
The specific implementation process of interleaver 102 such as the module among Fig. 1 106 realize, comprise bit dispenser (bit separation), sub-block interleaver (subblock interleaving) and three parts of bit groupings device (bitgrouping).Wherein, the bit sequence of output was assigned on six sub-pieces after the bit dispenser will be encoded, and these six sub-pieces are followed successively by A, B, Y
1, Y
2, W
1And W
2Sub-block interleaving interweaves these six sub-pieces respectively in each sub-piece, the interleaved order that each sub-piece adopted is identical, establishes A, B, Y
1, Y
2,, W
1And W
2After six sub-pieces passed through sub-block interleaving respectively, the bit sequence that obtains was designated as A ', B ', Y '
1, Y '
2, W '
1And W '
2, have
A’，B’，Y’
1，Y’
2，W’
1，W’
2＝
A '
0, A '
1..., A '
N-1, B '
0, B '
1..., B '
N-1, Y '
1,0, Y '
1,1..., Y '
1, N-1, Y '
2,0, Y '
2,1..., Y '
2, N-1, W '
1,0, W '
1,1..., W '
1, N-1, W '
2,0, W '
2,1..., W '
2, N-1After six sub-pieces of after the bit groupings device will interweave this divide into groups, send to card punch 103.
Fig. 2 is the realization block diagram of interleaver 102 in the prior art, comprises that will the encode bit stream of back output of bit dispenser assigns to six sub-pieces; Six sub-block interleavers, the output of each sub-block interleaver are pooled on the string sequence; The bit groupings device will be exported in proper order through A ' and two sub-pieces of B ' of interweaving, will be through the Y ' that interweaves
1And Y '
2Two alternately outputs of sub-piece will be through the W ' that interweaves
1And W '
2Two alternately outputs of sub-piece.In Fig. 2, the sequence of bit groupings device output is A '
0, A '
1..., A '
N-1, B '
0, B '
1..., B '
N-1, Y '
1,0, Y '
2,0, Y '
1,1, Y '
2,1..., Y '
1, N-1, Y '
2, N-1, W '
1,0, W '
2,0, W '
1,1, W '
2,1..., W '
1, N-1, W '
2, N-1
Then, just can will punch to the bit sequence after interweaving according to required transmission rate, promptly carry out the selection of bit sequence by card punch 103, carry out modulation symbol modulation according to modulation constellation at last after, be mapped as planisphere and transmitted.
On the basis based on Fig. 2, also have a kind of realization, be about to Y ' through interweaving
1And Y '
2Two alternately outputs of sub-piece will be through the W ' that interweaves
1And W '
2After two sub-pieces are alternately exported.Again to the bit sequence B ' or/and Y '
1And Y '
2Two sub-pieces replace the sequence of output or/and the W ' through interweaving
1And W '
2Two sub-pieces replace the sequence of exporting and carry out the bit of ring shift left setting or the bit that ring shift right is set respectively, as shown in Figure 3.Wherein, k is a positive integer, to the bit sequence B ', Y '
1And Y '
2Two sequence and W ' that sub-piece is alternately exported through interweaving
1And W '
2Two sub-pieces are when alternately the sequence of output is carried out left cyclic shift (can certainly right cyclic shift) respectively, can be identical for the k value of different sub-piece displacements, and also can difference.In Fig. 3, Y '
1And Y '
2Two sub-pieces alternately the sequence of output to carry out the bit that ring shift left sets be 1, certainly, also can be set to other values.
In the information transmission system, in order not increase bandwidth and to improve data transmission efficiency, card punch 103 adopts the scheme of M rank quadrature amplitude modulation usually when the bit stream after interweaving is modulated.But high order modulation itself is a kind of unequal error protection modulation, and for M＞4, bit error rate (BER) performance that is mapped to each bit on the constellation point of M rank is different.It is less to be in the some energy that encloses in the planisphere, the influence that is interfered easily, the bit reliability that constitutes these constellation point is relatively poor, and it is higher to constitute the energy of planisphere peripheral point by contrast, the influence that is difficult for being interfered, the bit reliability that constitutes these constellation point is better.
Fig. 4 is mapped to schematic diagram on the 16 rank quadrature amplitude modulation constellation point for the bit stream of prior art after will interweaving, the mapping of the bit stream after interweaving is i1i2q1q2 in proper order, i1 has got the 0 and 1 respectively corresponding constellation point of right half-sum left side half-plane, i2 got 0 and 1 corresponding respectively in the middle of and the constellation point of both sides.Therefore, i1 gets 1 constellation point and gets average distance between 0 constellation point and is greater than i2, thereby makes the bit reliability of the bit reliability of i1 greater than i2.
When the bit sequence of exporting behind 102 pairs of codings of interleaver carries out interleaving treatment, with the original information bits sequence in the bit sequence of coding back output, just above-mentioned A and B do as a whole, adopt identical interleaving mode that it is interweaved, A ' after process interweaves and B ' are when card punch 103 modulation, when just carrying out the bit mapping of high order modulation, be intact to the bit modulation among the A ' successively, again to the bit modulation among the B '.Like this, if the bit A among the A '
i' (i value 0,1 ..., N-1), in present specification, A
i' and A '
iImplication is identical, and is applicable to other sub-piece B ', Y '
1, Y '
2, W '
1, W '
2Deng, be mapped on the constellation point of high reliability the B among the B '
i' (i value 0,1 ..., N-1) also can be mapped on the constellation point of high reliability; If the bit A among the A '
i' be mapped on the constellation point of low reliability the B among the B '
i' also can be mapped on the constellation point of low reliability.Therefore, for from (Ai ', Bi ') the group unit of Xing Chenging, the bit reliability inequality that different group unit has, bit reliability height after the group cells modulate that has, bit reliability after the group cells modulate that has is low, and the planisphere bit reliability that causes final modulation to obtain distributes even inadequately or spuious inadequately.Like this, not only the bit reliability that does not satisfy in the group unit is average, and also the bit reliability that does not satisfy between the group unit is average.On the other hand, average for the bit reliability that satisfies between the group unit, be further noted that the bit reliability that will allow between the bit at the same position place in the continuous group unit is average.For example, for group unit (A continuous in the raw information
I-1, B
I-1), (A
i, B
i), (A
I+1, B
I+1) ..., if be in the A at same position 1 place
I-1, A
i, A
I+1All be mapped on the constellation point of high reliability, and be in the B at same position 2 places
1, B
i, B
I+1All be mapped on the constellation point of low reliability, it is average then to belong to the bit reliability that does not satisfy between the group unit equally.
Similar principle is through the W after interweaving
1' in bit and Y
1' in the group unit that constitutes of bit, and W
2' in bit and Y
2' in the group unit that constitutes of bit, also have the uneven problem of bit reliability after the modulation, thereby the performance that also finally causes modulating the planisphere bit reliability aspect that obtains reduces.
Summary of the invention
In view of this, the invention provides a kind of employing CTC Methods for Coding, this method can improve the spuious distribution character of the bit reliability of follow-up mapped constellation figure when carrying out the Turbo coding.
The present invention also provides a kind of system that adopts the CTC coding, and this system can improve the spuious distribution character of the bit reliability of follow-up mapped constellation figure when carrying out the Turbo coding.
For achieving the above object, the technical scheme of the embodiment of the invention specifically is achieved in that
A kind of employing CTC Methods for Coding, original information bits sequence to input is encoded, after the original information bits sequence and check bit sequence after obtaining encoding, after carrying out interleaving treatment, be mapped on the planisphere and send, before carrying out interleaving treatment, simultaneously or afterwards, this method also comprises:
Original information bits sequence behind the coding is carried out scrambling, make that original information bits sequence after mapping the time interweaves forms the bit reliability of unit is not average on the same group, or/and the check bit sequence behind the coding is carried out scrambling, make that check bit sequence after mapping the time interweaves forms the bit reliability of unit is not average on the same group.
A kind of system that adopts the CTC coding, comprise: be used for the original information bits sequence CTC encoder of encoding input, send to after original information bits sequence behind the output encoder and the check bit sequence after interleaver interweaves, be mapped on the planisphere by card punch and send, it is characterized in that, also comprise scrambling module in the interleaver of this system, be used for the original information bits sequence behind the coding is carried out scrambling, make that original information bits sequence after mapping the time interweaves forms the bit reliability of unit is not average on the same group, or/and the check bit sequence behind the coding is carried out scrambling, make that check bit sequence after mapping the time interweaves forms the bit reliability of unit is not average on the same group.
By such scheme as seen, the present invention is in adopting the CTC cataloged procedure, after interleaver carries out interleaving treatment to the bit sequence of exporting after encoding, the original information bits sequence that will obtain after will being interweaved by interleaver is carried out scrambling, make that the original information bits sequence forms the bit reliability of unit is not average on the same group, the check bit sequence that will obtain after or/and will be interweaved by interleaver is carried out scrambling, make that the check bit sequence forms the bit reliability of unit is not average on the same group.Further, the present invention can also be before interleaver carry out interleaving treatment to the bit sequence of the back output of encoding or simultaneously, and the bit sequence of the back output of encoding is carried out scrambling, make that the original information bits sequence forms the bit reliability of unit is not average on the same group; Or/and make that the check bit sequence forms the bit reliability of unit is not average on the same group.Therefore, pass through card punch again through the bit sequence after interweaving after the scrambling after, carry out the planisphere mapping, just can improve the spuious distribution character of the bit reliability of follow-up mapped constellation figure.In the present invention, the bit reliability of unit is not meant that on average the bit reliability between the group unit is average on the same group, or/and the bit reliability in the group unit is average.Bit reliability when the bit reliability of group between the unit on average is meant a group unit made as a whole or a least unit is average, or/and the bit reliability between the bit at the same position place in the unit is not average on the same group.
Description of drawings
Fig. 1 is the CTC coder structure schematic diagram of prior art;
Fig. 2 is realization one block diagram of interleaver 102 in the prior art;
Fig. 3 is realization two block diagrams of interleaver 102 in the prior art;
Fig. 4 is mapped to schematic diagram on the 16 rank quadrature amplitude modulation constellation point for the bit stream of prior art after will interweaving;
Fig. 5 is an employing CTC Methods for Coding flow chart provided by the invention;
Fig. 6 is the system schematic of employing CTC coding provided by the invention;
Fig. 7 is embodiment one schematic diagram that the original information bits sequence after interweaving is carried out scrambling provided by the invention;
Embodiment one schematic diagram that Fig. 7 a carries out scrambling for the original information bits sequence to after interweaving that the present invention is based on Fig. 3 and provide;
Fig. 8 is embodiment three schematic diagrames that the original information bits sequence after interweaving carried out scrambling provided by the invention;
Fig. 8 a the present invention is based on Fig. 3 embodiment three schematic diagrames that the original information bits sequence after interweaving carried out scrambling provided by the invention;
Embodiment four schematic diagrames that Fig. 9 carries out scrambling for the original information bits sequence to after interweaving that the present invention is based on Fig. 3 and provide;
The embodiment schematic diagram that Figure 10 carries out scrambling for the check bit sequence to after interweaving that the present invention is based on Fig. 3 and provide;
The method contrast simulation result schematic diagram that Figure 11 provides for method provided by the invention and background technology.
Embodiment
For making purpose of the present invention, technical scheme and advantage clearer, below with reference to the accompanying drawing embodiment that develops simultaneously, the present invention is described in further detail.
At existing CTC cataloged procedure, do not consider the spuious distribution character of the bit reliability of follow-up mapped constellation figure, so cause existing through behind the CTC cataloged procedure, the group unit that the original information bits sequence forms is or/and the bit reliability inequality of the group unit that the check bit sequence forms when carrying out follow-up mapped constellation figure, and causes the bit reliability of the planisphere that obtains not high.The reliability here is meant in mapped constellation figure, and containing a certain mapped bits and be 0 constellation point and containing this mapped bits is average distance between 1 the constellation point, and the modulation reliability of this mapped bits is high more if this average distance is big more.Because at existing CTC cataloged procedure, will encode and the bit reliability of follow-up mapped constellation figure joins together to consider, therefore influenced the bit error code performance of the information transmission system and frame performance by mistake.
Method and system provided by the invention, convolution turbo sign indicating number cataloged procedure and follow-up mapped constellation figure are combined, that is: after interleaver carries out interleaving treatment to the bit sequence of exporting after encoding, the original information bits sequence that will obtain after will being interweaved by interleaver is carried out scrambling, make that the original information bits sequence forms the bit reliability of unit is not average on the same group, the check bit sequence that will obtain after or/and will be interweaved by interleaver is carried out scrambling, make that the check bit sequence forms the bit reliability of unit is not average on the same group.Like this, in follow-up mapped constellation figure process, no matter adopt which kind of order of modulation, the present invention can be with the bit sequence after the interleaving treatment, after readjusting its modulating sequence of bits reliability, be mapped on the constellation point, thereby improve the spuious distribution character of the bit reliability of follow-up mapped constellation figure, improve the bit error code performance and the mistake frame performance of the information transmission system.
In the present invention, also can be before interleaver carry out interleaving treatment to the bit sequence of the back output of encoding or simultaneously, the bit sequence of the back output of encoding is carried out scrambling, make that the original information bits sequence forms the bit reliability of unit is not average on the same group; Or/and make that the check bit sequence forms the bit reliability of unit is not average on the same group.
In the present invention, the bit reliability of unit is not meant that on average the bit reliability between the group unit is average on the same group, or/and the bit reliability in the group unit is average.Bit reliability when the bit reliability of group between the unit on average is meant a group unit made as a whole or a least unit is average, or/and the bit reliability between the bit at the same position place in the unit is not average on the same group.
In the present invention because before transmitting terminal carries out interleaving treatment to the bit sequence of the back output of encoding, simultaneously or afterwards, carried out the scrambling processing, and then be mapped as planisphere and send to receiving terminal; So when receiving terminal receives this planisphere, recover also will carry out corresponding descrambling before the bit sequence,, be not repeated here because this is a general knowledge as well known to those skilled in the art.
Below be that example is elaborated after interleaver carries out interleaving treatment to the bit sequence of the back output of encoding, to carry out scrambling again.
Fig. 5 is an employing CTC Methods for Coding flow chart provided by the invention, and its concrete steps are:
The bit sequence of step 501, input is by behind the coding of CTC encoder 101, output bit sequence, the bit number of the bit sequence of coding back output be generally the input bit sequence bit number N doubly, N is the positive integer greater than 1; The inverse of N is commonly referred to as original coding speed.
This step is a prior art, is not repeated here;
Comprise two original information bits sequence A and B in the bit sequence of coding output, carry out two check bit sequence W that duobinary system circulation recursive system convolutional encoding obtains by two original information bits sequences
1And Y
1, carry out two check bit sequence W that interweaving of CTC interleaver 105 and duobinary system circulation recursive system convolutional encoding obtain by two original information bits sequences
2And Y
2
This step is a prior art, is not repeated here;
Comprise two original information bits sequence A that interweave through the bit sequence that obtains after interweaving ' and B ', four check bit sequence W that interweave and obtain
1' and Y
1', and W
2' and Y
2';
The bit reliability of the group unit that the original information bits sequence A that step 503, interleaver will obtain after will interweaving ' or/and the original information bits sequence B ' is carried out scrambling, makes the original information bits sequence A ' and original information bits sequence B ' forms is average; Or/and the check bit sequence W that will obtain after will interweaving
1' and check bit sequence Y
1' or/and check bit sequence W
2' and check bit sequence Y
2' carry out scrambling, make check bit sequence W
1' and check bit sequence Y
1' bit reliability of the group unit that forms is average, makes check bit sequence W
2' and check bit sequence Y
2' bit reliability of the group unit that forms is average;
In this step, can adopt multiple mode respectively the original information bits sequence that obtains after interweaving to be carried out scrambling, and the check bit sequence that obtains after interweaving be carried out scrambling, follow-up being elaborated;
After step 504, the punching of process card punch, the bit sequence that the employing high-order modulating will be carried out after the scrambling is modulated on the planisphere.
Fig. 6 is the system schematic of employing CTC coding provided by the invention, the structure of itself and Fig. 1 is identical, only in module 106, increased scrambling module, be used for original information bits sequence A to obtaining after interweaving ' and B ' carry out scrambling, make the original information bits sequence A, the bit reliability of the group unit among the B is average, or/and the check bit sequence W that will obtain after will interweaving
1' and Y
1' or/and check bit sequence W
2' and Y
2' carry out scrambling, make the bit reliability of the group unit in the check bit sequence average, again the bit sequence after the scrambling is sent to card punch at last and modulate.
Certainly, this scrambling module also can be before the bit sequence behind the interweaving encoding or simultaneously, to the original information bits sequence A ' and original information bits sequence B ' carries out scrambling.
Below specify and how in step 503, respectively the original information bits sequence that obtains after interweaving to be carried out scrambling, and the check bit sequence that obtains after interweaving is carried out scrambling.
The bit sequence of existing convolution turbo sign indicating number is assumed to bit sequence A and B, and the bit that A comprises is: A
0, A
1..., A
N-1, promptly tactic N original information bits, wherein N is a positive integer; The bit that B comprises is: B
0, B
1..., B
N-1, promptly tactic N original information bits, wherein N is a positive integer.In like manner, the bit sequence after can encoding is:
A，B，Y
1，Y
2，W
1，W
2＝
A
0，A
1，……，A
N-1，B
0，B
1，……，B
N-1，Y
1，0，Y
1，1，……，Y
1，N-1，
Y
2，0，Y
2，1，……，Y
2，N-1，W
1，0，W
1，1，……，W
1，N-1，W
2，0，W
2，1，……，W
2，N-1。
According to background technology, pass through the bit sequence behind the coding and comprised K original information bits (K=2N).In fact, this K original information bits and bit sequence A and B have relation one to one.Be that the order of this K original information bits before the coding that carries out 1/3CTC encoder 101 is: A
0, B
0, A
1, B
1..., A
N-1, B
N-1
K original information bits passed through after the coding of 1/3CTC encoder 101, and putting in order of original information bits changes to: A, B=A
0, A
1..., A
N-1, B
0, B
1..., B
N-1
Through after the interweaving of interleaver 102, putting in order of original information bits becomes again
A’，B’＝A’
0，A’
1，……，A’
N-1，B’
0，B’
1，……，B’
N-1。
In the described convolution turbo sign indicating number of background technology process, the specific algorithm that the bit sequence behind 102 pairs of codings of concrete interleaver interweaves is as follows.
Make T
kBe interim dateout address, AD[i] be the data address of i bit before interweaving of output, BRO
m(y) m the bit inverted order of expression y, y is m the numerical value that bit is represented, as: BRO
3(6)=3,6 binary form is shown 110, and 3 binary form is shown 011.The i value is the integer from 0 to N-1.Usually, the m value is from 2 to 20 integer, and the J value is from 2 to 10 integer.For a certain specific N value, the value of m and J is by standard code, normally a value of determining.It should be noted that: k in the interleaving process and aforesaid information bit number k are irrelevant.
i＝0；
k＝0；
while(i＜N)
If?T
k＜N
AD[i]＝T
k；
i++；
k++；
else
k++；
end
end
This shows, the original information bits sequence A and interweave after original information bits A ' between corresponding relation by AD[i] decision, and AD[i] be calculating by complexity, thereby fully breaing up of bit sequence exported in the back that guaranteed to interweave, so that the original information bits sequence A after continuous bit is mapped to and interweaves in the original information bits sequence A ' in after, have fully big spacing.
Correspondingly, the original information bits sequence B and interweave after original information bits B ' between corresponding relation also can adopt aforesaid way to determine; Check bit sequence Y behind the coding
1, Y
2, W
1, W
2With interweave after check bit sequence Y '
1, Y '
2, W '
1, W '
2Between corresponding relation also can adopt aforesaid way to determine, the output bit after guaranteeing to interweave is fully broken up.
The embodiment of the invention can learn by to the analysis that interweaves of bit sequence of above-mentioned interleaver after to coding, continuous bit A in the original information bits sequence A
2nAnd A
2n+1Between spacing be generally N/2, the A in the original information bits sequence A
4nAnd A
4n+2Between spacing be generally N/4, A
8nAnd A
8n+4Between spacing be generally N/8, A
16nAnd A
16n+8Between spacing be generally N/16, the rest may be inferred, n=0 wherein, 1,2 ....So, if wish A in the original information bits sequence A
0, A
1..., A
N-1Through coding with after interweaving, be mapped to equably when carrying out follow-up high order modulation on the constellation point of different reliabilities, need to adopt following several method.
First method can be when interweaving, the mapping formula AD[i of change interleaver] and/or T
k, the bit reliability of the group unit that the original information bits sequence after feasible process interweaves when interweaving constitutes is average, or/and the bit reliability of the group unit of the check bit sequence formation after making process interweave is average.When scrambling, can be to process mapping formula T
kAnd/or AD[i] sequence that obtains carries out 2
NFive equilibrium, wherein 2
NBe 2 power, N is a positive integer, chooses in half equal portions wherein, exchanges to adjacent two bits or every two bits of a bit.
For example, be 16QAM for high order modulation, with this sub-piece to be carried out binary situation corresponding, the specific algorithm that the bit sequence behind 102 pairs of codings of interleaver interweaves is as follows.
i＝0；
k＝0；
while(i＜N)
If?T
k＜N
AD[i]＝T
k；
If?T
k＞(N/2-1)
AD[i-mod(i，2)+xor(mod(i，2)，1)]＝T
k；
end
i++；
k++；
else
k++；
end
end
Second method, before interweaving, can carry out scrambling to the bit sequence behind the coding, make the bit sequence behind the coding upset the subsequent brew order, thereby the bit reliability through the group unit in the original information bits sequence after interweaving is average, or/and make through the bit reliability of the group unit in the correct bit sequence after interweaving average, the mode of scrambling also can adopt the mode that is shifted to carry out, such as: for example when interweaving, make original information bits sequence A and/or B original information bits sequence set the ring shift left position or the dextroposition of bit, and/or the original information bits sequence behind the coding is carried out 2
NFive equilibrium, wherein 2
NBe 2 power, N is a positive integer, chooses in half equal portions wherein, exchanges to adjacent two bits or every two bits of a bit; Or/and the check bit sequence Y behind the coding
1, Y
2, W
1, W
2All or part ofly set shifting left or dextroposition of bit, and/or to the check bit sequence Y behind the coding
1, Y
2, W
1, W
2All or part ofly carry out 2
NFive equilibrium, wherein 2
NBe 2 power, N is a positive integer, chooses in half equal portions wherein, exchanges to adjacent two bits or every two bits of a bit.
The third method, after interweaving, the original information bits sequence A that will obtain after will interweaving ' and/or B ' carry out scrambling, or/and the check bit sequence Y ' after interweaving
1And Y '
2, or/and, W '
1And W '
2Carry out scrambling.Make the bit reliability of the group unit that the original information bits sequence constitutes average, or/and make the bit reliability of the group unit that the check bit sequence constitutes average.
For first method with for second method, those skilled in the art are easy to realize, as long as it is average that assurance makes through the bit reliability of the group unit of the formation of the original information bits sequence after interweaving, or/and the bit reliability of the group unit that the correct bit sequence after making process interweave constitutes on average gets final product.
The present invention describes in detail the third method.
System and method provided by the invention is applicable to the situation of various code checks.
First embodiment
Fig. 7 is embodiment one schematic diagram that the original information bits sequence after interweaving is carried out scrambling provided by the invention, and this scrambling is based on the existing convolution turbo sign indicating number basis.Particularly, carrying out the second-class example that is divided into original information bits sequence A and sub-interleaver thereof describes.
In this embodiment, to through the original information bits sequence A that interweaving ' carried out the scrambling of scrambling module 1, be specially:
Suppose the original information bits sequence of input scrambling module 1
A’
0，A’
1，……，A’
N-1＝X
1，X
2，...，X
N/2，T
1，T
2，...，T
N/2，
The bit sequence of then exporting scrambling module 1 is X
1, X
2..., X
N/2, Y
1, Y
2..., Y
N/2, wherein when high order modulation is 16QAM, Y
2i-1=T
2i, and Y
2i=T
2i-1, i=1,2 ... N/4; When high order modulation is 64QAM, Y
3i=T
3i-2, and Y
3i-2=T
3i, i=1,2 ... N/6.
With the original information bits sequence A ' and sub-block interleaver carry out 4 and be divided into example and describe.
In this embodiment, to through the original information bits sequence A that interweaving ' carried out the scrambling of scrambling module 1, be specially:
Suppose the original information bits sequence of input scrambling module 1
A’
0，A’
1，……，A’
N-1＝X
1，X
2，...，X
N/4，T
1，T
2，...，T
N/4，X
N/4+1，X
N/4+2，...，X
N/2，T
N/4+1，T
N/4+2，...，T
N/2
The bit sequence of then exporting scrambling module 1 is X
1, X
2..., X
N/4, Y
1, Y
2..., Y
N/4, X
N/4+1, X
N/4+2..., X
N/2, Y
N/4+1, Y
N/4+2..., Y
N/2, wherein when high order modulation is 16QAM, Y
2i-1=T
2i, and Y
2i=T
2i-1, i=1,2 ... N/4; When high order modulation is 64QAM, Y
3i=T
3i-2, and Y
3i-2=T
3i, i=1,2 ... N/6.
That is to say the original information bits sequence A after scrambling module 1 will interweave ' carry out 4 branches such as grade after, suppose according to the order, these 4 equal portions are called A ' respectively
1_4, A '
2_4, A '
3_4And A '
4_4, i.e. A '
1_4Be bit sequence X
1, X
2..., X
N/4, A '
2_4Be bit sequence T
1, T
2..., T
N/4, A '
3_4Be bit sequence X
N/4+1, X
N/4+2..., X
N/2, A '
4_4Be bit sequence T
N/4+1, T
N/4+2..., T
N/2By choosing half in the N five equilibrium arbitrarily, it is N/2=2 part, carry out following operation, exchange with adjacent two bits in the bit or every two bits of a bit, like this, with interweave after the original information bits sequence B ' during formation group unit, just the uneven problem of bit modulation reliability of different group unit can not appear.As can be seen, the foregoing description is to have chosen A '
2_4And A '
4_4
With ' scrambling similar, also can be to the original information bits sequence B after interweaving ' carries out 2 to the original information bits sequence A after interweaving
NFive equilibrium, wherein 2
NBe 2 power, N is a positive integer, choose in back half equal portions wherein, exchange to adjacent two bits or every two bits of a bit, like this, with interweave after the original information bits sequence A ' during formation group unit, with regard to the uneven problem of bit reliability that different group unit can not occur.
With to the original information bits sequence A ' scrambling similar, the check bit sequence W ' after also can scrambling interweaving
1And W '
2The check bit sequence that constitutes, or the check bit sequence Y ' of scrambling after interweaving
1And Y '
2The check bit sequence that constitutes makes check bit sequence W ' after interweaving after the scrambling
1With interweave after check bit sequence Y '
1When formation group unit, the uneven problem of bit reliability of different group unit can not appear; Make check bit sequence W ' after interweaving after the scrambling
2With interweave after check bit sequence Y '
2When formation group unit, the not high problem of bit reliability of different group unit can not appear; Or the check bit sequence W ' after feasible interweaving
1With the check bit sequence Y ' after interweaving after the scrambling
1When formation group unit, the uneven problem of bit reliability of different group unit can not appear; Check bit sequence W ' after feasible interweaving
2With the check bit sequence Y ' after interweaving after the scrambling
2When formation group unit, the uneven problem of bit reliability of different group unit can not appear.
In the prior art, after interweaving, also can carry out based on Fig. 3 of background technology sometimes, shown in Fig. 7 a, this figure is embodiment one schematic diagram that the original information bits sequence to after interweaving that the present invention is based on Fig. 3 and provide is carried out scrambling.
At this moment, the method that the embodiment of the invention provides can be carried out scrambling after carrying out the ring shift left position or behind the ring shift right position, also can carry out scrambling before handle the ring shift left position or before the processing of ring shift right position.
Second embodiment
This scrambling is based on the existing convolution turbo sign indicating number basis.Particularly, be that example describes with original information bits sequence A and sub-interleaver thereof.
In this embodiment, to through the original information bits sequence A that interweaving ' carried out the scrambling of scrambling module 1, be specially:
Suppose the original information bits sequence hypothesis input bit sequence of input scrambling module 1
A’
0，A’
1，……，A’
N-1＝T
1，T
2，...，T
N/2，X
1，X
2，...，X
N/2，
Then exporting bit sequence is Y
1, Y
2..., Y
N/2, X
1, X
2..., X
N/2, wherein when high order modulation is 16QAM, Y
2i-1=T
2i, and Y
2i=T
2i-1, i=1,2 ... N/4; When high order modulation is 64QAM, Y
3i=T
3i-2, and Y
3i-2=T
3i, i=1,2 ... N/6.
That is to say the original information bits sequence A after scrambling module 1 will interweave ' carry out 2
NFive equilibrium, wherein 2
NBe 2 power, N is a positive integer, choose in the first half equal portions wherein, exchange to adjacent two bits or every two bits of a bit, like this, with interweave after the original information bits sequence B ' during formation group unit, with regard to the uneven problem of bit reliability that different group unit can not occur.
With to the original information bits sequence A after interweaving ' scrambling similar, also can be ' to the original information bits sequence B after interweaving carry out 2
NFive equilibrium, wherein 2
NBe 2 power, N is a positive integer, choose in back half equal portions wherein, exchange to adjacent two bits or every two bits of a bit, like this, with interweave after the original information bits sequence A ' during formation group unit, with regard to the uneven problem of bit reliability that different group unit can not occur.
With to the original information bits sequence A ' scrambling similar, the check bit sequence W ' after also can scrambling interweaving
1And W '
2The check bit sequence that constitutes, or the check bit sequence Y ' of scrambling after interweaving
1And Y '
2The check bit sequence that constitutes makes check bit sequence W ' after interweaving after the scrambling
1With interweave after check bit sequence Y '
1When formation group unit, the uneven problem of bit reliability of different group unit can not appear; Make check bit sequence W ' after interweaving after the scrambling
2With interweave after check bit sequence Y '
2When formation group unit, the not high problem of bit reliability of different group unit can not appear; Or the check bit sequence W ' after feasible interweaving
1With the check bit sequence Y ' after interweaving after the scrambling
1When formation group unit, the uneven problem of bit reliability of different group unit can not appear; Check bit sequence W ' after feasible interweaving
2With the check bit sequence Y ' after interweaving after the scrambling
2When formation group unit, the uneven problem of bit reliability of different group unit can not appear.
In the prior art, after interweaving, also can carry out based on Fig. 3 of background technology sometimes, at this moment, the method that the embodiment of the invention provides can be carried out scrambling before carrying out the ring shift left position, also can carry out scrambling after handle the ring shift left position.
The 3rd embodiment
Fig. 8 is embodiment three schematic diagrames that the original information bits sequence after interweaving is carried out scrambling provided by the invention, and this scrambling is based on the existing convolution turbo sign indicating number basis.In this embodiment, can be to the original information bits sequence A after interweaving ' scrambling by scrambling module 1 simultaneously, to the original information bits sequence B after interweaving ' scrambling by scrambling module 2.The group unit that the original information bits sequence A that these two scramblings will guarantee to obtain after the scrambling after interweaving ' and interweave after original information bits sequence B ' forms, incomplete same with the group unit of original information bits sequence A ' and interweave after original information bits sequence B ' after interweaving.
Like this, with regard to the uneven problem of bit reliability that different group unit can not occur.
Correspondingly, the check bit sequence W ' after also can adopting the mode scrambling of Fig. 8 to interweave
1And W '
2Check bit sequence Y ' after check bit sequence that constitutes and scrambling interweave
1And Y '
2The check bit sequence that constitutes makes check bit sequence W ' after interweaving after the scrambling
1With the check bit sequence Y ' after interweaving after the scrambling
1During the group unit that forms, incomplete same with the group unit that scrambling not forms, the uneven problem of bit reliability of different group unit can not appear; Make check bit sequence W ' after interweaving after the scrambling
2With the check bit sequence Y ' after interweaving after the scrambling
2During formation group unit, incomplete same with the group unit that scrambling not forms, the uneven problem of bit reliability of different group unit can not appear.
In the prior art, sometimes after interweaving, also can carry out based on Fig. 3 of background technology, shown in Fig. 8 a, this figure is embodiment three schematic diagrames that the original information bits sequence to after interweaving that the present invention is based on Fig. 3 and provide is carried out scrambling, among the figure, through the original information bits sequence B that interweaving ' be after handle the ring shift left position, to carry out scrambling.Certainly, through the original information bits sequence B that interweaving ' also can be after scrambling, just carry out the ring shift left position.
Embodiment four schematic diagrames that Fig. 9 carries out scrambling for the original information bits sequence to after interweaving that the present invention is based on Fig. 3 and provide, as can be seen, this case is only to through the original information bits sequence B that interweaving ' carried out scrambling, this scrambling and before left cyclic shift, carrying out.Certainly, also can after handling, the ring shift left position carry out scrambling.
The embodiment schematic diagram that Figure 10 carries out scrambling for the check bit sequence to after interweaving that the present invention is based on Fig. 3 and provide, as can be seen, the check bit sequence Y ' after interweaving
1And Y '
2After handling, the ring shift left position carries out the scrambling of scrambling module 3, simultaneously, and the check bit sequence W ' after interweaving
1And W '
2Carry out the scrambling of scrambling module 4 after handling in the ring shift left position, make check bit sequence W ' after interweaving after the scrambling
1With the check bit sequence Y ' after interweaving after the scrambling
1During the group unit that forms, incomplete same with the group unit that scrambling not forms, make check bit sequence W ' after interweaving after the scrambling
2With the check bit sequence Y ' after interweaving after the scrambling
2During formation group unit, incomplete same with the group unit of not scrambling formation.Certainly, also can be to the check bit sequence Y ' after interweaving
1And Y '
2Before handling, the ring shift left position carries out scrambling, simultaneously, and the check bit sequence W ' after interweaving
1And W '
2Before handling, the ring shift left position carries out scrambling.
To sum up, by method and system provided by the invention, guaranteed the spuious distribution character of original information bits sequence A and the bit reliability of B after being mapped to high order modulation.Group unit (the A that method and system provided by the invention also will form through the original information bits sequence A that interweaves and B
i, B
i) unite the bit mapping when considering to carry out high order modulation.
It should be noted that especially, some embodiment surface sees it is that putting in order of the bit sequence after interweaving adjusted among the present invention, but in fact the scheme of scrambling is mapped to the spuious distribution character of the bit reliability on the final high order modulation symbol still from the consideration to original information bits sequence A and B to guarantee the most original information bit sequence.
The method contrast simulation result schematic diagram that Figure 11 provides for method provided by the invention and background technology, as shown in the figure, wherein, abscissa is a signal to noise ratio (snr), and ordinate is frame error rate (FER), and the simulated environment of employing is CTC, the original information bits number is the Nep=1920 bit, code rate is rate=1/2, and high order modulation adopts 64QAM, white noise awgn channel.From top to bottom curve is respectively among the figure: adopt deinterleaving method shown in Figure 3, adopt deinterleaving method shown in Figure 2, adopt the deinterleaving method shown in the 7a and adopt the deinterleaving method shown in Fig. 8 a.As can be seen, adopt the deinterleaving method shown in Fig. 7 a provided by the invention and Fig. 8 a, the planisphere that obtains after shining upon is when receiving, and frame error rate is significantly less than Fig. 2 that background technology provides and deinterleaving method shown in Figure 3.
According to simulation result, the modulation mapping scheme of system and method provided by the invention in the background technology, the spuious distribution character of the bit reliability of mapped constellation figure improves a lot.
More than lift preferred embodiment; the purpose, technical solutions and advantages of the present invention are further described; institute is understood that; the above only is preferred embodiment of the present invention; not in order to restriction the present invention; within the spirit and principles in the present invention all, any modification of being done, be equal to and replace and improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1. one kind is adopted the CTC Methods for Coding, original information bits sequence to input is encoded, after the original information bits sequence and check bit sequence after obtaining encoding, after carrying out interleaving treatment, be mapped on the planisphere and send, it is characterized in that, before carrying out interleaving treatment, simultaneously or afterwards, this method also comprises:
Original information bits sequence behind the coding is carried out scrambling, make that original information bits sequence after mapping the time interweaves forms the bit reliability of unit is not average on the same group, or/and the check bit sequence behind the coding is carried out scrambling, make that check bit sequence after mapping the time interweaves forms the bit reliability of unit is not average on the same group.
2. the method for claim 1 is characterized in that, the original information bits sequence after described interweaving also comprises before mapping:
Original information bits sequence after interweaving is carried out the ring shift left position or the dextroposition of set point;
Check bit sequence after described interweaving also comprises before mapping:
Check bit sequence after interweaving is carried out the ring shift left position or the dextroposition of set point.
3. method as claimed in claim 1 or 2 is characterized in that, and is described before carrying out interleaving treatment, and the described process that original information bits sequence behind the coding is carried out scrambling is:
Original information bits sequence behind the coding is set the ring shift left position or the dextroposition of bit; And/or to the coding after the original information bits sequence carry out 2
NFive equilibrium, wherein 2
NBe 2 power, N is a positive integer, chooses in half equal portions wherein, exchanges to adjacent two bits or every two bits of a bit;
The described process that check bit sequence behind the coding is carried out scrambling is:
Check bit sequence behind the coding is set the ring shift left position or the dextroposition of bit; And/or to the coding after the check bit sequence carry out 2
NFive equilibrium, wherein 2
NBe 2 power, N is a positive integer, chooses in half equal portions wherein, exchanges to adjacent two bits or every two bits of a bit.
4. method as claimed in claim 1 or 2 is characterized in that, and is described when carrying out interleaving treatment, and the described process that original information bits sequence behind the coding is carried out scrambling is:
Original information bits sequence behind the coding is carried out the sequence of the mapping formula output that interleaving treatment adopted and carry out 2
NFive equilibrium, wherein 2
NBe 2 power, N is a positive integer, chooses in half equal portions wherein, exchanges to adjacent two bits or every two bits of a bit;
The described process that check bit sequence behind the coding is carried out scrambling is:
Check bit sequence behind the coding is carried out the sequence of the mapping formula output that interleaving treatment adopted and carry out 2
NFive equilibrium, wherein 2
NBe 2 power, N is a positive integer, chooses in half equal portions wherein, exchanges to adjacent two bits or every two bits of a bit.
5. method as claimed in claim 1 or 2 is characterized in that, and is described after carrying out interleaving treatment, and the described process that original information bits sequence behind the coding is carried out scrambling is:
To the coding after the original information bits sequence interweave after, the original information bits sequence after interweaving is carried out scrambling;
The described process that check bit sequence behind the coding is carried out scrambling is:
To the coding after the check bit sequence interweave after, the check bit sequence after interweaving is carried out scrambling.
6. method as claimed in claim 5, it is characterized in that, the described process that original information bits sequence behind the coding is carried out scrambling be after the process of ring shift left position of the original information bits sequence after interweaving being carried out set point or dextroposition or before carry out;
The described process that check bit sequence behind the coding is carried out scrambling be after the process of ring shift left position of the check bit sequence after interweaving being carried out set point or dextroposition or before carry out.
7. method as claimed in claim 6 is characterized in that, the original information bits sequence of establishing after described interweaving is A ' and B ', describedly original information bits sequence after interweaving is carried out the scrambling process is:
Original information bits sequence A after will interweaving ' carry out 2
NFive equilibrium, wherein 2
NBe 2 power, N is a positive integer, chooses in half equal portions wherein, exchanges to adjacent two bits or every two bits of a bit;
Original information bits sequence B after perhaps will interweaving ' carry out 2
NFive equilibrium, wherein 2
NBe 2 power, N is a positive integer, chooses in half equal portions wherein, exchanges to adjacent two bits or every two bits of a bit;
Perhaps to the original information bits sequence A after interweaving ' scrambling is simultaneously, to the original information bits sequence B after interweaving ' scrambling, the original information bits sequence A that described two scramblings guarantee to obtain after the scrambling after interweaving ' and scrambling after obtain interweave after the original information bits sequence B ' the group unit of formation, incomplete same with the group unit of original information bits sequence A ' and interweave after original information bits sequence B ' after interweaving.
8. method as claimed in claim 6 is characterized in that, the check bit sequence of establishing after described interweaving is Y
1', Y
2', W
1' and W
2', describedly original information bits sequence after interweaving carried out the scrambling process be:
Check bit sequence Y after will interweaving
1' or/and Y
2' carry out 2
NFive equilibrium, wherein 2
NBe 2 power, N is a positive integer, chooses in half equal portions wherein, exchanges to adjacent two bits or every two bits of a bit;
Check bit sequence W after perhaps will interweaving
1' or/and W
2' carry out 2
NFive equilibrium, wherein 2
NBe 2 power, N is a positive integer, chooses in half equal portions wherein, exchanges to adjacent two bits or every two bits of a bit;
Check bit sequence W ' after perhaps scrambling interweaves
1And W '
2Check bit sequence Y ' after check bit sequence that constitutes and scrambling interweave
1And Y '
2The check bit sequence that constitutes makes check bit sequence W ' after interweaving after the scrambling
1With the check bit sequence Y ' after interweaving after the scrambling
1During the group unit that forms, incomplete same with the group unit that scrambling not forms, make check bit sequence W ' after interweaving after the scrambling
2With the check bit sequence Y ' after interweaving after the scrambling
2During formation group unit, incomplete same with the group unit of not scrambling formation.
9. the method for claim 1 is characterized in that, this method also comprises:
After receiving planisphere, the original information bits sequence behind the coding that has carried out scrambling is carried out descrambling; Or/and carry out descrambling to having carried out the check bit sequence behind the coding.
10. system that adopts CTC coding, comprise: be used for the original information bits sequence CTC encoder of encoding input, send to after original information bits sequence behind the output encoder and the check bit sequence after interleaver interweaves, be mapped on the planisphere by card punch and send, it is characterized in that, also comprise scrambling module in the interleaver of this system, be used for the original information bits sequence behind the coding is carried out scrambling, make that original information bits sequence after mapping the time interweaves forms the bit reliability of unit is not average on the same group, or/and the check bit sequence behind the coding is carried out scrambling, make that check bit sequence after mapping the time interweaves forms the bit reliability of unit is not average on the same group.
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| CN2009101593200A CN101958719A (en) | 2009-07-13 | 2009-07-13 | Method and system for encoding by using convolution Turbo codes |
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|---|---|---|---|
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106169946A (en) * | 2016-08-18 | 2016-11-30 | 西北大学 | A kind of method reducing COFDM security of system circle |
| CN111262592A (en) * | 2018-11-30 | 2020-06-09 | 展讯半导体(南京)有限公司 | Sequence cyclic shift device and method, and storage medium |
| CN114095040A (en) * | 2022-01-19 | 2022-02-25 | 北京理工大学 | Hadamard-CTC cascade-based encoder and encoding method |
-
2009
- 2009-07-13 CN CN2009101593200A patent/CN101958719A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106169946A (en) * | 2016-08-18 | 2016-11-30 | 西北大学 | A kind of method reducing COFDM security of system circle |
| CN106169946B (en) * | 2016-08-18 | 2018-06-26 | 西北大学 | A kind of method for reducing COFDM systems safety limit |
| CN111262592A (en) * | 2018-11-30 | 2020-06-09 | 展讯半导体(南京)有限公司 | Sequence cyclic shift device and method, and storage medium |
| CN111262592B (en) * | 2018-11-30 | 2022-10-25 | 展讯半导体(南京)有限公司 | Sequence cyclic shift device and method, and storage medium |
| CN114095040A (en) * | 2022-01-19 | 2022-02-25 | 北京理工大学 | Hadamard-CTC cascade-based encoder and encoding method |
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