CN101882189A - Embedded-type system for ensuring completeness of program and realization method thereof - Google Patents
Embedded-type system for ensuring completeness of program and realization method thereof Download PDFInfo
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Abstract
The invention discloses an embedded-type system for ensuring the completeness of a program, which comprises an embedded-type microprocessor, a storage device, a program completeness detection unit and a safety control unit wherein: the program completeness detection unit is used for detecting content of an appointed area of the storage device before the running, utilizing a standard hash function to calculate the hashed value of the area in the appointed area, for encrypting the hashed value and for transmitting the hashed value to the safety control unit; and the safety control unit is used for storing a correct hashed value of the content in the appointed area of the storage device, for comparing the correct hashed value with a running time hashed value which is transmitted by the completeness detection unit, and for judging whether the appointed area is altered. The invention also discloses a realization method of the embedded-type system for ensuring the completeness of the program, which comprises a configuration process and a running time detection process. The embedded-type system solves the safety problem that the code in the conventional system is easy to be altered, has the advantages of universality, low cost, less running expenditure and the like, and is particularly suitable for ensuring the completeness of the most basic trusted root of the embedded-type system.
Description
Technical field
The present invention relates to the embedded system security field, be particularly related to a kind of based on the embedded system that ensures completeness of program and its implementation on FPGA (Field-Programmable Gate Array) and TPM (Trusted Platform Module, the reliable platform module) technology platform.
Background technology
Embedded system is used very extensive, but safety problem does not but obtain paying attention to.(Personal Computer) compares with typical PC, and the safety problem of embedded system has following two principal features: 1, the hardware configuration of embedded system is various, and the hardware configuration of PC is relatively uniform.This makes the security solution of embedded system must be able to adapt to the demand of different hardware structure; 2, the embedded system deployed environment is abominable, the self-protection ability, and executable code is easy to be distorted, Be Controlled under the unwitting situation of user.
According to the viewpoint of Trusted Computing, whole credible accounting system need be set up a chain-of-trust that comprises that boot, operating system, application program begin, and wherein boot is the root of whole chain-of-trust.Therefore, how guaranteeing the integrality of embedded system bootstrap program, is the important technological problems that makes up credible embedded system thereby guarantee to set up trusted root.
Summary of the invention
One of purpose of the present invention is to overcome above-mentioned shortcoming and defect, and a kind of embedded system that ensures completeness of program is provided, particularly guarantee embedded system the integrality of basic trusted root guarantee, as the safe protection of embedded system oneself.Solve code in the common embedded system and be easy to the safety issue of being distorted, and have generally and advantage such as be suitable for, price is low and the operation expense is few.
Two of purpose of the present invention is to provide a kind of implementation method of the embedded system that ensures completeness of program.
One of purpose of the present invention is achieved through the following technical solutions: a kind of embedded system that ensures completeness of program, comprise embedded microprocessor and storer, and also comprise process integrity detecting unit and security control unit, wherein:
The process integrity detecting unit is used for the appointed area content of detection of stored device before operation for embedded system, uses standard Hash functions to calculate the hashed value of this area contents, and the keyed hash value also sends to security control unit;
Security control unit is used to preserve the correct hashed value of storer appointed area content, and compares with the hashed value time of running that the process integrity detecting unit sends over, judges whether this zone is distorted.
To better implement the present invention, described storer can be NOR Flash program storage.
Preferably, described process integrity detecting unit specifically comprises:
Memory control module is used for reading in the data of storer assigned address and data length;
Parallel buffer module is carried out buffer memory according to FIFO (First Input First Output, First Input First Output) mode, is used for parallel data buffering and transfer;
The serial buffer module is carried out buffer memory according to the FIFO mode, is used for the buffering and the transfer of serial data;
Parallel serial conversion module is used to realize the conversion of parallel data to serial data;
String and modular converter are used to realize the conversion of serial data to parallel data;
The hash computing module is used for that the data stream of input is carried out hash and calculates, and generates data summarization;
The encryption and decryption module is used for data are carried out encryption and decryption;
Unique sequence number generation module, unique sequence number of generator program integrity detection unit;
The asynchronous serial port load module is used to import the data of security control unit, realizes the exchanges data of process integrity detecting unit and security control unit;
The asynchronous serial port output module is used for output data and gives security control unit, realizes the exchanges data of process integrity detecting unit and security control unit;
The parallel data multi-way switch is used for selecting one of them module from hash computing module, encryption and decryption module, memory control module and string and modular converter, and the result of this module is exported in the parallel buffer module;
The serial data multi-way switch is used for selecting one of them module from unique sequence number generation module, asynchronous serial load module, parallel serial conversion module, and the result of this module is exported in the serial buffer module;
Memory access control multi-way switch is used for option program integrity detection unit or the embedded microprocessor visit main body as storer, and the access control signal of process integrity detecting unit or embedded microprocessor is sent to storer;
The control clock is used for providing external clock to embedded microprocessor, realizes the control to embedded microprocessor;
And controller, be used for other module of control program integrity detection unit and the data flow in the whole procedure integrity detection unit.
Preferably, described hash computing module is a kind of in the hash computing modules such as SHA-1, MD5, SHA-256 and SHA-512.
Preferably, described encryption and decryption module is symmetric key encryption and decryption modules such as DES, 3DES, AES, according to the DES standard, uses 64 keys that data are carried out encryption and decryption.
Preferably, described access control signal comprises address, read-write control and/or enables.
Two of purpose of the present invention is achieved through the following technical solutions: a kind of implementation method of the embedded system that ensures completeness of program:
(A) layoutprocedure: the process integrity detecting unit reads unique sequence number of this unit and is sent to security control unit; The process integrity detecting unit reads storer appointed area content, and carries out hash operations generation data summarization, exports data summarization to security control unit; Security control unit receives data summarization, unique sequence number and preserves;
(B) time of running testing process: the process integrity detecting unit is closed the control clock of embedded microprocessor; The process integrity detecting unit reads the unique sequence number in this unit;
Security control unit obtains encrypted result after choosing random number and encryption, and encrypted result is sent to the process integrity detecting unit; Wherein the decruption key of encrypted result is the unique sequence number that is stored on the security control unit;
The process integrity detecting unit utilizes unique sequence number that encrypted result is decrypted, and recovers and the storage random number; The process integrity detecting unit reads the content of storer appointed area, and calculates generation second data summarization by hash; The process integrity detecting unit is encrypted the back with second data summarization with random number and is formed second encrypted result, and second encrypted result is sent to security control unit;
Security control unit is decrypted after receiving data, whether the random number that the verification deciphering obtains is consistent with the random number of choosing before, whether the data summarization that the data summarization that obtains of deciphering writes under the configuration mode is consistent, and comparing result is deposited in particular memory locations;
The process integrity detecting unit provides clock for embedded microprocessor, and embedded microprocessor begins normally to move built-in system software; Comparing result in the built-in system software access security control module, thus judge whether system is modified.
To better implement the present invention, described step (A) layoutprocedure specifically comprises:
Unique sequence number generation module in S1.0, the process integrity detecting unit reads unique sequence number of this unit, and be transferred to the asynchronous serial port output module by serial data multi-way switch, serial buffer module successively, export unique sequence number to security control unit from the process integrity detecting unit by the asynchronous serial port output module, enter step S1.1;
S1.1, process integrity detecting unit are according to the content of manufacturer or user's pre-specified address and length read access to memory, the content that reads is carried out hash operations, produce data summarization, and export data summarization to security control unit from the process integrity detecting unit by the asynchronous serial port output module, enter step S1.2;
S1.2, data summarization and unique sequence number are written in the protected nonvolatile storage space of security control unit.
Described step (B) the testing process time of running specifically comprises:
After S2.0, system powered on, the process integrity detecting unit was closed the control clock of embedded microprocessor, enters step S2.1;
S2.1, process integrity detecting unit read unique sequence number and send to the encryption and decryption module by unique sequence number generation module, enter step S2.2;
S2.2, process integrity detecting unit request security control unit send random number, enter step S2.3;
S2.3, security control unit obtain encrypted result after choosing random number and encryption, and wherein the decruption key of encrypted result enters step S2.4 for being stored in the unique sequence number on the security control unit in advance;
S2.4, security control unit are sent to the process integrity detecting unit with encrypted result, enter step S2.5;
The encryption and decryption module of S2.5, process integrity detecting unit utilizes the unique sequence number among the step S2.1 that encrypted result is decrypted, and recovers and the storage random number, enters step S2.6;
S2.6, process integrity detecting unit read the content of storer appointed area, and use the hash computing module to generate second data summarization, enter step S2.7;
S2.7, process integrity detecting unit are formed data with the random number of second data summarization in step S2.5, encrypt the back and form second encrypted result, and second encrypted result is sent to security control unit by the asynchronous serial port output module, enter step S2.8;
S2.8, security control unit are decrypted after receiving data, at first the random number part that obtains of verification deciphering whether with send before consistent, if it is consistent, whether then continue the data summarization that data summarization partial data that verification deciphering obtains writes under the configuration mode consistent, and comparing result deposited in particular memory locations, enter step S2.9;
S2.9, process integrity detecting unit provide clock for embedded microprocessor, and make embedded microprocessor to control multi-way switch by memory access storer is conducted interviews, and the normal operation of beginning built-in system software enters step S2.10;
S2.10, built-in system software pass through the comparing result in the relevant interface accessing security control unit, thereby judge whether system is modified.
Preferably, one or more in the symmetric key enciphering and deciphering algorithms such as DES, 3DES, ASE are adopted in the operation of the implementation method encryption and decryption of the described embedded system that ensures completeness of program;
Described hash is calculated one or more in employing SHA-1 standard, MD5 standard, SHA-256 standard or the SHA-512 standard hash operations.
Design concept of the present invention: the design utilizes existing safety prevention measure, technology platform based on FPGA and TPM, design a kind of general-purpose system, wherein TPM will provide a series of security service for embedded system, simultaneously FPGA is designed to a kind of controlling mechanism, in order to coordination and the safety that guarantees that TPM communicates by letter with embedded system.Can detect timely to illegally the distorting of critical area in the outer program storage of sheet, in order to guarantee the embedded system program integrality.
The present invention carries out safety analysis by down routine several foreseeable attack patterns:
1, under the prerequisite of known procedure memory contents, obtains the right value of data summarization in advance, the forged program integrity detection unit.Because each piece process integrity detecting unit has unique sequence number (UID), change integrity detection unit and can cause the key of des encryption to change, thus incorrect to the secret value of security control unit transmission;
2, Replay Attack is carried out in the communication between oracle listener integrity detection unit and the security control unit.Because the Content of communciation between security control unit and the process integrity detecting unit depends on the true random number that security control unit produces, and has Unpredictability, so even listen to when inferior Content of communciation, follow-up Replay Attack also can not play effect.
The present invention has following advantage and effect with respect to prior art:
The first, provide complete embedded system program integrality to guarantee scheme:, to be highly susceptible to being distorted, thereby to produce serious safety issue because embedded system often adopts the outer NOR Flash stored programme of sheet.The solution that native system provides is based on existing techniques in realizing, simple in structure, be easy to realize, can effectively detect simultaneously the modification of program in the embedded system, the particularly modification of boot, thereby can be the root of trust on safety, a basis of believable embedded system structure, for the safety of whole embedded system lays the foundation.
The second, this method has general adaptability: existing embedded system security solution often needs the specific embedded type CPU with security control function, and not only cost is higher, and application is limited.This method can adapt to multiple different embedded type CPU or DSP (digital signal processor), the outer program storage system of sheet at modal embedded type CPU in the embedded system+NOR Flash program storage structure.Simultaneously, this method is transparent to the embedded system upper layer software (applications), can support multiple different embedded boot and operating system.
Three, reasonably function is divided, and price is low few with the operation expense: in different application systems, though embedded type CPU+NOR Flash program storage structure basically identical still has very big-difference at aspects such as memory data width, accessing time sequence.Therefore, this method adopts two design proposals, and wherein the process integrity detecting unit can use FPGA to make up, to adapt to the demand of different application systems, security control unit then adopts the commercial chip that meets national security chip related specifications, effectively improves the security of system.
Description of drawings
Fig. 1 is the block diagram of a kind of embedded system that ensures completeness of program in the present embodiment;
Fig. 2 is the block diagram of program integrity detection unit in the present embodiment;
Fig. 3 is the process flow diagram of the implementation method of a kind of embedded system that ensures completeness of program in the present embodiment in layoutprocedure;
Fig. 4 is the process flow diagram of the implementation method of a kind of embedded system that ensures completeness of program in the present embodiment in the testing process time of running
Fig. 5 is the data flow figure that in the layoutprocedure of embodiment the UID value in unique sequence number generation module is sent to the PC end;
Fig. 6 be in the layoutprocedure of embodiment and the operation testing process in obtain the data flow figure of program's memory space hashed value;
Fig. 7 is the data flow figure that in the layoutprocedure of embodiment hashed value is sent to security control unit;
Fig. 8 is the data flow figure that loads decruption key the time of running in the testing process from unique sequence number generation module of embodiment;
Fig. 9 is the data flow figure that obtains the random number that security control unit sends over the time of running of embodiment in the testing process;
Figure 10 be embodiment the time of running keyed hash value in the testing process data flow figure;
Figure 11 is the data flow figure that sends the hashed value after encrypting the time of running in the testing process to security control unit of embodiment.
Embodiment
Below in conjunction with embodiment and accompanying drawing, the present invention is described in further detail, but embodiments of the present invention are not limited thereto.
A kind of embedded system that ensures completeness of program as shown in Figure 1, comprises embedded microprocessor, NOR Flash program storage, process integrity detecting unit and security control unit, wherein:
Embedded microprocessor is typical commercial embedded system CPU, is used for being responsible for by static memory interface reservoir reading command and execution outside sheet; Described embedded microprocessor adopts Samsung 44B0X, ARM7 kernel, dominant frequency 66MHZ;
NOR Flash program storage: be used to store the program executables of embedded system, mainly comprise contents such as embedded system bootstrap program, embedded OS and embedded file system; Described NORFlash program storage model is SST39VF1601, TSSOP-48 encapsulation, 8 of data widths, read cycle 90ns;
Security control unit is used to preserve the correct hashed value of storer appointed area content, and compares with the hashed value time of running that the process integrity detecting unit sends over, judges whether this zone is distorted.Emerging integrated circuit during described security control unit adopts, the Z32U-flash chip, dominant frequency 96MHZ, inside comprises 32-bit microprocessor, nonvolatile memory, DES encryption and decryption parts and true Random Number Generator, and asynchronous serial port externally is provided.
The process integrity detecting unit is used for the appointed area content of detection of stored device before operation for embedded system, uses the SHA-1 standard Hash functions to calculate this regional hashed value, and by behind the des encryption this hashed value being sent to security control unit; Described process integrity detecting unit adopts Xilinx Spartan3A-XC3S200A, the VQ100 encapsulation, and inside comprises unique sequence number generation module, provides the unique ID of chip number;
As shown in Figure 2, described process integrity detecting unit specifically comprises:
Memory control module: the data of reading in assigned address and data length in the storer; This module has two kinds of functions: 1) according to the control signal of controller, pseudostatic ram read parameter (as reading length and start address); 2) read memory content according to parameter;
Parallel buffer module: carry out buffer memory according to the FIFO mode, be used for 32 bit parallel data buffering and transfers;
Serial buffer module: carry out buffer memory according to the FIFO mode, be used for the buffering and the transfer of 1 bit serial data;
Parallel serial conversion module: be used to realize of the conversion of 32 bit parallel data to 1 bit serial data;
String and modular converter: be used to realize of the conversion of 1 bit serial data to 32 bit parallel data;
The hash computing module: described hash computing module is a SHA-1 hash computing module, according to the SHA-1 standard data stream of input is carried out hash and calculates, and generate 160 data summarization;
The encryption and decryption module: described encryption and decryption module is a DES encryption and decryption module, according to the DES standard, uses 64 keys that data are carried out encryption and decryption;
Unique sequence number generation module: unique sequence number of generator program integrity detection unit (being that every process integrity detecting unit all has different sequence numbers), in the Spartan3A Series FPGA, can read unique sequence number of 57.
Asynchronous serial port load module: be used to import the data of security control unit, realize the exchanges data of process integrity detecting unit and security control unit;
Asynchronous serial port output module: be used for output data and give security control unit, realize the exchanges data of process integrity detecting unit and security control unit;
Parallel data multi-way switch: be used for selecting one of them module, the result of this module is outputed in the parallel buffer module from the parallel output module of SHA-1 hash computing module, encryption and decryption module, memory control module and string and modular converter etc.;
Serial data multi-way switch: be used for selecting one of them module, and the result of this module is outputed in the serial buffer module from serial output modules such as unique sequence number generation module, asynchronous serial load module, parallel serial conversion modules;
Memory access control multi-way switch: be used for option program integrity detection unit or embedded microprocessor visit main body as storer, the access control signal of process integrity detecting unit or embedded microprocessor is sent to storer, and described access control signal comprises address, read-write control and/or enables;
Control clock: be used for providing external clock, realize control to embedded microprocessor to embedded microprocessor;
Controller: be used for other module of control program integrity detection unit and the data flow in the whole procedure integrity detection unit.
Controller in the process integrity detecting unit adopts the method for designing of finte-state machine to control the operation of each functional part (memory control module, asynchronous serial port output module, asynchronous serial port load module, unique sequence number generation module, DES encryption and decryption module, SHA-1 hash computing module, string and modular converter, parallel serial conversion module), and the choice direction of parallel data multi-way switch, serial data multi-way switch.
Controller in the process integrity detecting unit transmits control signal to each functional part, and each functional part is carried out corresponding operation according to control signal.All each functional parts all have identical external reference interface: reading of data from also row buffering or serial cushion sends the result to parallel data multi-way switch or serial data multi-way switch.Each functional part sends the execution end signal to controller after executing corresponding operating.
In system's operational process, each module will be formed a chain structure by data multiplex switch and buffering.And controller will be waited for the end signal of last functional part, to enter into the implementation of next stage.
The implementation method of the above-mentioned embedded system that ensures completeness of program specifically comprises layoutprocedure and two stages of testing process time of running.
Layoutprocedure be used for manufacturer or user for system sets up correct believable data summarization.In this process, the process integrity detecting unit transmits to security control unit: 1) unique sequence number of process integrity detecting unit; 2) the correct data digest value of designated memory address area content (generally being boot).Its operation steps specifically comprises as shown in Figure 3:
Unique sequence number generation module in S1.0, the process integrity detecting unit reads unique sequence number (UID) of this unit, and be transferred to the asynchronous serial port output module by serial data multi-way switch, serial buffer module successively, export UID to security control unit from the process integrity detecting unit by the asynchronous serial port output module, enter step S1.1;
S1.1, process integrity detecting unit are according to the content of user or manufacturer's pre-specified address and length read access to memory, the content that reads is carried out the SHA-1 hash operations, produce 160 data summarization (M), and export data summarization to security control unit from the process integrity detecting unit by the asynchronous serial port output module, enter step S1.2;
S1.2, data summarization (M) and sequence number (UID) are written in the protected nonvolatile storage space of security control unit.
The time of running testing process be used for the time of running detection of stored in the integrality of the contents of program of storer, its operation steps specifically comprises:
After S2.0, system powered on, the process integrity detecting unit was closed the control clock of embedded microprocessor, enters step S2.1;
S2.1, process integrity detecting unit read unique sequence number (UID) by unique sequence number generation module and use as key to DES encryption and decryption module, enter step S2.2;
S2.2, process integrity detecting unit request security control unit send 32 random numbers (R), enter step S2.3;
S2.3, security control unit are chosen random number (R), and obtain encrypted result (RDES) after using the DES algorithm for encryption, wherein the decruption key of encrypted result (RDES) enters step S2.4 for being stored in the unique sequence number (UID) on the security control unit in advance;
S2.4, security control unit are sent to the process integrity detecting unit with encrypted result (RDES), enter step S2.5;
The DES encryption and decryption module of S2.5, process integrity detecting unit utilizes that unique sequence number (UID) is decrypted encrypted result (RDES) among the step S2.1, recovers also storage random number (R), enters step S2.6;
S2.6, process integrity detecting unit read the content of storer appointed area, and use SHA-1 hash computing module to produce 160 second data summarization (M1), enter step S2.7;
S2.7, process integrity detecting unit are divided into 5 groups with second data summarization (M1), every group 32, form 64 bit data with 32 random numbers (R) before this, carry out forming second encrypted result (M1DES) behind the des encryption, and second encrypted result (M1DES) is sent to security control unit by the asynchronous serial port output module, enter step S2.8;
S2.8, security control unit are decrypted after receiving 5 groups of data, at first the random number part that obtains of verification deciphering whether with send before consistent, if it is consistent, whether then continue the data summarization that checking data summary partial data writes under the configuration mode consistent, and comparing result (V) deposited in particular memory locations, enter step S2.9;
S2.9, process integrity detecting unit provide clock for embedded microprocessor, and make embedded microprocessor to control multi-way switch by memory access storer is conducted interviews, and the normal operation of beginning built-in system software enters step S2.10;
S2.10, built-in system software can pass through the comparing result (V) in the relevant interface accessing security control unit, thereby judge whether system is modified.
See Fig. 5 to Figure 11, each data stream of operating of execution with regard to the process integrity detecting unit is described in detail below:
In the layoutprocedure UID value in unique sequence number generation module being sent to PC holds
As shown in Figure 5, in this process, controller sends to unique sequence number generation module and produces the UID order, and opens the serial buffer module, permission asynchronous serial port output module outwards sends data, the serial data multi-way switch is set simultaneously selects unique sequence number generation module as input.After setting up above-mentioned data path, 64 UID data that unique sequence number generation module produces will be transferred to the asynchronous serial port output module by serial data multi-way switch, serial buffer module, export UID to security control unit from the process integrity detecting unit by the asynchronous serial port output module.
Obtain the hashed value of program's memory space, generate data summarization
As shown in Figure 6, in this process, controller sends scan command to Memory Controller, simultaneously send the hash calculation command to SHA-1 hash computing module, parallel data multi-way switch selection memory controller is set imports, control signal that memory access control multi-way switch the sends Memory Controller control signal as chip external memory will be set in addition as data.
Memory Controller will be outside predetermined NOR Flash storage address, read the content of predetermined length in the storer, and these data sets are made into 32 bit widths are transferred in the SHA-1 hash computing module by parallel data multi-way switch and parallel buffer module.SHA-1 hash computing module is according to the hashed value of SHA-1 criterion calculation input traffic, and the generation data summarization also is stored in the SHA-1 hash computing module.
Scanning and the hashed value of all using the layoutprocedure and the time of running this process to finish the program storage specific region in the testing process are calculated.
In the layoutprocedure hashed value being sent to PC holds
As shown in Figure 7, controller sends to SHA-1 hash computing module and sends the data summarization order, open parallel buffer module, parallel serial conversion module, serial buffer module and asynchronous serial port output module, the input of SHA-1 hash computing module as the parallel data multi-way switch is set respectively simultaneously, and parallel serial conversion module is as the input of serial data multi-way switch.
After mentioned order sends, SHA-1 hash computing module will send 160 data summarization of storage, and, export data summarization (M) to security control unit from the process integrity detecting unit by the asynchronous serial port output module by data path arrival asynchronous serial port output modules such as parallel data multi-way switch, parallel buffer module, parallel serial conversion module, serial data multi-way switch, serial buffer modules.
From unique sequence number generation module load decruption key in the testing process time of running
As shown in Figure 8, controller sends the order that produces sequence number (UID) to unique sequence number generation module, send the loading cipher key command to DES encryption and decryption module, open string and modular converter, parallel buffer module, serial buffer module, the input of unique sequence number generation module as the serial data multi-way switch is set, the input as the parallel data multi-way switch of string and modular converter is set.
Unique sequence number generation module is after receiving order, to produce 64 UID, and the data path that constitutes by serial data multi-way switch, serial buffer module, string and modular converter, parallel data multi-way switch, parallel buffer module successively is delivered to DES encryption and decryption module.DES encryption and decryption module will be stored 64 UID as the encryption and decryption key.
Obtain the random number that security control unit sends over the time of running in the testing process
As shown in Figure 9, controller sends decryption command to DES encryption and decryption module, open the asynchronous serial port load module, the input of asynchronous serial port load module as the serial data multi-way switch is set simultaneously, the input as the parallel data multi-way switch of string and modular converter is set.
Encrypted result (RDES) behind 32 random number encryptions that the asynchronous serial port load module receives, encrypted result (RDES) is passed through successively data paths such as serial data multi-way switch, serial buffer module, string and modular converter, parallel data multi-way switch, parallel buffer module, be transferred to DES encryption and decryption module, and the UID that has been stored by the utilization of DES encryption and decryption module is decrypted calculating as the encryption and decryption key, obtaining decrypted result is random number (R), and storage.
Keyed hash value in the time of running testing process
As shown in figure 10, controller sends the order of exporting hash result to SHA-1 hash computing module, sends the encrypted result order to DES encryption and decryption module, and the input of SHA-1 hash computing module as the parallel data multi-way switch is set simultaneously.
After receiving order, SHA-1 hash computing module will be exported 160 second data summarization (M1), and be transferred to DES encryption and decryption module through parallel data multi-way switch, parallel buffer module.DES encryption and decryption module is divided into 5 groups with 160 result, encrypts after being combined to form 5 groups 64 plaintext with 32 random number R respectively, forms 320 second encrypted result (M1DES), and storage.
Send hashed value after encrypting to security control unit in the time of running testing process
As shown in figure 11, controller sends the order that sends second encrypted result (M1DES) to DES encryption and decryption module, open the asynchronous serial port output module, the input of DES encryption and decryption module as the parallel data multi-way switch is set, the input of parallel serial conversion module as the serial data multi-way switch is set.
After receiving order, DES encryption and decryption module sends decrypted result, and be transferred to the asynchronous serial port output module by parallel data multi-way switch, parallel buffer module, parallel serial conversion module, serial data multi-way switch, serial buffer module successively, by the asynchronous serial port output module second encrypted result (M1DES) is sent to security control unit.
The foregoing description is a preferred implementation of the present invention; but embodiments of the present invention are not limited by the examples; other any do not deviate from change, the modification done under spirit of the present invention and the principle, substitutes, combination, simplify; all should be the substitute mode of equivalence, be included within protection scope of the present invention.
Claims (10)
1. an embedded system that ensures completeness of program comprises embedded microprocessor and storer, it is characterized in that, also comprises process integrity detecting unit and security control unit, wherein:
The process integrity detecting unit is used for the appointed area content of detection of stored device before operation for embedded system, uses standard Hash functions to calculate the hashed value of this area contents, and the keyed hash value also sends to security control unit;
Security control unit is used to preserve the correct hashed value of storer appointed area content, and compares with the hashed value time of running that the process integrity detecting unit sends over, judges whether this zone is distorted.
2. according to the described a kind of embedded system that ensures completeness of program of claim 1, it is characterized in that described storer can be NOR Flash program storage.
3. according to the described a kind of embedded system that ensures completeness of program of claim 1, it is characterized in that described process integrity detecting unit specifically comprises:
Memory control module is used for reading in the data of storer assigned address and data length;
Parallel buffer module is carried out buffer memory according to the FIFO mode, is used for parallel data buffering and transfer;
The serial buffer module is carried out buffer memory according to the FIFO mode, is used for the buffering and the transfer of serial data;
Parallel serial conversion module is used to realize the conversion of parallel data to serial data;
String and modular converter are used to realize the conversion of serial data to parallel data;
The hash computing module is used for that the data stream of input is carried out hash and calculates, and generates data summarization;
The encryption and decryption module is used for data are carried out encryption and decryption;
Unique sequence number generation module, unique sequence number of generator program integrity detection unit;
The asynchronous serial port load module is used to import the data of security control unit, realizes the exchanges data of process integrity detecting unit and security control unit;
The asynchronous serial port output module is used for output data and gives security control unit, realizes the exchanges data of process integrity detecting unit and security control unit;
The parallel data multi-way switch is used for selecting one of them module from hash computing module, encryption and decryption module, memory control module and string and modular converter, and the result of this module is exported in the parallel buffer module;
The serial data multi-way switch is used for selecting one of them module from unique sequence number generation module, asynchronous serial load module, parallel serial conversion module, and the result of this module is exported in the serial buffer module;
Memory access control multi-way switch is used for option program integrity detection unit or the embedded microprocessor visit main body as storer, and the access control signal of process integrity detecting unit or embedded microprocessor is sent to storer;
The control clock is used for providing external clock to embedded microprocessor, realizes the control to embedded microprocessor;
And controller, be used for other module of control program integrity detection unit and the data flow in the whole procedure integrity detection unit.
4. according to the described a kind of embedded system that ensures completeness of program of claim 3, it is characterized in that described hash computing module is one or more in SHA-1, MD5 standard, SHA-256 and the SHA-512 hash computing module.
5. according to the described a kind of embedded system that ensures completeness of program of claim 3, it is characterized in that described encryption and decryption module is a DES encryption and decryption module,, use 64 keys that data are carried out encryption and decryption according to the DES standard.
6. according to the described a kind of embedded system that ensures completeness of program of claim 3, it is characterized in that described access control signal comprises address, read-write control and/or enables.
7. according to the implementation method of each described embedded system that ensures completeness of program in the claim 1 to 6:
(A) layoutprocedure: the process integrity detecting unit reads unique sequence number of this unit and is sent to security control unit; The process integrity detecting unit reads storer appointed area content, and carries out hash operations generation data summarization, exports data summarization to security control unit; Security control unit receives data summarization, unique sequence number and preserves;
(B) time of running testing process: the process integrity detecting unit is closed the control clock of embedded microprocessor; The process integrity detecting unit reads the unique sequence number in this unit;
Security control unit obtains encrypted result after choosing random number and encryption, and encrypted result is sent to the process integrity detecting unit; Wherein the decruption key of encrypted result is the unique sequence number that is stored on the security control unit;
The process integrity detecting unit utilizes unique sequence number that encrypted result is decrypted, and recovers and the storage random number; The process integrity detecting unit reads the content of storer appointed area, and calculates generation second data summarization by hash; The process integrity detecting unit is encrypted the back with second data summarization with random number and is formed second encrypted result, and second encrypted result is sent to security control unit;
Security control unit is decrypted after receiving data, whether the random number that the verification deciphering obtains is consistent with the random number of choosing before, whether the data summarization that the data summarization that obtains of deciphering writes under the configuration mode is consistent, and comparing result is deposited in particular memory locations;
The process integrity detecting unit provides clock for embedded microprocessor, and embedded microprocessor begins normally to move built-in system software; Comparing result in the built-in system software access security control module, thus judge whether system is modified.
8. according to the implementation method of the described embedded system that ensures completeness of program of claim 7, it is characterized in that described step (A) layoutprocedure specifically comprises:
Unique sequence number generation module in S1.0, the process integrity detecting unit reads unique sequence number of this unit, and be transferred to the asynchronous serial port output module by serial data multi-way switch, serial buffer module successively, export unique sequence number to security control unit from the process integrity detecting unit by the asynchronous serial port output module, enter step S1.1;
S1.1, process integrity detecting unit are according to the content of manufacturer or user's pre-specified address and length read access to memory, the content that reads is carried out hash operations, produce data summarization, and export data summarization to security control unit from the process integrity detecting unit by the asynchronous serial port output module, enter step S1.2;
S1.2, data summarization and unique sequence number are written in the protected nonvolatile storage space of security control unit.
9. the implementation method of the described according to Claim 8 embedded system that ensures completeness of program is characterized in that, described step (B) the testing process time of running specifically comprises:
After S2.0, system powered on, the process integrity detecting unit was closed the control clock of embedded microprocessor, enters step S2.1;
S2.1, process integrity detecting unit read unique sequence number and send to the encryption and decryption module by unique sequence number generation module, enter step S2.2;
S2.2, process integrity detecting unit request security control unit send random number, enter step S2.3;
S2.3, security control unit obtain encrypted result after choosing random number and encryption, and wherein the decruption key of encrypted result enters step S2.4 for being stored in the unique sequence number on the security control unit in advance;
S2.4, security control unit are sent to the process integrity detecting unit with encrypted result, enter step S2.5;
The encryption and decryption module of S2.5, process integrity detecting unit utilizes the unique sequence number among the step S2.1 that encrypted result is decrypted, and recovers and the storage random number, enters step S2.6;
S2.6, process integrity detecting unit read the content of storer appointed area, and use the hash computing module to generate second data summarization, enter step S2.7;
S2.7, process integrity detecting unit are formed data with the random number of second data summarization in step S2.5, encrypt the back and form second encrypted result, and second encrypted result is sent to security control unit by the asynchronous serial port output module, enter step S2.8;
S2.8, security control unit are decrypted after receiving data, at first the random number part that obtains of verification deciphering whether with send before consistent, if it is consistent, whether then continue the data summarization that data summarization partial data that verification deciphering obtains writes under the configuration mode consistent, and comparing result deposited in particular memory locations, enter step S2.9;
S2.9, process integrity detecting unit provide clock for embedded microprocessor, and make embedded microprocessor to control multi-way switch by memory access storer is conducted interviews, and the normal operation of beginning built-in system software enters step S2.10;
S2.10, built-in system software pass through the comparing result in the relevant interface accessing security control unit, thereby judge whether system is modified.
10. according to the implementation method of the described embedded system that ensures completeness of program of claim 9, it is characterized in that one or more in DES, 3DES, the AES encrypting and decrypting algorithm are adopted in the encryption and decryption in the implementation method of the described embedded system that ensures completeness of program;
Described hash is calculated one or more in employing SHA-1 standard, MD5 standard, SHA-256 standard or the SHA-512 standard hash operations.
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