CN101826955A - Synchronization error correction method - Google Patents

Synchronization error correction method Download PDF

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CN101826955A
CN101826955A CN201010102245A CN201010102245A CN101826955A CN 101826955 A CN101826955 A CN 101826955A CN 201010102245 A CN201010102245 A CN 201010102245A CN 201010102245 A CN201010102245 A CN 201010102245A CN 101826955 A CN101826955 A CN 101826955A
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error
synchronous
synchronous error
synchronization
synchronizer
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陈秋玲
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Abstract

The invention discloses a synchronization error correction method. The method includes two steps, i.e. synchronization error detection and synchronization error correction; in the step of synchronization error detection, within fixed synchronization error detection time, the respective timing values of a synchronizer and a synchronization source in operation are simultaneously detected, and a synchronization error value between the synchronizer and the synchronization source is calculated according to the two timing values; in the step of synchronization error correction, after the synchronization error value is detected, whether the synchronizer is faster or slower than the synchronization source is first judged according to the negative or positive of the synchronization error value, and the synchronization error value is then subtracted from the synchronization value outputted by the synchronizer in operation within fixed time equal to the synchronization error detection time if the synchronizer is faster than the synchronization source, or is added with the synchronization value within the fixed time if the synchronizer is slower than the synchronization source. The invention overcomes the defects of the prior art, including short synchronization interval and no automatic synchronization error correction, and has the advantages of self-learning capability, low application cost, high synchronization reliability, wide application range and the like.

Description

A kind of synchronization error correction method
Technical field
The present invention relates to a kind of error correcting method, particularly a kind of method of synchronous error correction is mainly used in and makes discrete device revise synchronous error voluntarily and realize high level of synchronization with synchronisation source.
Background technology
Simultaneous techniques is used very general in daily life, uses more general at industrial circle.Prior art normally realizes by closed-loop fashion synchronously, for example in signal source, add lock-out pulse, by last level controlling system discrete device is realized Synchronization Control, make each discrete device or collinear device in the system realize synchronous by emission wireless synchronization control signal or wired control mode.Above-mentioned discrete device is based on the closed loop synchronous mode that upper control realizes basically, the advantage of this pattern be realize simple and reliable synchronously, but its realization must have necessary hardware and environment support synchronously, and only is fit to controllable system among a small circle.Another kind of synchronous mode is to use high-precision signal source to realize that synchronously, this is applied to professional device usually, and its application cost is very high, can't enter civil area.
Also there are a lot of insurmountable problems in actual applications in the closed loop synchronous control system, for example when using closed-loop control, higher for realizing the installation cost of setting up synchronously in real time, especially the discrete wireless device of installing, needs increase extra power consumption and hardware device in order to keep synchronously, and require its hardware cost of synchronous equipment also higher relatively.How to make discrete device under the high cost performance prerequisite, what realization had self-learning function is a more scabrous problem synchronously, and especially in low-cost and low power consumption device, this problem is more outstanding; For example need realize that at field of traffic the open loop mode synchronous working then adopts the prior art means to be difficult to realize cheaply in long road interval.
Trace it to its cause, need the normally crystal oscillator of processor of the own concussion source of synchronous discrete device, and the different quality class of crystal oscillator has been represented different error numerical value.The error of crystal oscillator has three classes usually, and the first kind is the discretization error under same nominal frequency, normally is the deviate up and down at center with this nominal frequency; Second class is temperature drift, and the concussion frequency can produce drift up and down under different temperature; The 3rd class is a random drift, is common in low-quality crystal oscillator, and its concussion frequency can produce random drift.Because the error of most crystal oscillators can't be avoided, so synchronous realization at present also can only be based on the Synchronization Control of closed loop.Use high-quality crystal oscillator to realize being fine at short notice synchronously, but in long-time, realize synchronously still unusual difficulty with its own precision, thus present be synchronously the collimation technique that adopts short interval basically.In practice, the calibration intervals elongation can effectively be reduced device power consumption and requirement on devices and the whole cost of device is effectively reduced, directly bring benefits.According to measuring and calculating, every increase of the time then just reduction at least 2~8% of cost in a hour when discrete low power consumption device second synchronization of installing is keeping on the synchronization criterion basis of invariable, increases interval of calibration and equally also can create direct benefit.
The method that signal Synchronization is adjusted in the disclosed sychronous wireless communication system of Chinese patent 01112527.6 " method of adjustment of signal Synchronization in a kind of sychronous wireless communication system ", the zero-time with signal processing in the base band signal process process of reality moves forward T 0, the signal message amount of utilizing in channel estimating and the RAKE merging is increased.The method of adjustment of signal Synchronization in the disclosed sychronous wireless communication system of Chinese patent 01112528.4 " method of adjustment of signal Synchronization in a kind of sychronous wireless communication system ", in Multipath searching, by maximum, the minimal time delay that writes down each user multipaths signal, subscriber signal is adjusted synchronously, pass through each user's of downstream feedback the synchronous adjustment time at last, and transmit again synchronous to each user, write down adjusted each user multipaths signal maximum, minimal time delay synchronously respectively, and then finish the synchronous adjustment of subscriber signal.These two kinds of synchronization adjustment methods all are to estimate by the average to the synchronous transmission different delayed time in wireless signal multipath transmission course, and in downstream component, synchronizing signal is carried out compensation in advance according to estimation, make the channel estimating of different user signal disturb reduction each other, systematic function is reduced by the influence of synchronous error.Chinese patent 99109455.7 " synchro system, method for synchronous and tape deck " discloses in switch reorientation and estimation Calibration Method to the multipath synchronous error." a kind of method that improves wireless sensor network time synchronization precision " of Chinese patent 200610144352.X, the method of disclosed raising wireless sensor network time synchronization precision, at first estimate each node synchronous error, based on estimation node is detected and compensates then.Chinese patent application 200810007291.1 " a kind of time synchronized transmission method, system and device ", a kind of time synchronized transmission method that uses synchronous error average statistical to obtain propagation delay time and give the average compensation in the back level is disclosed, obtain the equipment room synchronous error, according to this synchronous error clock is compensated then, the synchronous error that the delivery lag of minimizing PPS brings, the synchronous error that guarantees the multilevel device cascade is still less than the microsecond rank.The mode of above-mentioned three synchronous errors calibration substantially all is based upon to the estimation of delivery lag and based on estimation recompenses, all do not belong to and adopt the self study mode to find error between self and the synchronisation source and the learning-oriented synchronous error correcting mode of revising voluntarily, and all be difficult in discrete device, especially use in the discrete device of field of traffic, realize and the work of synchronisation source high level of synchronization.
Summary of the invention
Technical problem to be solved by this invention is, overcome the defective that discrete synchronizer sync interval is short, nothing is revised synchronous error voluntarily that prior art exists, provide a kind of self-learning capability that has, the synchronization error correction method that application cost is low, synchronization dependability is high, widely applicable.
The present invention addresses the above problem the technical scheme that is adopted: this synchronization error correction method, be characterized in: comprise and detect synchronous error and revise the synchronous error step, described detection synchronous error step, in fixing synchronous error in detection time, detect operating synchronizer and synchronisation source clocking value separately simultaneously, according to the synchronous error numerical value between these two clocking values calculating synchronizers and the synchronisation source; Described correction synchronous error step, after detecting synchronous error numerical value, earlier just judging synchronizer than the synchronisation source speed according to the negative of synchronous error numerical value, again with set time that synchronous error equates detection time in synchronous numerical value that operating synchronizer is correspondingly exported synchronizer than the synchronisation source speed according to synchronizer deduct or add that synchronous error numerical value revises.
Synchronization error correction method of the present invention, in the described correction synchronous error step, calibrate for error and take the Fixed Time Interval mode to carry out, with set time that synchronous error equates detection time in deduct or add and detect the synchronous error numerical value that the synchronous error step records and revise, make the output synchrodata keep synchronousing working with synchronisation source.
Synchronization error correction method of the present invention, in the described correction synchronous error step, calibrate for error and take the average time interval mode to carry out, the synchronous error numerical value that detection synchronous error step records is divided equally at interval according to minimum operable time, the synchronous error numerical value that deducts in minimum interval or add after dividing equally is revised, and makes synchronizer all keep synchronousing working with synchronisation source in each minimum operable time interval.
Synchronization error correction method of the present invention, described detection synchronous error is all taked twice or twice above nested error-detecting and error correction with correction synchronous error step, after the one-time detection synchronous error, to detect synchronous error once more in the error-detecting cycle of more last time detecting fixing synchronous error length detection time that adopts, the all corresponding synchronous error step of revising after each detection synchronous error step makes the work of synchronizer approach synchronisation source.
The present invention compared with prior art has the following advantages: the present invention has overcome existing techniques in realizing discrete device sync interval weak point, has not had and revise synchronous error, the higher defective of application cost voluntarily, has designed a kind of synchronization error correction method with self-learning capability.Synchronizer in this synchronization error correction method is realizing adopting in the synchronous process error searching and the scaling method of " imitation " and " study " synchronisation source with synchronisation source, learning-oriented synchronization error correction method such as calibrates automatically according to error amount then.This mode is a kind of general synchronous error self-picketing technology, can use in almost all being furnished with discrete installation synchronizer that microprocessor is controlled, periodic; Simultaneously, it can also be realized synchronously with non-standard signal source.This synchronization error correction method is mainly used in unattended operation equipment or installs as same step calibration, for example can be applicable to the synchronous protuberant guide post of solar energy, the synchronous profile mark of solar energy and solar energy synchronizer with discrete installations such as one-step inducing marks in the road traffic field, also can be used for the controlled synchro system of antifog guiding device, have advantages such as implementation cost is low, synchronous control reliability is high, widely applicable.
Description of drawings
Fig. 1 is an embodiment of the invention synchronization error correction method flow chart.
Fig. 2 is the synchronous profile mark of the solar energy of an Application Example synchronization error correction method circuit structure block diagram.
Embodiment
Below by embodiment, the invention will be further elaborated in conjunction with the accompanying drawings.
The embodiment synchronization error correction method comprises and detects synchronous error and revise synchronous error two big steps.Detect the synchronous error step, in detection time, detect operating synchronizer and synchronisation source clocking value separately simultaneously, according to the synchronous error numerical value between these two clocking values calculating synchronizers and the synchronisation source in fixing synchronous error; Revise the synchronous error step, after detecting synchronous error numerical value, earlier according to the positive negative judgement synchronizer of synchronous error numerical value than the synchronisation source speed, again with set time that synchronous error equates detection time in synchronous numerical value that operating synchronizer is correspondingly exported synchronizer than the synchronisation source speed according to synchronizer deduct or add that synchronous error numerical value revises.
The concrete error correction flow process of this embodiment when synchronizer starts, at first obtains synchronous initial timing node, i.e. the synchronous initial numerical value T1 of synchronisation source referring to Fig. 1; After obtaining this node, with the synchronisation source synchronizing signal while, by starting synchronizer microprocessor internal timing S1; When reaching default cumulative errors make-up time S2, this time is the timing of synchronizer microprocessor internal, gathers the numerical value T2 synchronously in real time of satellite time service synchronisation source once more; With synchronisation source in real time synchronously numerical value T2 and synchronizer microprocessor internal timing S2 comparison, produces a difference, this difference is exactly the interior cumulative errors that need error correction of coming out that add up of a set time section, i.e. and synchronous error numerical value is usually with time measurement; If synchronous error numerical value be on the occasion of, expression synchronizer internal clocking is slow partially than synchronisation source, then each default make-up time section adds that the effectively synchronous numerical value that becomes behind the synchronous error numerical value after the correction exports again; If synchronous error numerical value is negative value, the internal clocking of expression synchronizer is fast than synchronisation source, and then each default make-up time section deducts the numerical value effectively synchronously that becomes behind the synchronous error numerical value after the correction and exports; If synchronous error numerical value is zero, the internal clocking of expression synchronizer is consistent with synchronisation source, directly exports synchronous numerical value and gets final product.
The error of existing crystal oscillator normally departs from nominal value, but its relative stability remains than higher.In actual applications, when the crystal oscillator that uses departs from nominal, can produce cumulative errors, if cumulative errors are not revised then the accumulation of this error can cause synchronizer to lose synchronously with respect to nominal value.Synchronization error correction method basic principle of the present invention is the searching and the scaling method of a kind of error of design, comes it is calibrated automatically according to its error amount then, to guarantee the synchronizer synchronous working.So-called be meant that the some devices in the system carry out collaborative work with one of them device or standard synchronously, in this system, the signal source that is in the position of taking the lead is synchronisation source just; And the device that is in the subordinate position will be consistent with synchronisation source, synchronous working pattern that Here it is.Synchronisation source in the common system and slave unit have been designed into the working point more approaching some position when design, when synchronizer was started working, the error of initial value was very little usually, and As time goes on, error is also among accumulation.The present invention is after slave unit obtains cumulative errors, use the mode of self study calibration that the cumulative errors that obtain are compensated calibration, a numerical value as cumulative errors deflection positive direction, then next step in service with detection time the average mode or detection time definite value regularly deduct this numerical value, otherwise then add this numerical value, can obtain a synchronous output valve through calibration.Because be that the personalized of each discrete device self study revised automatically, this synchronization error correction method can make a discrete system realize on a large scale Synchronization Control automatically.
In the correction synchronous error step of embodiment synchronization error correction method, can use Fixed Time Interval correction or average correction dual mode during round-off error.This dual mode effect is approaching, but when being to use the Fixed Time Interval correction, and to synchronizer, promptly the microprocessor of slave unit requires lowlyer, and synchronous control accuracy is also lower slightly simultaneously; When using the average correction, comparatively speaking the disposal ability of microprocessor is had relatively high expectations, but the mean error of Synchronization Control is also less.These two kinds of correcting modes are applicable to different applied environments respectively, and when being applied to signal Synchronization, for example data acquisition can be used the mean value error correcting mode; When being applied to control synchronous working, for example profile mark flicker synchronously can be used the Fixed Time Interval correction; Present embodiment promptly uses Fixed Time Interval correction.
Calibrate for error when taking the Fixed Time Interval mode to carry out, as long as deduct or add that every a set time section this error can obtain revised synchronous numerical value, set time period when the set time, section equaled to detect cumulative errors.Slave unit needs at first to obtain an initial synchronous points from synchronisation source when slave unit brings into operation in order to obtain cumulative errors, and slave unit can be realized effectively synchronously at this node and synchronisation source.Slave unit is after obtaining initial synchronisation source numerical value, and microprocessor begins to carry out internal clocking, and step-length will be decided on the precision of whole system, and for example 10% error amount with the limits of error detects as step-length.After one period cumulative time, compare with synchronisation source again, can obtain a set time section, i.e. error amount in synchronous error section detection time, this numerical value are exactly that this synchronizer is in a set time section and the synchronous error numerical value between the synchronisation source.The length of set time section treat as the step device in a fixed cycle error requirement and decide, for example require synchronous error less than 10 milliseconds of cumulative errors acquisition times then in 24 hours, promptly synchronous error section detection time is got and was got final product in 2~15 minutes.
Another kind calibrates for error and takes the average time interval mode to carry out, it is the time average error correction, the synchronous error numerical value of slave unit by recording in the regular time in the synchronous error step will be detected, be that cumulative errors are divided equally at interval according to minimum operable time, the synchronous error numerical value that deducts in minimum interval or add after dividing equally is revised, be about to record the spent time conversion of error and become section error average time, and then use the binary conversion error that has recorded to become the error amount in average time to revise, make synchronizer in each minimum operable time interval, all keep synchronousing working with synchronisation source.This mode that calibrates for error is applied to the system that the synchronization accuracy average is had relatively high expectations usually, simultaneously, uses this mode also to require microprocessor to have stronger disposal ability and higher clock frequency.Minimum operable time is mainly looked application apparatus at interval the requirement of synchronization accuracy is set, and high if synchronization accuracy requires, minimum operable time is obtained little at interval; If it is low that synchronization accuracy requires, minimum operable time is obtained greatly at interval.For example, can when the application apparatus required precision is higher, can use microsecond with microsecond, millisecond or second as minimum interval as minimum interval.
The present embodiment synchronization error correction method, when synchronous error is had high-precision requirement, long synchronous error need to be set carries out synchronous error detect step detection time, also can use repeated detection and correcting mode to calibrate, detect synchronous error and all take twice or twice above nested error-detecting and error correction with correction synchronous error step, present embodiment is taked twice nested error-detecting and error correction.After the one-time detection synchronous error, to detect synchronous error once more in the error-detecting cycle of more last time detecting fixing synchronous error length detection time that adopts, the all corresponding synchronous error step of revising after each detection synchronous error step makes the work of synchronizer approach synchronisation source.When using repeated detection usually and revising nested mode, adopt the short period to detect for the first time, carry out the calibration of synchronizer initial state, its target is to make device drop into real time execution as early as possible, desirable usually less synchronous error value detection time; Use for the second time for the first time longer time interval to correct littler error, synchronous error value detection time of desirable one-period for the second time usually, for example 12 hours or 24 hours or more long period are until infinitely approaching synchronisation source.In theory owing to all can more approaching synchronisation source after detection and the error correction each time, so after obtaining desirable synchronous error numerical value, can prolong the blanking time of error correction for the second time.But because also there is discrete randomness in synchronisation source, so synchronizer can not be kept consistent with synchronisation source for a long time, after obtaining the needed synchronization accuracy of design accuracy, synchronous error detection time that can be last is as the largest interval time of device periodic error detection.
Actual measurement shows, when being applied to a synchronizer in 5 milliseconds of errors, uses the nested pattern of twice calibration to meet the demands, and initial calibration is used 6 minutes at interval, and the interval of calibration can arrive 24 hours or longer for the second time; When being applied to the synchronous error calibrating installation of a microsecond level, use and calibrate nested pattern three times and meet the demands, primary synchronous error detects should be no less than 15 minutes, and synchronous error detects and should be no less than 60 minutes for the second time, and synchronous error detects and should be no less than 12 hours for the third time.
Take the discrete synchronizer of prior art control must be in very short interval will with the synchronisation source Synchronization Control once, use the Synchronization Control that then disperses between synchronizer and the synchronisation source behind the synchronization error correction method of the present invention can extend to 24 hours or longer at interval, be beneficial to and reduce discrete synchronizer low energy consumption, and implement low-cost synchronously.In the synchronous error calibration process that in next 24 hours time period, carries out again, can obtain a time interval again and be 24 hours synchronous error, this error be introduced revised synchronous error step then the synchronization accuracy of this synchronizer and synchronisation source can be more and more higher.Use synchronization error correction method of the present invention, be beneficial to and reduce discrete synchronizer low energy consumption, and implement low-cost synchronously.
The application example that the embodiment synchronization error correction method is put at the synchronous profile of solar energy:
The synchronous profile of solar energy mark is mainly used in highway and shows as road profile, and using more is retro-reflection type profile mark, and this profile is marked and can not be brought into play effective road profile demonstration effect under the low visibility environment.To under the low visibility environment of road traffic field, effectively use, must allow profile mark the sensation that synchronous flicker can highlight " line ", can clear effective demonstration road profile.Solar energy profile mark will be based on solar powered, and synchronisation source uses the satellite time service; Operating time of once charging was not less than 72 hours, considered based on application cost, realized in 24 hours that time service can not be above twice.The synchronous profile target of this application example solar energy circuit structure is referring to Fig. 2, and among the figure, WXMK is the satellite receiver module, is equivalent to the effect of synchronisation source; CPU is a microprocessor, and the low-power consumption microprocessor of almost most of tape program control all can satisfy instructions for use; FZSB is a load equipment, mainly is the LED that profile is put on; TYNDC is a solar cell, is responsible for to the power supply of whole profile mark.The error correction of the synchronous profile mark of solar energy Application Example synchronization error correction method is to operate in the microprocessor CPU, satellite receiver module WXMK provides the synchronous zero-time from synchronisation source, microprocessor CPU is calibrated internal clocking according to the synchronizing signal of synchronisation source, export control signal then and drive load equipment FZSB, thereby realize the synchronous operation of the synchronous profile mark of the discrete solar energy of installing.Whole error correction flow process as shown in Figure 1.
Above embodiment has done comparatively detailed description to synchronization error correction method of the present invention; but these descriptions are not in order to limit protection scope of the present invention; any technical staff who is familiar with this technology; change and the retouching done in not breaking away from design of the present invention and scope all should belong to protection scope of the present invention.

Claims (4)

1. synchronization error correction method, it is characterized in that: comprise and detect synchronous error and revise the synchronous error step, described detection synchronous error step, in fixing synchronous error in detection time, detect operating synchronizer and synchronisation source clocking value separately simultaneously, according to the synchronous error numerical value between these two clocking values calculating synchronizers and the synchronisation source; Described correction synchronous error step, after detecting synchronous error numerical value, earlier just judging synchronizer than the synchronisation source speed according to the negative of synchronous error numerical value, again with set time that synchronous error equates detection time in synchronous numerical value that operating synchronizer is correspondingly exported synchronizer than the synchronisation source speed according to synchronizer deduct or add that synchronous error numerical value revises.
2. synchronization error correction method according to claim 1, it is characterized in that: in the described correction synchronous error step, calibrate for error and take the Fixed Time Interval mode to carry out, with set time that synchronous error equates detection time in deduct or add and detect the synchronous error numerical value that the synchronous error step records and revise, make the output synchrodata keep synchronousing working with synchronisation source.
3. synchronization error correction method according to claim 1, it is characterized in that: in the described correction synchronous error step, calibrate for error and take the average time interval mode to carry out, the synchronous error numerical value that detection synchronous error step records is divided equally at interval according to minimum operable time, the synchronous error numerical value that deducts in minimum interval or add after dividing equally is revised, and makes synchronizer all keep synchronousing working with synchronisation source in each minimum operable time interval.
4. according to claim 2 or 3 described synchronization error correction methods, it is characterized in that: described detection synchronous error is all taked twice or twice above nested error-detecting and error correction with correction synchronous error step, after the one-time detection synchronous error, to detect synchronous error once more in the error-detecting cycle of more last time detecting fixing synchronous error length detection time that adopts, the all corresponding synchronous error step of revising after each detection synchronous error step makes the work of synchronizer approach synchronisation source.
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Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103532652A (en) * 2013-10-18 2014-01-22 杭州华三通信技术有限公司 Time synchronizing device and method
CN103532693A (en) * 2013-10-18 2014-01-22 杭州华三通信技术有限公司 Time synchronizing device and method
CN103067150B (en) * 2012-12-27 2015-11-18 四川九洲电器集团有限责任公司 The calibration system of time synchronized
CN105445005A (en) * 2015-11-18 2016-03-30 江西洪都航空工业集团有限责任公司 Synchronization measurement device and method thereof
CN106454473A (en) * 2016-10-08 2017-02-22 广东欧珀移动通信有限公司 Clock adjustment method and device, terminal and playing system
CN108107433A (en) * 2017-12-05 2018-06-01 北京无线电计量测试研究所 One kind is used for the pinpoint method of millimetre-wave radar system
CN108964821A (en) * 2018-04-20 2018-12-07 佛山市竣智文化传播股份有限公司 A kind of method of self synchronous satellite positioning device and its time synchronization
CN109239640A (en) * 2018-07-04 2019-01-18 国网浙江宁波市奉化区供电有限公司 Ammeter clock correction method based on mean difference
CN112110158A (en) * 2020-07-29 2020-12-22 上海大学 Multi-line automatic synchronous control method for suspension conveying line
CN116887077A (en) * 2023-09-07 2023-10-13 南通市计量检定测试所 Multi-instrument synchronous acquisition data analysis processing method for large-scale equipment

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101399653A (en) * 2007-09-25 2009-04-01 普然通讯技术(上海)有限公司 Time clock synchronization implementation method
CN101515831A (en) * 2008-02-22 2009-08-26 杭州华三通信技术有限公司 Method, system and device for time synchronous transfer

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101399653A (en) * 2007-09-25 2009-04-01 普然通讯技术(上海)有限公司 Time clock synchronization implementation method
CN101515831A (en) * 2008-02-22 2009-08-26 杭州华三通信技术有限公司 Method, system and device for time synchronous transfer

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103067150B (en) * 2012-12-27 2015-11-18 四川九洲电器集团有限责任公司 The calibration system of time synchronized
CN103532693B (en) * 2013-10-18 2017-05-10 新华三技术有限公司 Time synchronizing device and method
CN103532693A (en) * 2013-10-18 2014-01-22 杭州华三通信技术有限公司 Time synchronizing device and method
CN103532652A (en) * 2013-10-18 2014-01-22 杭州华三通信技术有限公司 Time synchronizing device and method
CN103532652B (en) * 2013-10-18 2016-06-08 杭州华三通信技术有限公司 A kind of time synchronism apparatus and method
CN105445005A (en) * 2015-11-18 2016-03-30 江西洪都航空工业集团有限责任公司 Synchronization measurement device and method thereof
CN106454473A (en) * 2016-10-08 2017-02-22 广东欧珀移动通信有限公司 Clock adjustment method and device, terminal and playing system
CN106454473B (en) * 2016-10-08 2019-12-03 Oppo广东移动通信有限公司 Clock adjustment, device, terminal and play system
CN108107433A (en) * 2017-12-05 2018-06-01 北京无线电计量测试研究所 One kind is used for the pinpoint method of millimetre-wave radar system
CN108107433B (en) * 2017-12-05 2023-03-03 北京无线电计量测试研究所 Method for accurately positioning millimeter wave radar system
CN108964821A (en) * 2018-04-20 2018-12-07 佛山市竣智文化传播股份有限公司 A kind of method of self synchronous satellite positioning device and its time synchronization
CN109239640A (en) * 2018-07-04 2019-01-18 国网浙江宁波市奉化区供电有限公司 Ammeter clock correction method based on mean difference
CN112110158A (en) * 2020-07-29 2020-12-22 上海大学 Multi-line automatic synchronous control method for suspension conveying line
CN116887077A (en) * 2023-09-07 2023-10-13 南通市计量检定测试所 Multi-instrument synchronous acquisition data analysis processing method for large-scale equipment
CN116887077B (en) * 2023-09-07 2023-11-24 南通市计量检定测试所 Multi-instrument synchronous acquisition data analysis processing method for large-scale equipment

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Application publication date: 20100908