CN101808029A - Method and device for preloading packet header and system using method - Google Patents
Method and device for preloading packet header and system using method Download PDFInfo
- Publication number
- CN101808029A CN101808029A CN200910009501A CN200910009501A CN101808029A CN 101808029 A CN101808029 A CN 101808029A CN 200910009501 A CN200910009501 A CN 200910009501A CN 200910009501 A CN200910009501 A CN 200910009501A CN 101808029 A CN101808029 A CN 101808029A
- Authority
- CN
- China
- Prior art keywords
- bag
- packet head
- header data
- positional information
- main storage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Abstract
The invention relates to a method and a device for preloading a packet header and a system applying the method. In the method, before a central processing unit executes downloading data of the packet header, packet header data is downloaded from a main memory in advance to a packet header register so as to accelerate the processing speed of the packet header data.
Description
Technical field
The present invention relates to a kind of bag and handle particularly a kind of method and apparatus of packet head preload.
Background technology
The internet is universal day by day, and various application also develops rapidly thereupon, and many team also devote the research of the data transmission performance that promotes the internet in succession.In different use occasions, the packet length that allows during transfer of data to use is not quite similar, and comprises multiple bag data operation handling procedure, as check, disassemble, make up, the comparison of search, content, transmission supervisor.Rise and a large amount of bag transfer of data along with the bandwidth demand of network applications such as home network, campus network and enterprise network is rapid, the calculation process technical development of the transmission performance of bag and bag also comes into one's own day by day.
In the network packet data were used, for guaranteeing its service quality, thereby transmission had some relevant requirements to bag.For example, in the application of voice-over-net service, bag is delayed causing echo and trill.When bag was delayed, people's ear just can have been told echo and occur.Good Network Transmission environment and bag data processing performance need guarantee that bag delays being lower than 150 milliseconds.It approximately is 150 milliseconds to 400 milliseconds that the receptible sound of people's ear is delayed.Surpass 400 milliseconds delay can cause sound quality abominable and can't answer.Therefore, except strengthening the network transmission quality, the transmission of all types of bags also needs suitably to manage opportunity.For example, indicate the processing priority of described bag, the network equipment subsequently can and be handled according to the demand of its service characteristic according to the emergency degree.
Along with network transfer speeds improves constantly and need the package informatin of processed voice transmission simultaneously and multimedia transmission, be to promote the performance of handling, multiple technologies and method are suggested.For example, System on Chip/SoC design manufacturer is devoted to improve computing clock, the increasing cache memory space of CPU or uses special disposal bag operation of data processor in system.Yet above-mentioned mode has also improved cost and power loss thereupon.Therefore industrial circle needs a kind ofly can improve the method for wrapping transmission speed in mode cheaply.
Summary of the invention
Packet head preload method and apparatus of the present invention was downloaded to described packet head data in the one packet head register to quicken described packet head processing speed of data before CPU is carried out download one packet head data in advance.
One embodiment of the invention disclose a kind of packet head preloading device, and described packet head preloading device comprises at least one bag detector, at least one packet head register and at least one data scheduler.Described at least one bag detector is stored at least one bag the action of one main storage in order to monitor at least one bag direct memory access (DMA) controller.Described at least one data scheduler is in order to read and to be deposited at described at least one packet head register with the header data of described at least one bag from described main storage.
Another embodiment of the present invention discloses the pre-support method of a kind of packet head.Described method comprises the following step: monitor the action that at least one bag direct memory access (DMA) controller is stored at least one bag one main storage; Download in header data to the packet head register of described at least one bag; And if in a setting-up time, a CPU wishes to read the header data of described at least one bag, provide the header data of described at least one bag so by described packet head register.
One embodiment of the invention disclose a kind of system, and it comprises medium access control, a bag direct memory access (DMA) controller, a CPU, a main storage and a packet head preloading device.Described packet head preloading device is monitored described bag direct memory access (DMA) controller at least one bag is stored to the action of a main storage, and reads in advance do not read the header data of described at least one bag as yet in described CPU before.And if when described CPU wished to read the header data of described bag in a setting-up time, the header data of so described bag was provided by described packet head preloading device.
Description of drawings
Fig. 1 shows the bag treatment system block diagram of one embodiment of the invention;
Fig. 2 shows the block diagram of the packet head preloading device of one embodiment of the invention;
Fig. 3 shows the block diagram of the packet head preloading device of another embodiment of the present invention; And
Fig. 4 shows the flow chart of the pre-support method of packet head of an embodiment more of the present invention.
Embodiment
Fig. 1 shows the bag treatment system block diagram of one embodiment of the invention.(media access control, MAC) 103 control modes that addressing and medium access be provided make that the node on distinct device or the network can be at the network communication of multiple spot for medium access control.After medium access control 103 received bag, (direct memory access, DMA) controller 102 transmitted data to main storage 101 via bag direct memory access (DMA).In embodiments of the present invention, described main storage 101 can be dynamic random access memory, Synchronous Dynamic Random Access Memory or binary channels Synchronous Dynamic Random Access Memory.Read packet head data by main storage 101 to the cache memory 105 in CPU 106, packet head preloading device 104 is promptly finished described bag in advance and is read work, and stores described packet head data to packet head preloading device 104.
Fig. 2 shows the interior block diagram of packet head preloading device 104.Described packet head preloading device 104 comprises a bag detector 201, positional information formation 202, packet head register 203, timer 204 and data scheduler 205.The described bag direct memory access (DMA) controller 102 of bag detector 201 monitorings is stored to bag the action of main storage 101.When described bag detector 201 detects a bag and is stored to the action of main storage 101 by direct memory access (DMA) 102, be about to the described deposit position that wraps in main storage 101 and be stored in addition in the positional information formation 202.The length of positional information formation 202 can be set the size of described length via the user.203 in packet head register is downloaded the header data of described bag according to the deposit position that wraps in main storage 101 in the positional information formation 202 in packet head register 203 by data scheduler 205.In embodiments of the present invention, described packet head register 203 can be static RAM.After described bag download was finished, timer 204 was set one immediately and is deposited the time.When CPU 106 will be downloaded the header data of described bag, then directly download, and need not download from main storage 101 from packet head register 203.On the other hand, through described setting deposit the time after, if CPU 106 does not read described packet head data yet, remove in packet head register 203 and the positional information formation 202 all storage data so.Wherein a kind of mode that the bag detector 201 of the embodiment of the invention can software be realized, hardware is realized, realize on the platform of embedded single-processor or multiprocessor realizes.
Fig. 3 shows the system block diagram of the packet head preloading device of another embodiment of the present invention.Packet head preloading device 300 comprises ethernet port bag detector 301, positional information formation 302, wireless lan port bag detector 303, positional information formation 304, ethernet port packet head register 305, timer 306, wireless lan port packet head register 307, timer 308 and data scheduler 309.
Ethernet port bag detector 301 and wireless lan port bag detector 303 are monitored the action that ethernet port bag direct memory access (DMA) controller 310 and wireless lan port bag direct memory access (DMA) controller 311 are stored to bag main storage 101 respectively.When ethernet port bag detector 301 detects a bag and is stored to the action of main storage 101 by ethernet port bag direct memory access (DMA) controller 310, be about to the described deposit position that wraps in main storage 101 and be stored in the positional information formation 302.305 in ethernet port packet head register is downloaded the header data of described bag according to the deposit position that wraps in main storage 101 in the positional information formation 302 in ethernet port packet head register 305 by data scheduler 309.After described bag download was finished, timer 306 was set one immediately and is deposited the time.When CPU will be downloaded the header data of described bag, then directly download, and need not download from main storage 101 by data scheduler 309 again from packet head register 305.On the other hand, through described setting deposit the time after, if CPU does not read described packet head data yet, remove in ethernet port packet head register 305 and the positional information formation 302 all storage data so.
In the same manner, when wireless lan port bag detector 303 detects a bag and is stored to the action of main storage 101 by wireless lan port bag direct memory access (DMA) controller 311, be about to the described deposit position that wraps in main storage 101 and be stored in the positional information formation 304.307 in wireless lan port packet head register is downloaded the header data of described bag according to the deposit position that wraps in main storage 101 in the positional information formation 304 in wireless lan port packet head register 307 by data scheduler 309.After described bag download was finished, timer 308 was set one immediately and is deposited the time.When CPU will be downloaded the header data of described bag, then directly download, and need not download from main storage 101 by data scheduler 309 again from wireless lan port packet head register 307.On the other hand, through described setting deposit the time after, if CPU does not read described packet head data yet, remove in wireless lan port packet head register 307 and the positional information formation 304 all storage data so.In the embodiment of the invention, ethernet port packet head register 305 and wireless lan port packet head register 307 can be static RAM.The length of positional information formation 302 and positional information formation 304 can be set the size of described length via the user.Wherein a kind of mode that the ethernet port bag detector 301 of the embodiment of the invention and wireless lan port bag detector 303 can software be realized, hardware is realized, realize on the platform of embedded single-processor or multiprocessor realizes.
In order to make the those skilled in the art instruction by present embodiment implement the present invention, the following above-mentioned packet head preloading device of collocation proposes the embodiment of the pre-support method of a packet head in addition.
Fig. 4 shows the flow chart of the pre-support method of packet head of an embodiment more of the present invention.In step S401, a bag detector keeps monitoring bag access status.In step S402, judge whether by the action of direct storage access storage one bag to a main storage.Continue to keep monitoring if no, get back to step S401 so.If have, in step S403, the described deposit position that wraps in main storage is stored in the positional information formation so.In step S404, a packet head register is then according to the deposit position that wraps in main storage in the positional information formation, and the header data of downloading described bag by a data scheduler is in the packet head register.The header data of downloading described bag is promptly removed the positional information of wrapping described in the described positional information formation to described packet head register.In step S405, set one and deposit the time.In step S406, judge whether to be read.If in step S408, remove the storage data of described packet head register so.If not, in step S407, judge whether to surpass described depositing the time so.If not, getting back to step S406 so judges whether to be read once more.If in step S409, remove the data of all storages in described packet head register and the described positional information formation so.
In sum, packet head preload method and apparatus of the present invention was downloaded to described packet head data in the one packet head register to quicken described packet head processing speed of data before CPU is carried out download one packet head data in advance.In addition, the present invention incorporates into has setting one to deposit the mechanism of time to promote the robustness of packet head preloading device pack processing of the present invention.
Technology contents of the present invention and technical characterstic disclose as above, yet the those skilled in the art still may be based on teaching of the present invention and announcement and done all replacement and modifications that does not break away from spirit of the present invention.Therefore, protection scope of the present invention should be not limited to embodiment and disclose, and should comprise various do not break away from replacement of the present invention and modifications, and is contained by appending claims.
Claims (20)
1. the device of a packet head preload is characterized in that it comprises:
At least one bag detector is stored at least one bag the action of main storage in order to monitor at least one bag direct memory access (DMA) controller;
At least one packet head register; And
At least one data scheduler is in order to read and to be deposited at described at least one packet head register with the header data of described at least one bag from described main storage.
2. device according to claim 1 is characterized in that it comprises timer in addition, and described timer is coupled in described packet head register and is stored in the time of described packet head register in order to the header data of calculating described bag.
3. device according to claim 1 is characterized in that it comprises the positional information formation in addition, and described positional information formation is coupled in described bag detector and in order to store the described position that wraps in described main storage.
4. device according to claim 1 is characterized in that wherein said at least one bag detector comprises ethernet port bag detector and wireless lan port bag detector.
5. device according to claim 1 is characterized in that wherein said at least one packet head register comprises ethernet port packet head register and wireless lan port packet head register.
6. device according to claim 1 is characterized in that wherein said bag direct memory access (DMA) controller is ethernet port bag direct memory access (DMA) controller or wireless lan port bag direct memory access (DMA) controller.
7. device according to claim 1 is characterized in that wherein said packet head register is a static RAM.
8. device according to claim 1 is characterized in that wherein said main storage is dynamic random access memory, Synchronous Dynamic Random Access Memory or binary channels Synchronous Dynamic Random Access Memory.
9. device according to claim 1, it is characterized in that wherein said bag detector be with software realize, hardware is realized, realize on the platform of embedded single-processor or multiprocessor.
10. the method for a packet head preload is characterized in that it comprises:
Monitor at least one action of wrapping of at least one bag direct memory access (DMA) controller storage to main storage;
The header data of downloading described at least one bag is to the packet head register; And
If in setting-up time, CPU will read the header data of described at least one bag, and the header data of described at least one bag is provided by described packet head register so.
11. method according to claim 10 is characterized in that it comprises in addition with the step of the described location storage that wraps in described main storage to the positional information formation.
12. method according to claim 11, header data to the step in the described packet head register that it is characterized in that wherein downloading described bag is according to the positional information of wrapping described in the described positional information formation.
13. method according to claim 11 is characterized in that it is additionally contained in the step that header data of downloading described bag is removed the positional information of wrapping described in the described positional information formation to the described packet head register.
14. method according to claim 11, the length that it is characterized in that wherein said positional information formation are the settings according to the user.
15. method according to claim 10 is characterized in that it comprises the following step in addition:
After being read by described CPU, the header data of described bag removes the header data of described bag;
The header data of downloading next bag is to described packet head register.
16. method according to claim 11 is characterized in that it comprises the following step in addition:
If the header data of described bag surpasses when not read by described CPU yet behind the setting-up time, remove the header data of described bag and all storage data of described positional information formation so.
17. method according to claim 10 is characterized in that wherein said storage action is the burst write activity.
18. system, it is characterized in that it comprises medium access control, bag direct memory access (DMA) controller, CPU, main storage and packet head preloading device, wherein said packet head preloading device is monitored described bag direct memory controller is stored the action that at least one bag is accessed to main storage, and before not reading the header data of described at least one bag as yet, described CPU reads in advance, if and when described CPU will read the header data of described bag in setting-up time, provide by described packet head preloading device so.
19. system according to claim 18 is characterized in that wherein said packet head preloading device comprises:
At least one bag detector is stored to described at least one bag the action of described main storage in order to the described at least bag direct memory access (DMA) controller of monitoring;
At least one packet head register; And
At least one data scheduler is in order to read and to be deposited at described at least one packet head register with the header data of described at least one bag from described main storage.
20. system according to claim 19 is characterized in that wherein said packet head preloading device comprises the positional information formation in addition, described positional information formation is coupled in described bag detector and in order to store the described position that wraps in described main storage.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009100095015A CN101808029B (en) | 2009-02-13 | 2009-02-13 | Method and device for preloading packet header and system using method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009100095015A CN101808029B (en) | 2009-02-13 | 2009-02-13 | Method and device for preloading packet header and system using method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101808029A true CN101808029A (en) | 2010-08-18 |
| CN101808029B CN101808029B (en) | 2013-03-13 |
Family
ID=42609651
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2009100095015A Expired - Fee Related CN101808029B (en) | 2009-02-13 | 2009-02-13 | Method and device for preloading packet header and system using method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101808029B (en) |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7333489B1 (en) * | 2000-05-08 | 2008-02-19 | Crossroads Systems, Inc. | System and method for storing frame header data |
| US7075926B2 (en) * | 2000-05-24 | 2006-07-11 | Alcatel Internetworking, Inc. (Pe) | Programmable packet processor with flow resolution logic |
| CN100440854C (en) * | 2004-06-25 | 2008-12-03 | 中国科学院计算技术研究所 | A data packet receiving interface component of network processor and storage management method thereof |
-
2009
- 2009-02-13 CN CN2009100095015A patent/CN101808029B/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| CN101808029B (en) | 2013-03-13 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101841470B (en) | High-speed capturing method of bottom-layer data packet based on Linux | |
| CN101707565B (en) | Method and device for transmitting and receiving zero-copy network message | |
| CN106161110B (en) | Data processing method and system in a kind of network equipment | |
| CN108829713A (en) | Distributed cache system, cache synchronization method and device | |
| CN105376129B (en) | One kind 1394 bus transaction layers-link layer data packet transmission circuit and method | |
| CN101478472A (en) | Socket data transmission processing method and apparatus | |
| JP2008500638A (en) | Data mover controller with multiple registers to support cryptographic operations | |
| JP2005322230A5 (en) | ||
| CN102750245B (en) | Message method of reseptance, message receiver module, Apparatus and system | |
| CN101442548A (en) | Solid-state hard disk and operation method thereof | |
| CN115103036A (en) | Efficient TCP/IP datagram processing method and system | |
| CN101808029B (en) | Method and device for preloading packet header and system using method | |
| EP3720089A1 (en) | Data processing method and apparatus | |
| CN101695045A (en) | Method and device for realizing Ethernet messaging | |
| CN103995789B (en) | A kind of direct memory access realizes system and method | |
| CN103888939B (en) | Outbound/inbound message management method of Beidou RDSS system user machine and user machine | |
| CN110737609B (en) | Data management method, device, equipment and storage medium based on virtual register | |
| US7379453B1 (en) | Method and apparatus for transferring multiple packets from hardware | |
| CN103297474A (en) | Batching processing sub-packet method and batching processing sub-packet system | |
| CN111158936A (en) | Method and system for queue exchange information | |
| CN106506189A (en) | Virtual platform real-time and non-real-time processing environment data exchange method | |
| CN218772135U (en) | Sampling value message sending device based on Linux system | |
| CN115622958B (en) | ZYNQ system and virtual MAC implementation method | |
| CN103514126A (en) | Method, system and device for receiving data | |
| CN100428670C (en) | User-level communication method for stream media server |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130313 Termination date: 20140213 |