CN101798059A - Production method of silicon-based nanopore - Google Patents

Production method of silicon-based nanopore Download PDF

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Publication number
CN101798059A
CN101798059A CN201010140180A CN201010140180A CN101798059A CN 101798059 A CN101798059 A CN 101798059A CN 201010140180 A CN201010140180 A CN 201010140180A CN 201010140180 A CN201010140180 A CN 201010140180A CN 101798059 A CN101798059 A CN 101798059A
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silicon
silicon substrate
etching
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CN101798059B (en
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司卫华
刘泽文
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Tsinghua University
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Tsinghua University
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Abstract

The invention provides a production method of a silicon-based nanopore, which comprises the following steps of: 1. covering a protecton material and a top protection material on a silicon substrate, and machining a pattern which needs to be etched on the silicon substrate onto the two layers of protection materials with a micro-production technology, wherein the depth of the pattern reaches the surface of the bottom of the silicon substrate; 2. etching a perpendicular columnar pore on the surface of the bottom of the silicon substrate with a deep reaction ion etching DRIE method; 3. coating photoresist on the surface of the columnar pore; and 4. continually downwards corroding from the end of the columnar pore with potassium hydroxide alkaline solution by means of wet etching, so that an included angle between a corroded inclined plane and the horizontal plane is 53.7 degrees, so as to obtain the silicon-based nanopore with controllable size. The production method provides technical support for the surface controlling technology of atomic beam and the other nanometer machining technologies, and plays a role in promoting.

Description

A kind of preparation method of silicon-based nanopore
Technical field
The present invention relates to silicon face process technology and deep process technology field, particularly be used for the preparation method of a kind of silicon-based nanopore of atom lithography.
Background technology
In nanometer manufacturing field, the atom optics The Application of Technology is an emerging research field, and the method for multiple manufacturing nanoscale material can be provided.The research of a large amount of basic atoms optics provides the method for many different free neutral atoms of manipulation.The main direction of research is the control that atom moves when atom convergence surface now, and purpose is to construct nanostructured arbitrarily on substrate surface.Nano-pore, nanoscale striped, dot matrix or the needed specific pattern of making different size can be used for carrying out atom and move control.
At present about the making of silicon-based nanopore extraordinary method not, this mainly is that characteristics by silicon-based nanopore itself determine.About the hundreds of micron, want on silicon chip, to form the hole or the striped of nanometer scale at the thickness of the common silicon chip that semicon industry is used, technically point-device control will be arranged.Synthetic method is mainly adopted in the making of existing nano-pore or nanometer sieve.People such as Mintova utilize the original position hydrothermal crystallization method to obtain Silicalite-1 nano molecular sieve crystal grain [the document 1:Mintova S that particle diameter is evenly distributed first, Mo S, Bein T.[J] .Nanosized AlPO4-5 molecular sieves and ultrathin filmsprepared by microwave synthesis.Chem.Mater, 1998,10 (12): 4030~4036], this method operating process is simple, do not need special device, but the poor reproducibility of the molecular sieve crystal size of this method preparation and orientation control, obtain the film of fine and close free of pinholes, at least need several microns thickness, thereby very easily produce be full of cracks when having caused warm change, even come off.People's applied microwave heating techniques such as Xu have successfully been synthesized NaA type molecular screen membrane [document 2:Xu X C, Yang W S, Liu J, et al.[J] .Synthesis of ahigh-permeance NaA zeolite membrane by microwave heating Adv.Mater, 2000,12 (3): 195~197], this method can improve crystallization velocity, and dwindled crystalline size to a certain extent, pile up but local molecular sieve takes place easily, be difficult to be controlled at the support base material surface and form the even and fine and close molecular screen membrane of large tracts of land.
Summary of the invention
In order to overcome the defective of above-mentioned prior art, the object of the present invention is to provide a kind of preparation method of silicon-based nanopore, can when atom convergence surface, control moving of atom.
In order to achieve the above object, technical scheme of the present invention is achieved in that
A kind of preparation method of silicon-based nanopore may further comprise the steps:
One, covering protection material 2 and top layer protective material 3 on silicon substrate 1, protective material 2 adopts the chromium layer of sputter, thickness is 300nm, top layer protective material 3 adopts the aluminium lamination of sputter, thickness is 300nm, need be worked on the two-layer protective material at the figure that etches on the silicon substrate 1 with Micrometer-Nanometer Processing Technology, the degree of depth of figure arrives the surface of silicon substrate 1;
Two, the method at the surface of silicon substrate 1 utilization deep reaction ion etching DRIE etches vertical cylinder hole, the degree of depth of etching depend on the thickness of used silicon chip and the silicon nano hole that will make between distance, according to the distance between the characteristic of anisotropic silicon wet etching and the silicon nano hole that will make, can obtain the degree of depth of wet etching, the degree of depth of deep reaction ion etching DRIE etching is the degree of depth that the thickness of silicon chip deducts wet etching;
Three, coat photoresist 5 on the surface 6 of cylinder hole;
Four, adopt wet etching, utilizing concentration is 30% potassium hydroxide alkalescence solution, down continues corrosion from the cylinder hole end, makes that the inclined-plane 4 that erodes away and the angle of horizontal plane are 53.7 °, obtains the silicon nano hole 7 of controllable size at last.
Preparation method of the present invention has been avoided traditional synthetic method, and the characteristics that adopt deep reaction ion etching DRIE dry etching and wet etching to combine are made silicon nano hole on common silicon chip.Top layer protective material 3 can be avoided in dry etching the etching to protective material 2 in the preparation method of the present invention; protective material 2 can avoid in wet etching solution to the corrosion of the silicon substrate under the protective layer 1; matcoveredn 5 on the surface 6 of cylinder hole avoids that the silicon materials of side are corroded in wet etching course.
Description of drawings
Fig. 1 is the profile of manufacturing process of the present invention.
Fig. 2 is the front elevation of manufacturing process of the present invention.
Fig. 3 is the vertical view of manufacturing process of the present invention.
The structural representation of the silicon-based nanopore that Fig. 4 produces for the present invention.
The specific embodiment
Below in conjunction with accompanying drawing principle of the present invention is elaborated.
A kind of preparation method of silicon-based nanopore may further comprise the steps:
One, referring to Fig. 1, covering protection material 2 and top layer protective material 3 on silicon substrate 1, purpose is to form the silicon corrosion window that has protective layer, in dry etching and wet etching process, protected portions is not corroded, protective material 2 adopts the chromium layer of sputter, thickness is 300nm, top layer protective material 3 adopts the aluminium lamination of sputter, thickness is 300nm, need be worked on the two-layer protective material at the figure that etches on the silicon substrate 1 with Micrometer-Nanometer Processing Technology, the degree of depth of figure arrives the surface of silicon substrate 1;
Two, referring to Fig. 2, method at the surface of silicon substrate 1 utilization deep reaction ion etching DRIE etches vertical cylinder hole, the degree of depth of etching depend on the thickness of used silicon chip and the silicon nano hole that will make between distance, according to the distance between the characteristic of anisotropic silicon wet etching and the silicon nano hole that will make, can obtain the degree of depth of wet etching, the degree of depth that the thickness of silicon chip deducts wet etching can obtain the degree of depth of deep reaction ion etching DRIE etching;
Three, referring to Fig. 1, Fig. 2, coat photoresist 5 on the surface 6 of cylinder hole, avoid that the silicon materials of side are corroded in wet etching course;
Four, referring to Fig. 4, adopt wet etching, utilizing concentration is 30% potassium hydroxide alkalescence solution, down continues corrosion from the cylinder hole end,, make that the inclined-plane 4 that erodes away and the angle of horizontal plane are 53.7 °, obtain the silicon nano hole 7 of controllable size at last.

Claims (1)

1. the preparation method of a silicon-based nanopore is characterized in that, may further comprise the steps:
One, goes up covering protection material (2) and top layer protective material (3) at silicon substrate (1), protective material (2) adopts the chromium layer of sputter, thickness is 300nm, top layer protective material (3) adopts the aluminium lamination of sputter, thickness is 300nm, the figure that need etch on silicon substrate (1) with Micrometer-Nanometer Processing Technology is worked on the two-layer protective material, and the degree of depth of figure arrives the surface of silicon substrate (1);
Two, the method at the surface of silicon substrate (1) utilization deep reaction ion etching DRIE etches vertical cylinder hole, the degree of depth of etching depend on the thickness of used silicon chip and the silicon nano hole that will make between distance, according to the distance between the characteristic of anisotropic silicon wet etching and the silicon nano hole that will make, can obtain the degree of depth of wet etching, the degree of depth of deep reaction ion etching DRIE etching is the degree of depth that the thickness of silicon chip deducts wet etching;
Three, coat photoresist (5) on the surface (6) of cylinder hole;
Four, adopt wet etching, utilizing concentration is 30% potassium hydroxide alkalescence solution, down continues corrosion from the cylinder hole end, makes that the inclined-plane (4) that erodes away and the angle of horizontal plane are 53.7 °, obtains the silicon nano hole (7) of controllable size at last.
CN 201010140180 2010-04-06 2010-04-06 Production method of silicon-based nanopore Active CN101798059B (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102079504A (en) * 2010-12-07 2011-06-01 清华大学 Method for manufacturing high-density silicon-based nano-holes
CN102126699A (en) * 2011-01-28 2011-07-20 清华大学 Method for making graph with microsize by utilizing atomic beams and nanometer holes

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5549275A (en) * 1978-10-06 1980-04-09 Fuji Xerox Co Ltd Multi-nozzle orifice plate
US6706203B2 (en) * 2001-10-30 2004-03-16 Agilent Technologies, Inc. Adjustable nanopore, nanotome, and nanotweezer
US20090061578A1 (en) * 2007-08-30 2009-03-05 Siew-Seong Tan Method of Manufacturing a Semiconductor Microstructure
KR20090121544A (en) * 2008-05-22 2009-11-26 한양대학교 산학협력단 Method for forming nanopore

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5549275A (en) * 1978-10-06 1980-04-09 Fuji Xerox Co Ltd Multi-nozzle orifice plate
US6706203B2 (en) * 2001-10-30 2004-03-16 Agilent Technologies, Inc. Adjustable nanopore, nanotome, and nanotweezer
US20090061578A1 (en) * 2007-08-30 2009-03-05 Siew-Seong Tan Method of Manufacturing a Semiconductor Microstructure
KR20090121544A (en) * 2008-05-22 2009-11-26 한양대학교 산학협력단 Method for forming nanopore

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102079504A (en) * 2010-12-07 2011-06-01 清华大学 Method for manufacturing high-density silicon-based nano-holes
CN102126699A (en) * 2011-01-28 2011-07-20 清华大学 Method for making graph with microsize by utilizing atomic beams and nanometer holes

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