CN101763241B - Large integer modular arithmetic device for realizing signature algorithm in ECC cryptosystem and modular method therefor - Google Patents
Large integer modular arithmetic device for realizing signature algorithm in ECC cryptosystem and modular method therefor Download PDFInfo
- Publication number
- CN101763241B CN101763241B CN2010100136291A CN201010013629A CN101763241B CN 101763241 B CN101763241 B CN 101763241B CN 2010100136291 A CN2010100136291 A CN 2010100136291A CN 201010013629 A CN201010013629 A CN 201010013629A CN 101763241 B CN101763241 B CN 101763241B
- Authority
- CN
- China
- Prior art keywords
- data
- module
- integer
- mould
- result
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Landscapes
- Complex Calculations (AREA)
Abstract
The invention discloses a large integer modular arithmetic device for realizing signature algorithm in an ECC cryptosystem; the device comprises an integer register, a module value register, an integer searching module, a module value searching module, a digit number subtraction module, a shift register, a data subtraction module and an output module, wherein the integer register stores the value of integer a to be modularized; the module value register stores the value of module n; the module value searching module searches the digit number of the most significant digit of the module n; the integer searching module searches the bit number of most significant digit of the data a in the integer register; the digit number subtraction module calculates the digit difference between the most significant digit of the integer a and the most significant digit of the module n; when the digit difference is more than 0, the shift register shifts data n to the left twice, and then the data subtraction module subtract the integer a from shifted result to obtain value a', and then the data subtraction module updates the data a in the integer register module into the value a'; when the digit difference is less than or equal to 0, the output module finally outputs the final modular result. Compared with the prior art, the invention has lower cost, strong generality, and high efficiency.
Description
Technical field
The invention belongs to communication technical field, the big integer that relates among the elliptic curve cryptosystem ECC is asked modulo device, the authentication that is used for communicating by letter between portable terminal and the digital signature of undeniable service.
Background technology
Current cipher system generally can be divided into two types, i.e. DSE arithmetic and public-key cryptosystem.
DSE arithmetic needs communicating pair A and B to share same key K, and will guarantee A and B in arranging key, and channel is secret and fidelity.This is with regard to the problem of the key distribution that caused it and the problem of management of key, in addition because two or more entities are shared key, so the symmetric key system can not realize being used for the digital signature of authentication and undeniable service.
Different with DSE arithmetic, it is fidelity that public-key cryptosystem only requires the exchange of key, and does not require it and maintain secrecy.Key of each entity selection is right, i.e. PKI and private key, and wherein PKI externally is disclosed, and private key oneself is maintained secrecy, and this key possesses characteristics to need: only can not calculate private key by PKI.Because each entity all has unique private key, therefore the authentication and the undeniable sex service of data source and data integrity can be provided.Like this, public key cryptography has solved three problems that above-mentioned symmetric cryptography faces satisfactorily.
In public-key cryptography scheme, though be the encryption mechanism of present main flow based on the encryption mechanism RSA of big integer factor resolution problem, RSA but is faced with the more and more serious challenge from secure context at present.The 6th international cryptography association view recommended two kinds to the AES that is applied to common key cryptosystem: RSA Algorithm and ECC algorithm.One of characteristics of RSA Algorithm are that mathematical principle is simple, in practical applications, relatively be easy to realize, but its unit security intensity are relatively low.Elliptic curve cryptography is based upon on abstruse and the complex mathematical theory, and its unit security intensity is higher relatively.This two kinds of algorithm security intensity more as shown in table 1.
The comparison of table 1RSA and ECC safe key length
| Break through the time limit/Mips | RSA key length/bit | ECC key length/bit | Key length is than (RSA: ECC) |
| 10 4 | 512 | 106 | 5∶1 |
| 10 8 | 768 | 132 | 6∶1 |
| 10 11 | 1024 | 160 | 7∶1 |
| 10 20 | 2048 | 210 | 10∶1 |
| 10 78 | 21000 | 600 | 35∶1 |
It is pointed out that its computing is slow usually because the complexity of ECC is higher.Need find and a kind ofly realize that with hardware the scheme of ECC cipher system goes to improve arithmetic speed.The ECC cipher system mainly is made up of Galois field layer, elliptic curve layer, elliptic curve cipher protocol layer and some specific function algorithms, sees Fig. 2, and wherein Galois field is the basis, the Galois field that therefore at first will find a kind of suitable hardware to realize.
Galois field comprises binary field and prime field.Element in the binary field all is to represent with 0 and 1; A kind of method is arranged is to adopt the normal basis representation and constitute binary field; Under the normal basis representation addition of element in the territory, subtraction and square extracting operation corresponding XOR and shifting function respectively, and this in hardware as FPGA be realization very easily.Even if but do this selection, in the elliptic curve cipher agreement, mainly be in the ECDSA Digital Signature Algorithm, the computing under the binary field normal basis, some is the computing of prime field, is exactly one of them committed step and ask modular arithmetic.
The Digital Signature Algorithm of ECDSA is following.
The generation of ECDSA signature:
Input: parameter group D=(q, FR, S, a, b, P, n, h), private key d, message m.
Output: signature (r, s).
(1) selects k ∈ [1, n-1].
(2) calculate kP=(x
1, y
1), and with x
1Convert integer into
(3) calculate
if r=0 then skips to step (1).
(4) calculate e=H (m).
(5) calculate s=k
-1(e+dr) mod n.If s=0 then skips to step (1).
(6) return (r, s).
The checking of ECDSA signature:
Input: parameter group D=(q, FR, S, a, b, P, n, h), and PKI Q, message m, signature (r, s).
Output: judge whether signature is legal.
1) check r and s interval [1, n-1] interior integer whether.If (" refusing this signature ") then returned in any one check failure.
2) calculate e=H (m).
3) calculate w=s
-1Mod n.
4) calculate u
1=ew mod n and u
2=rw mod n.
5) calculate X=u
1P+u
2Q.
6) if X=∞ then returns (" refusing this signature ").
7) with the horizontal ordinate x of X
1Convert integer into
Calculate
8) if v=r then returns (" receiving this signature "); Otherwise, return (" refusing this signature ").
From the Digital Signature Algorithm of above-mentioned ECDSA, can find out the 3rd in the step of (3) in the generating algorithm and (5) step and the verification algorithm) step, the 4th) step and the 7th) go on foot and all need use the modular arithmetic of asking on the prime field.Under current technical conditions; In order to satisfy the security of cryptographic algorithm; The isoparametric bit wide of key at least will be more than 160 bits; And the above prime field of 160 bit bit wides to ask modular arithmetic be exactly the modular arithmetic of asking of some big integers, the mentioned big integer of the present invention refers to the above integer of 160 bit bit wides.
The existing mould technology of asking mainly contains three kinds: first kind is according to the definition of asking mould; Method through being asked modulus a circulation repeatedly subtracting mould n removes to calculate a mod n; Though simple, general-purpose on this theoretical method; But it is in the reality and be not suitable for the mould of asking between big integer,, actual infeasible because along with will be an astronomical figure increase its computing time of data bit width; Second kind is to ask modulo n arithmetic fast on some special prime fields that in DSS, provided by Unite States Standard (USS) and the NIST of technical institute, but these ask modulo n arithmetic to use to special circumstances fast, do not have generality; The third is that Barrett subtracts method approximately, and this method has versatility and also is applicable to big integer, but needs a kind of expensive calculating relevant with mould to support.If can not find a kind of effectively general and cheaply the FPGA implementation method improve big integer ask modular arithmetic efficient, can't embody the hardware of ECC under the binary field normal basis is represented and realize advantage.
Summary of the invention
The objective of the invention is to overcome the deficiency of above-mentioned prior art; Provide the big integer of signature algorithm in a kind of ECC of realization cipher system to ask modulo device and ask modeling method; To improve the efficient of the big integer in the digital signature procedure being asked modular arithmetic, embody the hardware of ECC under the binary field normal basis is represented and realize advantage.
For realizing above-mentioned purpose, big integer of the present invention asks modulo device to comprise:
Integer registers is used to store the value of waiting to ask mould integer a, and in calculating process, upgrades the value of a;
The mould value register, the value that is used to store mould n, the data in the mould value register remain unchanged in calculating process;
The mould value is searched module, is used for searching the figure place at the highest significant position place of data mould n under the binary representation form of mould value register, and is designated as count_n;
Integer searching module is used for searching the figure place at the highest significant position place of data a under the binary representation form of integer registers, and is designated as count_a;
The figure place subtraction module is subtracted each other count_a and count_n, tries to achieve both potential difference value count_c=count_a-count_n;
Shift register, according to gained potential difference value with the data n in the mould value register to shifting left twice, to obtain shift result v and m, wherein v=n＜＜count_c, m=n＜＜count_c-1;
The data subtraction module, with the output of data a in the integer registers and shift register as a result v or m subtract each other, when a >=v; A ' as a result=a-v after obtaining subtracting each other; When a＜v, a ' as a result=a-m after obtaining subtracting each other, and the data a in the integer registers is updated to a ';
Output module is judged data a and the size of the data n in the mould value register in the integer registers, and is exported the final R as a result that asks modular arithmetic, R=0 when a＞n, and when a=n, R=a-n, when a＜n, R=a.
For realizing above-mentioned purpose, the present invention realizes that the big integer of signature algorithm is asked modeling method in the ECC cipher system, may further comprise the steps:
Step 1: the big integer that the bit wide on the prime field that produces in the ECDSA signature algorithm is not less than 160 bits is input in the integer registers;
Step 2: the rank of basic point P in the ECDSA signature algorithm are input in the mould value register;
Step 3: search the figure place at the highest significant position place of data mould n under the binary representation form in the mould value register, and be designated as count_n;
Step 4: search the figure place at the highest significant position place of data a under the binary representation form in the integer registers, and be designated as count_a;
Step 5: calculate the potential difference value count_c=count_a-count_n between count_a and the count_n, when count_c≤0, execution in step 8, when count_c＞0, execution in step 6;
Step 6: according to gained potential difference value count_c with the data n in the mould value register to shifting left twice, to obtain shift result v and m, wherein v=n＜＜count_c, m=n＜＜count_c-1;
Step 7: the data a in the integer registers and shift result v or m are subtracted each other, when a >=v, a ' as a result=a-v after obtaining subtracting each other; When a＜v; A ' as a result=a-m after obtaining subtracting each other, and the data a in the integer registers is updated to a ', return step 4;
Step 8: the data a=n in integer registers, output net result R=0, as a＞n, output net result R=a-n, as a＜n, output net result R=a.
The present invention has following advantage:
1) modeling method of asking of the present invention is by searching computing and subtraction is formed, and this two kinds of computings theoretical simple is easy to realize, need not complicated technology as support, and be low than the known technology cost;
2) modeling method of asking of the present invention does not have specific (special) requirements to the bit wide length of asking the modulus certificate, and it is applicable to that the integer of all bit wide length asks modular arithmetic, than the known technology highly versatile;
3) modeling method of asking of the present invention is when calculating a mod n; Data a in the integer registers can reduce a significance bit at least after each the renewal; When the bit wide of a is L, when the bit wide of n is S, pass through after L-S the cycling in theory the most slowly; Can obtain net result, high than the known technology operation efficiency.
Description of drawings
Fig. 1 is the one-piece construction synoptic diagram of known elliptic curve cryptosystem:
Fig. 2 is the structural representation that the present invention asks modulo device;
Fig. 3 is the process flow diagram that the present invention asks modeling method;
Fig. 4 is the structural representation of look-up table in the integer searching module of the present invention;
Fig. 5 is simulation result figure of the present invention.
Embodiment
Actual development platform of the present invention is based on FPGA, but is not limited to FPGA.
With reference to Fig. 2, big integer of the present invention is asked modulo device, comprises integer registers, the mould value register, and integer searching module, the mould value is searched module, figure place subtraction module, shift register, data subtraction module and output module.Wherein:
Integer registers; The big integer a that waits to ask mould that at first is used for the outside input of storage system; And the currency in this register exported to integer searching module, data subtraction module and output module, this integer registers also need be preserved the data subtraction module and accomplished the output a ' as a result after the computing in addition, and when preserving, the data a in the current register is updated to a '; But before the data subtraction module was not accomplished computing, the data in the integer registers kept a constant.The bit wide of integer registers is defined as 2 times of bit wide of Galois field element in the ECDSA signature algorithm.
The mould value register is used for the integer mould n of the outside input of storage system, and this integer mould n is exported to the mould value search module.The bit wide of mould value register is identical with the bit wide of Galois field element in the ECDSA signature algorithm.
Integer searching module is used to search the figure place count_a at the highest significant position place of data a under the binary representation form of integer registers input, and outputs it to the figure place subtraction module.Comprise a look-up table in the integer searching module, as shown in Figure 4.This look-up table is formed with any attitude x by 0,1, and it is the square matrices of a L*L scale; Wherein L is the bit wide of the big integer a of the outside input of system; This look-up table stores all situations that the most significant digit of data a exists in the integer registers, if when searching the row of first in the form correspondence table of data a, then export count_a=L; If the row of second in the form correspondence table of data a; Then export count_a=L-1, if the last column in the form correspondence table of data a is then exported count_a=1.
The mould value is searched module, is used to search the figure place count_n at the highest significant position place of data n under the binary representation form of mould value register input, and outputs it to the figure place subtraction module.The mould value is searched and is also comprised a look-up table in the module; This look-up table structurally is the same with look-up table in the integer searching module; The length of side that mould value that different is is searched the look-up table matrix in the module equals the bit wide of data mould n, and the length of side of the look-up table matrix of integer searching mould in fast is the bit wide of the big integer a of the outside input of system.
The figure place subtraction module, the lookup result count_n that the lookup result count_a and the mould value of integer searching module are searched module subtracts each other, and tries to achieve both potential difference value count_c=count_a-count_n, exports to shift register and output module then.
Shift register is at first stored the mould value n in the mould value register, then according to the output of figure place subtraction module as a result count_c mould value n is shifted; Displacement is divided into twice, for the first time with n＜＜count_c, be about to the n count_c position that moves to left; Obtain shift result v, for the second time with n＜＜count_c-1, be about to the n count_c-1 position that moves to left; Obtain shift result m, and the v as a result and the m of twice displacement exported to the integer subtraction module.The bit wide of shift register is defined as 2 times of bit wide of Galois field element in the ECDSA signature algorithm.
The integer subtraction module comprises a judge module and a subtraction block.This judge module is judged the output magnitude relationship of v as a result of data a and the shift register of integer registers input, and is divided into a >=v and two kinds of situation of a＜v, when a >=v; Do subtraction by subtraction block; Obtain difference a '=a-v as a result, when a＜v, do subtraction by subtraction block; Obtain difference a '=a-m as a result, and a ' is exported to integer registers.
Output module comprises a judge module and a subtraction block.This judge module is judged data a and the magnitude relationship of the data n in the mould value register in integer registers, and is divided into a＞n, a=n and three kinds of situation of a＜n, when a＞n; Directly output is final asks mould R=0 as a result; When a=n, earlier be subtraction R=a-n by subtraction block, export the final mould R as a result that asks again; When a＜n, directly export the final mould R=a as a result that asks.
Ask modulo device based on above-mentioned big integer, the present invention asks mould to ask the basic thought of mould to be to big integer: as long as it is still big than B to guarantee that in subtraction minuend A and subtrahend B are the r as a result that obtains after the subtraction, and r then
1And r
nUnder the condition of mould B, equate, wherein r
1Be that A deducts the difference result that 1 B obtains, r
nBe that A deducts the difference result that a plurality of B obtain, A=23 for example, B=3 then has A-B=20, A-2B=17, A-3B=14,20,17 and 14 these three numbers equate that under the condition of mould 3 its result equals 2 obviously.Therefore, if guarantee minuend A after deducting B gained r is still big than B as a result, so through deduct B as much as possible at every turn, just can accomplish finish at every turn subtraction afterwards minuend A all can reduce by a significance bit at least.This thought is used to calculate a mod n, and then the bit wide as a is L, when the bit wide of n is S, in theory, adopts subtraction at most L-S+1 time, just can obtain net result.
With reference to Fig. 3, big integer of the present invention is asked modeling method, comprises the steps:
Step 1: the data in initialization integer registers and the mould value register are 0.
Step 2: the big integer a that the bit wide on the prime field that produces in the ECDSA signature algorithm is not less than 160 bits is input in the integer registers, explanation for ease, and the bit wide of establishing a is L, then the representation of a is (a in integer registers
L-1, a
L-2... a
2, a
1, a
0)
2
Step 3: the rank n of basic point P in the ECDSA signature algorithm is input in the mould value register, explanation for ease, the bit wide of establishing n is S, then the representation of n is (n in the mould value register
S-1, n
S-2... n
2, n
1, n
0)
2
Step 4: the data mould n in the mould value register is input to the mould value searches in the module, searching the highest significant position of mould n under the binary representation form is n
S-1The figure place at place, and be designated as count_n.
Step 5: the data a in the integer registers is input in the integer searching module, and searching the highest significant position of data a under the binary representation form is a
L-1The figure place at place, and be designated as count_a.
Step 6: calculate the potential difference value count_c=count_a-count_n between count_a and the count_n with the figure place subtraction block, the numerical value of count_c will be selected next step computing as a Rule of judgment.When count_c≤0, execution in step 9, when count_c＞0, execution in step 7.
Step 7: the data n in the mould value register is input in the shift register; And according to count_c with the data n in the mould value register to shifting left twice; Obtain shift result v and m respectively, wherein v=n＜＜count_c, i.e. the data n count_c position that moves to left; M=n＜＜count_c-1, i.e. the data n count_c-1 position that moves to left.In theory, shift result v and m are near two numbers of a currency in 2 power integral multiples of data n.
Step 8: with the shift result v and the m of shift register, current data a and the data mould n in the mould n register all are input in the integer subtraction module in the integer registers, and do following computing:
8.1) as a >=v, do subtraction a '=a-v computing, and a ' is as a result exported to integer registers, the data a that upgrades in the integer registers is a ';
8.2) as a＜v, do subtraction a '=a-m computing, and a ' is as a result exported to integer registers, the data a that upgrades in the integer registers is a ';
Through the computing of this step, the data a in the integer registers has numerically reduced a significance bit at least, turns back to step 5, promptly searches the highest significant position of the data a in the current integer registers again.
Step 9: the data n in data a in the integer registers and the mould value register is input to output module, according to the output of the numerical relation of a and n different ask mould R as a result:
1) works as a=n, directly export net result R=0;
2) as a＞n, do a subtraction earlier and try to achieve R=a-n, export net result R then;
3), directly export net result R=a as a＜n;
Above step 5, step 6, these four steps of step 7 and step 8 are once circulation, each circulation numerically can reduce the significance bit of data a in the integer registers at least.Bit wide at big integer a is L, and the bit wide of mould n is under the situation of S, accomplishes and once asks modular arithmetic to need L-S cycle period at most.Calculate if accomplish the mode of a step according to a clock period, then accomplish and once ask modular arithmetic to need for 4 (L-S)+7 clock period at most.So, under the clock of megahertz level, the big integer of hundred bit wides is done and once asked the needed time of modular arithmetic also is the microsecond level.
Effect of the present invention can further specify through following emulation:
Big integer of the present invention asks modulo device under software Quartus2, to carry out emulation, and simulation result is as shown in Figure 5.Wherein:
Fig. 5 (a) asks the modular arithmetic oscillogram of the zero hour, and the data 0xffffffffffffffffffffffffffffffffffffffffffffffffff of 200 bit wide length among this figure shown in the input port a is the big integer a that is input in the integer registers of the present invention; The data 0X4000000000000000000020108a2e0cc0d99f8a5ef of 163 bit wide length shown in the input port n is the data mould n that is input in the mould value register of the present invention, and according to the requirement of ECDSA algorithm, these data must be prime numbers; Input port nEN representes to ask modular arithmetic formally to begin when being low level, can find out that from Fig. 5 (a) be 450ns the zero hour of asking modular arithmetic.
Fig. 5 (b) asks the modular arithmetic oscillogram of the finish time, and the data 0x3ffffffffff7fbdd747cefda224b7504d99f8a5ee of 163 bit wide length among this figure shown in the output port R is this final output result who asks modular arithmetic; Representative asked modular arithmetic to finish when output port nDONE was low level, can find out that from Fig. 5 (b) be 15.85us the finish time of asking modular arithmetic.
The clock of this emulation is that 10Mhz is 100ns; In theory; Calculate if accomplish the mode of a step according to a clock period, the maximum 100*4* consuming time of this emulation (200-163) ns+700ns=15500ns i.e. 155 clock period, and the actual emulation result shows the whole modular arithmetic 15.4us consuming time that asks; I.e. 154 clock period are with theoretical analysis value basically identical.
Claims (6)
1. realize that the big integer of signature algorithm is asked modulo device in the ECC cipher system for one kind, comprising:
Integer registers is used to store the value of waiting to ask mould integer a, and in calculating process, upgrades the value of a;
The mould value register, the value that is used to store mould n, the data in the mould value register remain unchanged in calculating process;
The mould value is searched module; Comprise one by data 0; 1 look-up table formed with any attitude x, this look-up table is the square matrices of a L*L scale, all situations that most significant digit of data mould n exists in its storage mould value register; Be used for searching the figure place at the highest significant position place of data mould n under the binary representation form of mould value register, and be designated as count_n;
Integer searching module; Comprise one by data 0; 1 look-up table formed with any attitude y, this look-up table is the square matrices of a L*L scale, all situations that most significant digit of integer a exists in its storage integer registers; Be used for searching the figure place at the highest significant position place of data a under the binary representation form of integer registers, and be designated as count_a;
The figure place subtraction module is subtracted each other count_a and count_n, tries to achieve both potential difference value count_c=count_a-count_n;
Shift register, according to gained potential difference value with the data n in the mould value register to shifting left twice, to obtain shift result v and m, wherein v=n＜＜count_c, m=n＜＜count_c-1;
The data subtraction module, with the output of data a in the integer registers and shift register as a result v or m subtract each other, when a >=v; A ' as a result=a-v after obtaining subtracting each other; When a＜v, a ' as a result=a-m after obtaining subtracting each other, and the data a in the integer registers is updated to a ';
Output module is judged data a and the size of the data n in the mould value register in the integer registers, and is exported the final R as a result that asks modular arithmetic, R=0 when a=n, and when a＞n, R=a-n, when a＜n, R=a.
2. the modulo device of asking according to claim 1, wherein the bit wide of integer registers is 2 times of bit wide of Galois field element in the ECDSA signature algorithm.
3. the modulo device of asking according to claim 1, the bit wide of mould value register is identical with the bit wide of Galois field element in the ECDSA signature algorithm.
4. the modulo device of asking according to claim 1, wherein the bit wide of shift register equals 2 times of bit wide of Galois field element in the ECDSA signature algorithm.
5. the modulo device of asking according to claim 1, wherein the data subtraction module comprises a judge module and a subtraction block, the data a in the judge module judgement integer registers and the output of shift register is the magnitude relationship of v as a result; When a >=v, do subtraction by subtraction block, obtain a '=a-v as a result; When a＜v; Do subtraction by subtraction block, obtain a '=a-m as a result, and a ' is offered integer registers.
6. the modulo device of asking according to claim 1, wherein output module comprises a judge module and a subtraction block, the data a in the judge module judgement integer registers and the magnitude relationship of the data n in the mould value register; When a＞n, directly export the final mould R=a-n as a result that asks, when a=n; Earlier be subtraction R=0 by subtraction block; Export the final mould R as a result that asks again, when a＜n, directly export the final mould R=a as a result that asks.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010100136291A CN101763241B (en) | 2010-01-20 | 2010-01-20 | Large integer modular arithmetic device for realizing signature algorithm in ECC cryptosystem and modular method therefor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010100136291A CN101763241B (en) | 2010-01-20 | 2010-01-20 | Large integer modular arithmetic device for realizing signature algorithm in ECC cryptosystem and modular method therefor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101763241A CN101763241A (en) | 2010-06-30 |
| CN101763241B true CN101763241B (en) | 2012-02-08 |
Family
ID=42494420
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2010100136291A Expired - Fee Related CN101763241B (en) | 2010-01-20 | 2010-01-20 | Large integer modular arithmetic device for realizing signature algorithm in ECC cryptosystem and modular method therefor |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101763241B (en) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102567254B (en) * | 2010-12-31 | 2016-05-04 | 重庆重邮信科通信技术有限公司 | The method that adopts dma controller to carry out data normalization processing |
| CN103078744B (en) * | 2013-01-25 | 2015-06-17 | 西安电子科技大学 | Public key-based bidirectional radio frequency identification authorization method |
| CN103294448B (en) * | 2013-05-28 | 2016-03-02 | 福建升腾资讯有限公司 | A kind of large number realizing rsa cryptosystem system asks modeling method |
| CN105610583B (en) * | 2014-11-04 | 2018-10-26 | 上海华虹集成电路有限责任公司 | ECDSA methods for resisting error curve attack |
| CN108243002B (en) * | 2018-01-11 | 2021-03-16 | 广东工业大学 | Method, apparatus, device and computer readable storage medium for modular reduction |
| CN111813375A (en) * | 2020-08-14 | 2020-10-23 | Oppo广东移动通信有限公司 | Modulo arithmetic processing method and related product |
| CN114840175B (en) * | 2022-06-30 | 2022-09-13 | 中科声龙科技发展（北京）有限公司 | Device and method for realizing remainder operation and operation chip |
| CN115622684B (en) * | 2022-11-16 | 2023-03-28 | 哈尔滨工业大学(深圳)(哈尔滨工业大学深圳科技创新研究院) | Privacy computation heterogeneous acceleration method and device based on fully homomorphic encryption |
-
2010
- 2010-01-20 CN CN2010100136291A patent/CN101763241B/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| CN101763241A (en) | 2010-06-30 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101763241B (en) | Large integer modular arithmetic device for realizing signature algorithm in ECC cryptosystem and modular method therefor | |
| Huang et al. | An image encryption algorithm based on hyper-chaos and DNA sequence | |
| US11042358B2 (en) | Secure computation system, secure computation method, secure computation apparatus, distribution information generation apparatus, and methods and programs therefor | |
| CN101216754B (en) | Modular multiplication based data encryption and decryption processing method and device | |
| US11658799B2 (en) | Exponent splitting for cryptographic operations | |
| Chen et al. | Period distribution of generalized discrete Arnold cat map for $ N= p^{e} $ | |
| CN1841443B (en) | Calculation method, calculation equipment | |
| CN104811298B (en) | One kind realizes encrypted method and device | |
| CN103095459B (en) | Montgomery Algorithm method, equipment and server in public-key cryptosystem | |
| CN103942031A (en) | Elliptic domain curve operational method and elliptic domain curve arithmetic unit | |
| ES2604460T3 (en) | Procedure to securely encode or decode a message | |
| CN103067165B (en) | Outsourcing computational methods, equipment and server in public-key cryptosystem | |
| CN102279840B (en) | Method for quickly generating prime number group applicable to information encryption technology | |
| CN102393812A (en) | Implementation method for rapid scalar multiplication algorithm in elliptic curve cryptosystem | |
| CN105119929A (en) | Safe mode index outsourcing method and system under single malicious cloud server | |
| Yan et al. | High-speed privacy amplification scheme using GMP in quantum key distribution | |
| CN103023659B (en) | ECC (elliptic curve cryptosystem) encryption hardware device with expandable parameter bit width | |
| KR20040055550A (en) | Serial-Parallel Multiplier to Multiply Two Elements in the Finite Field | |
| CN105515770A (en) | Improved method for quickly generating big prime number | |
| KR102241252B1 (en) | Method, apparatus and system for performing modular arithmetic | |
| CN108418687A (en) | A kind of Fast Modular of suitable SM2 algorithms about subtracts method and medium | |
| CN1258051A (en) | Encryption system and device for public key | |
| KR101548174B1 (en) | Method for calculating negative inverse of modulus | |
| Seo et al. | Multi-precision squaring on MSP and ARM processors | |
| Liu et al. | Cryptanalysis of cramer-shoup like cryptosystems based on index exchangeable family |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120208 Termination date: 20180120 |