CN101661447A - Transmission device and transmission method for direct memory access - Google Patents
Transmission device and transmission method for direct memory access Download PDFInfo
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Abstract
The invention discloses a transmission device for direct memory access. The device comprises a DMA control module, a source end storage module, a destination storage module and a storage task module,wherein the source end storage module, the destination storage module and the storage task module are connected with the DMA control module respectively; and the storage task module is connected witha CPU. The invention also discloses a transmission method for the direct memory access, which comprises the following steps: determining each DMA operation trigger point on a time dimension, determining two-dimensional transmission task on the each operation trigger point, and configuring the priority order of the two-dimensional transmission task on the each operation trigger point. The DMA transmission device and the method can well meet the requirements when portable consumer electronic products carry out image data transmission, and obviously reduce the used power consumption of the system.
Description
Technical field
The present invention relates to a kind of transmitting device and method of direct memory access (DMA), relate in particular to a kind of transmitting device and method of carrying out the direct memory access (DMA) of data transmission based on the portable multimedia application apparatus.
Background technology
Direct memory access (DMA) (DMA, Direct Memory Access) is the important transmission technology that microsystem improves data transmission efficiency.Traditional DMA transmission technology can be at central processing unit (CPU, Central Process Unit) when executing the task, data block in the system equipment is carried out accessing operation, alleviate the load of processor, and owing to be direct memory access (DMA), its transmission speed is faster than the speed of CPU access data; The DMA transmission technology also can be under the situation that CPU does not participate in, by the access of the hardware circuit control data piece of special use.
In multimedia technology application, the data rate of traditional DMA transmission technology does not satisfy the transmission requirement of the image/video data of high bandwidth, high transfer rate gradually, in common two-dimentional DMA transmission, transmission method for the The data of byte-aligned is to carry out the byte transmission, and this mode has been wasted massive band width.And in multimedia application, the image/video data are the very large class data of data volume, this class image is two-dimentional, publication number is the United States Patent (USP) " DMA controller adapted for transferring data in two-dimensional mappedaddress space " of US6292853B1, a kind of two-dimentional DMA transmission mode is disclosed, under this transmission mode, can be by the two dimension size of configuration image, image transmitted is wanted in appointment, when making things convenient for system configuration, also reduce the number of times of configuration, accelerated transmission speed.But above-mentioned technology is in the application of portable multimedia, such as GPS class portable equipment, need regularly to transmit in batches the two-dimensional graphical image data of some, for such transmission requirement, system all will start the configuration that CPU carries out the DMA transmitting device at every turn, causes system power dissipation and laser propagation effect can not obtain balance; Though link DMA transmission method has been arranged in the prior art, this transmission method can once be specified a plurality of transformation tasks, but common link DMA transmission method can not reach the regularly purpose of transmission, and common link DMA transmission method does not break away from the mode of carrying out system configuration by CPU fully yet.
In sum, present DMA transmission mode of the prior art, all the each transmission course of detachment system all will all can not obtain the balance of system power dissipation and laser propagation effect by starting the form that CPU carries out the configuration of DMA transmitting device fully.
Summary of the invention
The present invention is directed to system power dissipation and the unbalanced problem of laser propagation effect that prior art exists, propose a kind of transmitting device and method of direct memory access (DMA) on the basis of existing technology.
A kind of transmitting device of direct memory access (DMA), this device comprises: the DMA control module, source end memory module, the destination memory module, deposit task module, first clock, second clock and the 3rd clock, first clock links to each other with the DMA control module, second clock and the 3rd clock insert source end memory module and destination memory module respectively, source end memory module, the destination memory module, depositing task module links to each other with the DMA control module respectively, depositing task module links to each other with CPU again
The DMA control module comprises the time-controllable module, two dimension task control module and fifo module, time-controllable module and two-dimentional task control module are carried out the configuration of time and task and are deposited first task in two-dimentional task control module by CPU, the time-controllable module is carried out the first time by CPU and is triggered, the two dimension task control module is transferred to destination memory module with target image from source end memory module according to the trigger pip control fifo module of time-controllable module, and the time-controllable module is controlled two-dimentional task control module according to the feedback information of fifo module and get task from deposited task module.
Described time-controllable module comprises time control module and time transmission control module, and time control module is controlled by CPU directly, and two-dimentional control module is controlled in time transmission control module time of reception control module order.
Described two-dimentional task control module comprises two-dimentional task register, two dimension task transmission control module and get task module, the two dimension task register is controlled by CPU directly, time transmission control module time of reception control module order, control two-dimentional task transmission control module and from two-dimentional task register, read task definition, and according to the feedback information of two-dimentional task transmission control module control is got task module and is read new task and write two-dimentional task register from depositing task module, two-dimentional task transmission control module control fifo module carries out the task transmission and with transmitting state information feedback time transmission control module and get task module respectively.
Described time-controllable module is subjected to CPU control rise time dimension, and definite dma operation trigger point is arranged on the described time dimension, and the time-controllable module preferentially disposes the transformation task on each operation trigger point.
Described configuration to two-dimentional task control module comprises the configuration to the start address of the image of transmission sources end and destination in the transformation task, size, width and height.
Described transmitting device can adopt link DMA transmission mode.
Described method comprises the steps:
Step 1, determine each dma operation trigger point on the time dimension;
Step 2, determine two-dimentional transformation task and being configured on each operation trigger point;
Step 3, dispose the priority orders of two-dimentional transformation task on each operation trigger point;
Step 4, all task configurations finish, and trigger first operation trigger point and begin the DMA data transmission.
Described step 2 also comprises the steps:
The start address of image in a, the source of configuration end memory module;
The width of image, height and row address are at interval in b, the source of configuration end memory module;
The starting point coordinate of c, configuration image to be transmitted, width and height;
The start address of image in d, the configuration purpose end memory module;
The width of image, height and row address are at interval in e, the configuration purpose end memory module;
The starting point coordinate of f, configuration image to be transmitted, width and height.
The operation trigger point can be the single cycle point in the described step 1.
The operation trigger point can be repeatedly to circulate a little in the described step 1.
The operation trigger point can be indefinite time point in the described step 1.
Described step also is included in the storage address of next transformation task of configuration in each link DMA transformation task, and at the transformation task configuration-direct of the storing step a of this place, address to step f.
The present invention is directed to the data transmission of portable mobile wireless or limited equipment, on the basis of existing common DMA transmission technology, increased time dimension, the two-dimensional graphical image data have been realized on time dimension, transmitting at regular time and quantity, this data transmission method, CPU carries out the initial configuration end to the DMA transmitting device after, the DMA transmitting device is the detachment system independent operating completely, so just can realize alap system power dissipation, this transmission mode also can be set the transmission priority of each task in advance; DMA transmitting device of the present invention has adopted the independently structure of clock zone of each several part, also can realize lower system power dissipation.DMA transmitting device of the present invention and method can better meet the requirement of portable class consumption electronic product when carrying out image data transmission, and have obviously reduced the use power consumption of system.
Description of drawings
Fig. 1 is transmitting device concrete structure figure of the present invention;
Fig. 2 is that three kinds of different modes are operated the trigger point synoptic diagram down on the time dimension of the present invention;
Fig. 3 a is a two dimensional image synoptic diagram in the end memory module of source;
Fig. 3 b is a two dimensional image synoptic diagram in the destination memory module.
Embodiment
Below in conjunction with description of drawings the specific embodiment of the present invention is described in detail.
Embodiment 1
The structure of the transmitting device embodiment 1 of direct memory access (DMA) of the present invention comprises three-dimensional DMA control module 100, first data terminal 104, second data terminal 105, deposits task module 109, first clock 106, second clock 107 and the 3rd clock 108 as shown in Figure 1.
Three-dimensional DMA of the present invention is meant on the basis of described two-dimentional DMA in the prior art and adds a time dimension that all three-dimensional DMA of the present invention all do this explanation.
Wherein three-dimensional DMA control module 100 comprises: time control module 101, time transmission control module 102, first fifo module 103, two-dimentional task transmission control module 111, two-dimentional task register 110 and get task module 112.
Time control module 101 is used for being configured respectively operating trigger point priority on time dimension and the time dimension;
Time transmission control module 102 is used for the task transmission of respectively operating the trigger point on the time dimension is controlled;
The data such as height, width, origin coordinates point that two dimension task register 110 is used for the images task are configured and deposit first transformation task;
Two dimension task transmission control module 111 is used to control the transmission process of first fifo module 103 and the information of feedback transmission state;
Getting task module 112 is used for reading task and reading of task being write as two-dimentional task register 110 from depositing task module 109;
The output terminal of depositing task module 109 with get task module 112 and link to each other, its input end links to each other with CPU300, CPU300 deposits other all tasks inputs except that first transformation task in the task module 109.
Three-dimensional DMA control module 100 outside first clocks 106 that insert.
First data terminal 104 is connected first data terminal, 104 external second clock 107, the second data terminals 105 external the 3rd clocks 108 with second data terminal 105, first fifo module 103 direct respectively and in the three-dimensional DMA control module 100.
Present embodiment is an example with the ordinary two dimensional DMA of single-point single task, below in conjunction with Fig. 1 the concrete principle of work of the DMA transmitting device of embodiment 1 of the present invention is described:
Time dimension in the time control module 101 is configured, determined the operation trigger point of each DMA transformation task on the time dimension, operate the three kinds of patterns that dispose of trigger point, as shown in Figure 2, described operation trigger point can be the single cycle point, also can be repeatedly to circulate a little, or indefinite time point.
Need dispose a counter for the mode of single cycle point and carry out cycle count, send a pulse signal after each counting finishes, trigger the startup operation of 100 pairs of DMA transmitting devices of three-dimensional DMA control module;
The mode of putting for repeatedly circulating need dispose a state machine and circulate, and triggers 100 pairs of DMA transmitting devices of three-dimensional DMA control module in each cycle of states cycle the inside and carries out the startup operation several times;
Mode for indefinite time point, then need to dispose a storer and a counter, time interval numerical value to each operation trigger point is stored successively, counter finishes in triggering for the first time and carries out just reading second numerical value after the DMA transformation task operation, unison counter begins counting, carry out the second time and trigger when count value equals second numerical value, the rest may be inferred.But this mode has certain restriction, and it is limited by resting period memory size at interval, and the extension on time shaft can not exceed certain-length.
Transformation task on each operation trigger point is carried out the priority setting, if the task priority height on the current operation trigger point, and this when arriving, previous task is not finished as yet task start time, just cancel the task of previous operation trigger point, start new transmission; Otherwise, just continue previous task, all want register of specific assigned to come configuration task priority for the task of each dma operation trigger point.
Two-dimentional transformation task image in the two-dimentional task register 110 is configured, comprises configuration the transmission objectives graph image of transmission sources end and destination end, and the configuration of transmission objectives graph image size, it specifically is divided into following step:
The start address of a, source of configuration end image: disposing first data terminal, 104 interior image start addresses is 32 ' h1000_0000;
The width of b, source of configuration end image and height, interval, configuration line address: disposing the first data terminal picture traverse is 32, is 32 highly, and row address is spaced apart 64, then the first address of image second row is exactly 32 ' h1000_0040;
C, configuration image to be transmitted are at the starting point coordinate of source end, width and height: shown in Fig. 3 a, the starting point coordinate that disposes image to be passed is (2,3), width 3, height 4, by the numerical value that first two steps have been configured, the start address that can calculate this image to be passed is 32 ' h1000_0000+3*64+2;
The start address of d, configuration purpose end image: disposing second data terminal, 105 interior image start addresses is 32 ' h1000_0000;
The width of e, configuration purpose end image and height, and row address is at interval: shown in Fig. 3 b, the width of destination image is different with source end image, disposes second data terminal, 105 picture traverses 20, height 32, and row address is spaced apart 64;
F, configuration image to be transmitted are at the starting point coordinate of destination, and width and height: as shown in Figure 3, the starting point coordinate that disposes image to be transmitted is (1,1), width 3, height 4.
All to before transmission, carry out the configuration of above step a-f for each transformation task that is written into two-dimentional task register 110 according to mission requirements.
After all tasks configure in the three-dimensional DMA control module 100, just but independent operating DMA transmitting device carries out task and has transmitted, the DMA transmitting device triggers time control module 101 in the three-dimensional DMA control module 100 by CPU300, time transmission control module 102 starts two-dimentional task transmission control module 111 according to the order of time control module 101, two dimension task transmission control module 111 is read first transformation task from two-dimentional task register 110, and control first fifo module 103 the targeted graphical image is input to second data terminal 105 by first data terminal 104 by first fifo module 103, perhaps transformation task is input to first data terminal 104 by second data terminal 105 with the targeted graphical image by first fifo module 103.
Behind first task end of transmission, first fifo module 103 arrives two-dimentional task transmission control module 111 with this information feedback, two dimension task transmission control module 111 is got task module 112 transmission tasks to time transmission control module 102 respectively and is finished information, get task module 112 by 102 controls of time transmission control module and from deposit task module 109, read second task, second task write carry out two dimensional image configuration in the two-dimentional task register 110 by getting task module 112 then, and wait for that second operation trigger point is triggered; When second operation after the trigger point is triggered, carry out task by the two-dimentional task transmission control module 111 of time transmission control module 102 controls and transmit its detailed process process is identical as described above.
If when the priority of the 3rd operation trigger point is higher than second operation trigger point, second task as yet not during end of transmission the 3rd operation trigger point be triggered, then stop current task transmission, begin the transmission of the 3rd task.
If when the task of second operation trigger point is not finished as yet, and the 3rd operation trigger point has been triggered, and the priority of second operation trigger point is higher than the 3rd operation trigger point again, then triggers to invalid.
Behind all task end of transmissions, by time control module 101 and two-dimentional task register 110 respectively to CPU300 transmitting time dimension process finishes and two-dimentional task disposes feedback signal.
Finish after the configuration of control being deposited module 102 and depositing task module 109 at CPU300 and on the triggered time dimension behind first operation trigger point, the DMA transmitting device begins to work alone other peripheral hardware parts 303 and CPU300 had been closed interior, as long as guarantee DMA transmitting device inner first data terminal 104, second data terminal 105, deposit task module 109 and three-dimensional DMA control module 100 is not closed, the DMA transmitting device just can independently be finished transformation task automatically on time dimension.
Have three independent clocks in the whole DMA transmission system, be respectively first clock 106, second clock 107 and the 3rd clock 108, these three clocks can be homology also can be asynchronous.
Embodiment 2
The described DMA transmitting device of present embodiment is based on link DMA, and its characteristics are to comprise a plurality of tasks under single time point, and the structure of described DMA transmitting device concrete structure and embodiment 1 described DMA transmitting device is basic identical.The characteristics of link DMA exist for have n task on an operation trigger point, and another characteristics were for both to have comprised the memory address that task definition also comprises next task bag in each task bag.
The principle of work of the described DMA transmitting device of present embodiment and embodiment 1 described principle of work are basic identical:
Be configured by 301 pairs of DMA transmitting devices of second fifo module by central processor CPU 300, promptly respectively time control module 101 in the three-dimensional DMA control module 100 and two-dimentional task register 110 be configured.
Wherein, configuration and embodiment 1 to time control module 101 and two-dimentional task register 110 are described about time dimension, the configuration of two dimension transformation task image is basic identical, and with first the operation trigger point first task deposit two-dimentional task register 110 in, and the storage address of configuration link DMA transformation task, and the step a that has deposited two-dimentional task configuration at this place, address arrives the transfer instruction of step f, after current transformation task is finished, two dimension task register 110 is got task module 110 with the link address input automatically, goes out next task according to link address to this place, address by getting task module 110.Central processor CPU 300 will be on first operation trigger point all need transmitting of the tasks first task be stored in and deposit in the task module 109.
Trigger first operation trigger point by CPU300 then, the DMA transmitting device begins the task transmission, difference from Example 1 is after first task on first operation trigger point is finished, two dimension task transmission control module 111 sends the task end-of-transmission information to getting task module 112, after getting task module 112 and receiving task and finish signal, from deposit task module 109, read second task of first operation on trigger point according to the address of leaving next task in the last task in, and deposit two-dimentional task register 110 in and be configured, read task definition and control first fifo module 103 and carry out task transmission by two-dimentional task transmission control module 111, after all the task end of transmission (EOT) on first operation trigger point, two dimension task transmission control module 111 sends task end of transmission signal to time transmission control module 102, send order by time transmission control module 102 to getting task module 112, get task module 112 and from deposit task module 109, read second first task on the operation trigger point, begin to carry out the task transmission, by that analogy after second all task of operation trigger point finished, wait for that next operation trigger point is triggered, and begins the task of next operation trigger point again.
If when the priority of the 3rd operation trigger point is higher than second operation trigger point, when second the multi-task of operating in the trigger point also finishes, begin to carry out the task of the 3rd operation trigger point earlier, abandon ongoing second still uncompleted task in operation trigger point.There is not priority orders between the each task in the same operation trigger point.
Finish time control module 101, two-dimentional task register 110 and other peripheral hardware parts 303 and CPU300 had all been closed interior at CPU300, as long as guarantee DMA transmitting device inner first data terminal 104, second data terminal 105, deposit task module 109 and three-dimensional DMA control module 100 is not closed, the DMA transmitting device just can independently be finished transformation task automatically on time dimension.
Above content be in conjunction with concrete preferred implementation to further describing that the present invention does, can not assert that concrete enforcement of the present invention is confined to these explanations.For the general technical staff of the technical field of the invention, without departing from the inventive concept of the premise, can also make some simple deduction or replace, all should be considered as belonging to protection scope of the present invention.
Claims (10)
1, a kind of transmitting device of direct memory access (DMA), this device comprises: DMA control module, source end memory module, destination memory module, deposit task module, first clock, second clock and the 3rd clock, first clock links to each other with the DMA control module, second clock and the 3rd clock insert source end memory module and destination memory module respectively, source end memory module, destination memory module, deposit task module and link to each other with the DMA control module respectively, deposit task module and link to each other with CPU again, it is characterized in that:
The DMA control module comprises the time-controllable module, two dimension task control module and fifo module, time-controllable module and two-dimentional task control module are carried out the configuration of time and task and are deposited first task in two-dimentional task control module by CPU, the time-controllable module is carried out the first time by CPU and is triggered, the two dimension task control module is transferred to destination memory module with target image from source end memory module according to the trigger pip control fifo module of time-controllable module, and the time-controllable module is controlled two-dimentional task control module according to the feedback information of fifo module and get task from deposited task module.
2, a kind of transmitting device of direct memory access (DMA) according to claim 1, it is characterized in that, described time-controllable module comprises time control module and time transmission control module, time control module is controlled by CPU directly, two-dimentional control module is controlled in time transmission control module time of reception control module order.
As the transmitting device of a kind of direct memory access (DMA) as described in the claim 2, it is characterized in that 3, described two-dimentional task control module comprises two-dimentional task register, two-dimentional task transmission control module and get task module,
The two dimension task register is controlled by CPU directly, time transmission control module time of reception control module order, control two-dimentional task transmission control module and from two-dimentional task register, read task definition, and according to the feedback information of two-dimentional task transmission control module control is got task module and is read new task and write two-dimentional task register from depositing task module, two-dimentional task transmission control module control fifo module carries out the task transmission and transmitting state information is fed back to the time transmission control module respectively and gets task module.
4, a kind of transmitting device of direct memory access (DMA) according to claim 1, it is characterized in that, described time-controllable module is subjected to CPU control rise time dimension, definite dma operation trigger point is arranged on the described time dimension, and the time-controllable module preferentially disposes the transformation task on each operation trigger point.
5, a kind of transmitting device of direct memory access (DMA) according to claim 1, it is characterized in that described configuration to two-dimentional task control module comprises the configuration to the start address of the image of transmission sources end and destination in the transformation task, size, width and height.
6, as claim 1 to 5 arbitrary as described in a kind of transmitting device of direct memory access (DMA), it is characterized in that described transmitting device can adopt link DMA transmission mode.
7, a kind of transmission method of the transmitting device of direct memory access (DMA) according to claim 1 is characterized in that, described method comprises the steps:
Step 1, determine each dma operation trigger point on the time dimension;
Step 2, determine two-dimentional transformation task and being configured on each operation trigger point;
Step 3, dispose the priority orders of two-dimentional transformation task on each operation trigger point;
Step 4, all task configurations finish, and trigger first operation trigger point and begin the DMA data transmission.
8, transmission method as claimed in claim 7 is characterized in that, described step 2 also comprises the steps:
The start address of image in a, the source of configuration end memory module;
The width of image, height and row address are at interval in b, the source of configuration end memory module;
The starting point coordinate of c, configuration image to be transmitted, width and height;
The start address of image in d, the configuration purpose end memory module;
The width of image, height and row address are at interval in e, the configuration purpose end memory module;
The starting point coordinate of f, configuration image to be transmitted, width and height.
9, transmission method as claimed in claim 7 is characterized in that, the operation trigger point can be single cycle point or repeatedly circulate point or indefinite time point in the described step 1.
10, transmission method as claimed in claim 8 is characterized in that, described step also is included in the storage address of next transformation task of configuration in each link DMA transformation task, and at the transformation task configuration-direct of the storing step a of this place, address to step f.
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| CN108462817A (en) * | 2017-02-22 | 2018-08-28 | 佳能株式会社 | Communication device and its control method and storage medium |
| CN108804356A (en) * | 2017-04-26 | 2018-11-13 | 上海寒武纪信息科技有限公司 | Data transmission device and method |
| CN108885596A (en) * | 2017-12-29 | 2018-11-23 | 深圳市大疆创新科技有限公司 | Data processing method, equipment, dma controller and computer readable storage medium |
| CN109857686A (en) * | 2019-03-26 | 2019-06-07 | 北京简约纳电子有限公司 | A kind of method that DMA data synchronous transfer becomes asynchronous transmission |
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| US20060179181A1 (en) * | 2005-02-04 | 2006-08-10 | Samsung Electronics Co., Ltd. | Apparatus and method for controlling direct memory access |
| CN101017469A (en) * | 2007-03-07 | 2007-08-15 | 威盛电子股份有限公司 | Control device for direct memory access and method for controlling transmission thereof |
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| US20020188771A1 (en) * | 2001-06-06 | 2002-12-12 | Mitsubishi Denki Kabushiki Kaisha | Direct memory access controller for carrying out data transfer by determining whether or not burst access can be utilized in an external bus and access control method thereof |
| US20060179181A1 (en) * | 2005-02-04 | 2006-08-10 | Samsung Electronics Co., Ltd. | Apparatus and method for controlling direct memory access |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN108462817A (en) * | 2017-02-22 | 2018-08-28 | 佳能株式会社 | Communication device and its control method and storage medium |
| CN108804356A (en) * | 2017-04-26 | 2018-11-13 | 上海寒武纪信息科技有限公司 | Data transmission device and method |
| CN108885596A (en) * | 2017-12-29 | 2018-11-23 | 深圳市大疆创新科技有限公司 | Data processing method, equipment, dma controller and computer readable storage medium |
| CN109857686A (en) * | 2019-03-26 | 2019-06-07 | 北京简约纳电子有限公司 | A kind of method that DMA data synchronous transfer becomes asynchronous transmission |
| CN109857686B (en) * | 2019-03-26 | 2020-12-29 | 北京简约纳电子有限公司 | Method for converting synchronous transmission of DMA data into asynchronous transmission |
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| CN101661447B (en) | 2014-02-12 |
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