CN101645058B - Command processing method, command sending method, device and system - Google Patents
Command processing method, command sending method, device and system Download PDFInfo
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- CN101645058B CN101645058B CN 200910092007 CN200910092007A CN101645058B CN 101645058 B CN101645058 B CN 101645058B CN 200910092007 CN200910092007 CN 200910092007 CN 200910092007 A CN200910092007 A CN 200910092007A CN 101645058 B CN101645058 B CN 101645058B
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Abstract
The invention provides a command processing method, a command sending method, a device and a system, wherein the command processing method comprises the following steps: receiving commands sent by a host machine through a processing layer data packet, obtaining a base address carried in the high address space of the processing layer data packet, wherein the base address is used for indentifying operational types of the commands, and carrying out corresponding operations according to the operational types of the command indentified by the base address. By the processing, detects of high expenditure, lower performance of a link circuit in the prior art caused by the data volume oversize of the commands are overcome and the own data volume of the commands can be saved, thus reducing sending times of the commands, reducing the expenditure of the link circuit and increasing the performance of the link circuit.
Description
Technical field
The embodiment of the invention relates to field of computer technology, relates in particular to a kind of command handling method, command sending method, Apparatus and system.
Background technology
In the prior art, quick peripheral component interconnection (Peripheral Component Interconnect Express; Hereinafter to be referred as: PCIE) be a kind of bus and interface standard.At (the solid state disk of the solid state hard disc with PCIE interface; Hereinafter to be referred as: SSD), PCIE is mainly as a delivery agreement, all is through personal computer system interface (the Small Computer System Interface over PCIE based on the PCIE standard to the control of SSD with to the reading and writing data of SSD; Hereinafter to be referred as: SCSI OVER PCIE) or off-gauge SCSI OVER PCIE realize.That is to say that read write command and control command are carried at processing layer packet (transaction layer packet; Hereinafter to be referred as: in useful load TLP) (payload), and be handed down to SSD with the canonical form of storer (memory) write operation of PCIE, subsequently, SSD can be through carrying out corresponding order to the parsing of content in the useful load.
In the PCIE agreement, the size of load can receive the restriction of payload capacity and processor cache capacity among the TLP, and when especially main frame was initiatively initiated memory write operation, the restriction that receives the processor cache capacity was especially obvious.
In realizing process of the present invention; The inventor finds that prior art the issuing in the process an of subcommand, mainly carries in the order: the length of the action type of order, the transaction number of order, data, the LBA pattern of data (Logical Block Addressing; Hereinafter to be referred as: LBA) address etc., in the ordinary course of things, the primary memory write operation can only transmit the data of 8 bits (byte), and owing to need carry above-mentioned parameter in the order, therefore, the data volume of order itself may surpass 8 bits sometimes.Therefore, issue a subcommand and need carry out twice storage device write operation at least, thereby increased the expense of link, reduced the performance of link.
Summary of the invention
The embodiment of the invention provides a kind of command handling method, command sending method, Apparatus and system; The defective that cause the expense of link big in order to solve in the prior art owing to the data volume of order itself is excessive, performance is low has realized ordering the saving of data volume own.
The embodiment of the invention provides a kind of command handling method; Be applied to have the communication between the equipment of quick peripheral component interconnect standard interface; Said method comprises: equipment passes through the configuration space of self to main frame application base address; Said configuration space comprises first sector address and second sector address, and wherein first sector address is used to send the read operation order, and the base address of first sector address is used to identify the read operation order; Second sector address is used to send the write operation order, and the base address of second sector address is used to identify the write operation order; Equipment receives the order that main frame issues through the processing layer packet; Equipment obtains the base address of carrying in the space, high address in the processing layer packet packet header, and wherein, route is participated in as start address in the base address of carrying, and directly is used to identify the action type of the order that issues; The action type of the said order that issues comprises read operation, write operation and query manipulation; Equipment is operated according to the action type of the order that issues of the base address sign of carrying accordingly.
The embodiment of the invention also provides a kind of command sending method; Be applied to have the communication between the equipment of quick peripheral component interconnect standard interface; Said method comprises: main frame issues the base address according to the application of equipment to equipment; Said configuration of devices space comprises first sector address and second sector address, and wherein first sector address is used to send the read operation order, and the base address of first sector address is used to identify the read operation order; Second sector address is used to send the write operation order, and the base address of second sector address is used to identify the write operation order; Main frame to the equipment transmitting order to lower levels, carries base address in the space, high address in the processing layer packet packet header through the processing layer packet, and route is participated in as start address in the base address of carrying, and directly is used to identify the action type of the order that issues; The action type of the said order that issues comprises read operation, write operation and query manipulation.
The embodiment of the invention also provides a kind of equipment with quick peripheral component interconnect standard interface, comprising: receiver module is used to receive the order that main frame issues through the processing layer packet; Acquisition module is used for obtaining the base address of carrying in the space, high address in processing layer packet packet header, and route is participated in as start address in the base address of carrying, and directly is used to identify the action type of the order that issues; The action type of the said order that issues comprises read operation, write operation and query manipulation; Wherein, Said base address of carrying be said equipment before receiver module receives order, to the main frame application, said configuration space comprises first sector address and second sector address through self configuration space; Wherein first sector address is used to send the read operation order; The base address of first sector address is used to identify the read operation order, and second sector address is used to send the write operation order, and the base address of second sector address is used to identify the write operation order; First processing module is used for operating accordingly according to the action type of the order that issues of the base address of carrying sign.
The embodiment of the invention also provides a kind of main process equipment; Comprise: second processing module; Be used in the space, high address in processing layer packet packet header, carrying the base address, route is participated in as start address in the base address of carrying, and directly is used for the action type of marking command; The action type of said order comprises read operation, write operation and query manipulation; Wherein, Said base address of carrying is a equipment with quick peripheral component interconnect standard interface through self configuration space to said main process equipment application; Said configuration space comprises first sector address and second sector address, and wherein first sector address is used to send the read operation order, and the base address of first sector address is used to identify the read operation order; Second sector address is used to send the write operation order, and the base address of second sector address is used to identify the write operation order; Sending module is used for through the processing layer packet to the equipment transmitting order to lower levels with quick peripheral component interconnect standard interface.
The embodiment of the invention also provides a kind of command treatment system, comprises above-mentioned equipment and above-mentioned main process equipment with quick peripheral component interconnect standard interface.
The command handling method of the embodiment of the invention, command sending method, Apparatus and system; Through utilizing the high address marking command action type in the processing layer packet; Need not re-use the command operation type parameter in the feasible order and come the marking command action type; Overcome cause the expense of link big owing to the data volume of order itself is excessive in the prior art, defective that performance is low, can save the data volume of order itself, thereby reduce the number of times that order issues; Reduce the expense of link, improved the performance of link.
Description of drawings
In order to be illustrated more clearly in the embodiment of the invention or technical scheme of the prior art; To do one to the accompanying drawing of required use in embodiment or the description of the Prior Art below introduces simply; Obviously, the accompanying drawing in describing below is some embodiments of the present invention, for those of ordinary skills; Under the prerequisite of not paying creative work property, can also obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is the process flow diagram of the command handling method of the embodiment of the invention;
Fig. 2 is the synoptic diagram in the configuration of devices space of the embodiment of the invention;
Fig. 3 is the synoptic diagram in 32 TLP packet header of the embodiment of the invention;
Fig. 4 is the synoptic diagram in 64 TLP packet header of the embodiment of the invention;
Fig. 5 is the process flow diagram of the command sending method of the embodiment of the invention;
Fig. 6 is the structural representation of the equipment of the quick peripheral component interconnect standard of having of embodiment of the invention interface;
Fig. 7 is the structural representation of the main process equipment of the embodiment of the invention.
Embodiment
To combine the accompanying drawing in the embodiment of the invention below, the technical scheme in the embodiment of the invention is carried out clear, intactly description, obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills are not making the every other embodiment that is obtained under the creative work prerequisite, all belong to the scope of the present invention's protection.
According to embodiments of the invention, a kind of command handling method is provided, Fig. 1 is the process flow diagram of the command handling method of the embodiment of the invention, and is as shown in Figure 1, comprises according to the command handling method of the embodiment of the invention:
Particularly, this base address is the start address of sending the address field of order, and equipment can pass through the configuration space of self to the main frame application, that is to say, main frame is through with the base address being this order of address space transmission of start address.In embodiments of the present invention, this base address also is used for the action type of marking command.
Particularly, the action type of mentioned order can comprise: read operation and write operation.Need to prove that in embodiments of the present invention, the action type of order can also comprise multiple action types such as query manipulation.
Below, the details in the above-mentioned processing procedure is carried out detailed explanation.
In the description below the embodiment of the invention, for convenience, the read operation and the write operation order that issue with the reception main frame are that example describes.
Particularly, for carrying out the said technical scheme of the embodiment of the invention, equipment need pass through the configuration space of self to main frame application base address.Fig. 2 is the synoptic diagram in the configuration of devices space of the embodiment of the invention; As shown in Figure 2; In the 00-15 of this configuration of devices space; Comprise preserve first base address (Base Address 0) to the 6th base address the address space of (Base Address 5), equipment can be through this six sector addresses space to main frame (or system) application base address, the base address quantity of application can be provided with according to actual needs; To apply for that two base address are that example describes, equipment is respectively applied for sign read operation and write operation to two base address of main frame application in the present embodiment.Above-mentioned two base address are the start address of the address space or the address field of host assignment, and the shared bit number of this address space or address field can be adjusted according to actual conditions.Need to prove that owing to only comprise six sector address spaces in the configuration space, therefore, equipment at most can only be through configuration space to six base address of main frame application.
Main frame is after the address field application of the equipment of receiving; Can correspondingly distribute two address fields to give equipment; One sector address is used to send the read operation order, and the base address of this sector address (that is the start address of this sector address) is used to identify the read operation order; Another sector address is used to send the write operation order, and the base address of this sector address is used to identify the write operation life.Subsequently, main frame will be distributed in the corresponding address space of base address write device configuration space of two address fields of equipment, and will be as shown in Figure 2; In an embodiment of the present invention; Main frame will represent that the base address of the address field of read operation has write in the space, first base address of configuration space, and the read command that All hosts is handed down to this equipment all issues through this base address, promptly; Main frame is carried at this base address in the space, high address in TLP packet header when issuing read operation; Main frame will represent that the base address of the address field of write operation has write in the space, second base address of configuration space; The write order that All hosts is handed down to this equipment all issues through this base address; That is, main frame is carried at this base address in the space, high address in TLP packet header when issuing write operation.
Concrete, main frame is carried at the base address of distributing to this equipment mark read operation in the space, high address in TLP packet header when issuing the read operation order, and this high address is used to route to the equipment that receives this order.For example; As shown in Figure 3; Fig. 3 is the synoptic diagram in 32 TLP packet header of the embodiment of the invention, and is as shown in Figure 3, and address [31:2] (Address [31:2]) is the space, high address in the TLP packet header; In practical application, can write successively the Address [31:2] in TLP packet header from the most significant digit in space, high address according to the shared concrete bit number in base address.Fig. 4 is the synoptic diagram in 64 TLP packet header of the embodiment of the invention; As shown in Figure 4; Address [63:32] (Address [63:32]) and address [31:2] (Address [31:2]) are the space, high address in the TLP packet header; In practical application, can write successively the Address [63:32] and/or Address [31:2] in TLP packet header from the most significant digit in space, high address according to the shared concrete bit number in base address.Route is participated in as start address in the base address of carrying in the space, above-mentioned high address.After equipment receives order, can begin from the most significant digit the space, high address in packet header, resolve the base address in the space, high address, TLP packet header, and confirm that according to the base address that parses the action type that receives orders is read operation or write operation.Thereby the action type according to order is operated accordingly.
Need to prove that the described equipment of the embodiment of the invention is the equipment with quick peripheral component interconnect standard interface, comprise solid state hard disc (Solid State Disk with quick peripheral component interconnect standard interface; Hereinafter to be referred as: SSD).It will be appreciated by persons skilled in the art that the embodiment of the invention not only can be used among the SSD with PCIE interface, can also be used for all through the communication between two equipment of PCIE bus interconnection.
Through above-mentioned processing; In the useful load of TLP bag; Just need not use special byte to represent the action type of ordering, thereby can reduce the length of order itself, can reduce the number of times of the memory read write operation that carries out owing to frequent execution read write command simultaneously; Thereby improved the utilization factor of link, and improved treatable maximum I/O frequency (the Input/Output Per Second in the unit interval of system; Hereinafter to be referred as: IOPS) and streamability.
In addition; Can find out from above-mentioned processing procedure; The embodiment of the invention is directly used the action type of the base address marking command in the space, high address; No longer need use special byte to represent the action type of ordering in the order, thereby increase the reservation position in the order, this reservation position can be used for carrying out the expansion of order.When order needs expansion, just do not need again multiple read write command, also can improve utilization factor, IOPS and the streamability of link to a certain extent.
According to another embodiment of the present invention, a kind of command sending method is provided, Fig. 5 is the process flow diagram of the command sending method of the embodiment of the invention, and is as shown in Figure 5, comprises according to the command sending method of the embodiment of the invention:
Step 501, main frame issues the base address according to the application of equipment to equipment, and this base address is used to identify the action type of the order that main frame issues to equipment.
Particularly, the action type of order can comprise: read operation and write operation.Need to prove that in embodiments of the present invention, the action type of order can also comprise multiple action types such as query manipulation, still, in the description below the embodiment of the invention, is that example describes with read operation and write operation only.
At first; Equipment need pass through the configuration space of self to main frame application base address, and the configuration of devices space can be understood with reference to Fig. 2, in addition; In the above embodiments; Equipment has been carried out detailed explanation through configuration space to the process of main frame application base address, particular content can be understood with reference to the corresponding contents in the foregoing description, repeats no more at this.
Main frame can correspondingly distribute two address fields to give equipment after the address field application of the equipment of receiving, and a sector address is used to identify read operation, and another sector address is used to identify write operation.Subsequently; The base address (that is, the start address of address field) that main frame will be distributed to two address fields of equipment writes in the corresponding address space in equipment disposition space, and is as shown in Figure 2; In an embodiment of the present invention; Main frame will represent that the base address of the address field of read operation has write in the space, first base address of configuration space, and the read command that All hosts is handed down to this equipment all issues through this base address, promptly; Main frame is carried at this base address in the space, high address in TLP packet header when issuing read operation; Main frame will represent that the base address of the address field of write operation has write in the space, second base address of configuration space, and the write order that All hosts is handed down to this equipment all issues through this base address.
Step 502, main frame to the equipment transmitting order to lower levels, wherein, carries the base address in the space, high address of processing layer packet through the processing layer packet, and this base address is used for the action type of marking command.
Concrete, when main frame when issuing read operation, the base address of distributing to this equipment mark read operation order is carried in the space, high address in TLP packet header, this high address is used to route to the equipment that receives this order.As shown in Figure 3; (Address [31:2]) is the space, high address in the TLP packet header in address [31:2]; In practical application, can write successively the Address [31:2] in TLP packet header from the most significant digit in space, high address according to the shared concrete bit number in base address.As shown in Figure 4; Address [63:32] (Address [63:32]) and address [31:2] (Address [31:2]) are the space, high address in the TLP packet header; In practical application, can write successively the Address [63:32] and/or Address [31:2] in TLP packet header from the most significant digit in space, high address according to the shared concrete bit number in base address.
Pass through TLP behind the equipment transmitting order to lower levels at main frame; Route is participated in as start address in this base address of wherein carrying; Make the equipment that receives this order can confirm the action type of order, and operate accordingly according to the action type of order according to the base address in the TLP packet header.
Through above-mentioned processing; Come the marking command type through the partial information of utilizing address in the TLP packet header; Reduce the order length of main frame when the read write command of equipment sending data, thereby reduce the number of times that carries out the memory read write operation, and then improve the utilization factor of link.In addition, increased the reservation position in the order, made order that more expansion can be arranged.
According to embodiments of the invention; A kind of equipment with quick peripheral component interconnect standard interface is provided; Fig. 6 is the structural representation of the equipment of the quick peripheral component interconnect standard of having of embodiment of the invention interface; As shown in Figure 6, comprise according to the equipment of the quick peripheral component interconnect standard of having of embodiment of the invention interface: receiver module 60, acquisition module 62, first processing module 64.Below, in conjunction with accompanying drawing, the equipment of the embodiment of the invention is elaborated.
Particularly, this base address is the start address of sending the address field of order, and equipment can pass through the configuration space of self to the main frame application, that is to say, main frame is through with the base address being this order of address space transmission of start address.In embodiments of the present invention, this base address also is used for the action type of marking command;
Alternatively, the action type of order can comprise: read operation and write operation.Need to prove that in embodiments of the present invention, the action type of order can also comprise multiple action types such as query manipulation, still, in the description below the embodiment of the invention, is that example describes with read operation and write operation only.
Particularly, before the order that receiver module 60 reception main frames issue through TLP, the application module in the equipment can at first be passed through the configuration of devices space to the said base address of main frame application.As shown in Figure 2; In the 00-15 of this configuration of devices space; Comprise preserve first base address (Base Address 0) to the 6th base address the address space of (Base Address 5); The application module can be through this six sector addresses space to main frame (or system) application base address, and the quantity of application base address can be provided with according to actual needs, in the present embodiment to apply for that two base address are that example describes.Above-mentioned two base address are respectively applied for sign read operation and write operation.Above-mentioned two start addresses that the base address is the address space of host assignment, the shared bit number of this address space can be adjusted according to actual conditions.Need to prove that owing to only comprise six sector address spaces in the configuration space, therefore, equipment at most can only be through six base address of configuration space to the main frame application.Subsequently; Main frame can correspondingly distribute two address fields to give equipment, and the base address of two sector addresses is write the address space in the configuration space, need to prove; The particular location of base address in TLP packet header can be understood with reference to Fig. 3, Fig. 4, repeats no more at this.
When main frame issues the read write command of data; The base address of distributing to this equipment mark read operation is carried in the space, high address in TLP packet header; This high address is used to route to the equipment that receives this order, and wherein, route is participated in as start address in the base address.Acquisition module 62 can be confirmed the action type that receives orders through resolving the base address in the space, high address, TLP packet header.
Need to prove; The described equipment of the embodiment of the invention is the equipment with quick peripheral component interconnect standard interface; More specifically, the described equipment of the embodiment of the invention is solid state hard disc (the Solid State Disk with quick peripheral component interconnect standard interface; Hereinafter to be referred as: SSD).That is to say that the embodiment of the invention not only can be used among the SSD with PCIE interface, can also be used for all through the communication between two equipment of PCIE bus interconnection.
Through above-mentioned processing; Equipment passes through to main frame application base address; And resolve the base address of carrying in the TLP packet header, and just can confirm the action type of ordering, the while can reduce the length of order itself; And reduced the number of times of carrying out the memory write operation that read write command carries out owing to frequent, thereby utilization factor and the system treatable maximum I/O frequency and the streamability in the unit interval of link have been improved.
According to embodiments of the invention; A kind of main process equipment is provided, and Fig. 7 is the structural representation of the main process equipment of the embodiment of the invention, and is as shown in Figure 7; Main process equipment according to the embodiment of the invention comprises: second processing module 70, sending module 72; Below, in conjunction with accompanying drawing, the main process equipment of the embodiment of the invention is carried out detailed explanation.
Particularly, the action type of order can comprise: read operation and write operation.Need to prove that in embodiments of the present invention, the action type of order can also comprise multiple action types such as query manipulation, still, in the description below the embodiment of the invention, is that example describes with read operation and write operation only.
At first; Equipment need pass through the configuration space of self to main frame application base address, and the configuration of devices space can be understood with reference to Fig. 2, in addition; In the above embodiments; Equipment has been carried out detailed explanation through configuration space to the process of main frame application base address, particular content can be understood with reference to the corresponding contents in the foregoing description, repeats no more at this.
Main frame can correspondingly distribute two address fields to give equipment after the address field application of the equipment of receiving, and a sector address is used to identify read operation, and other end address is used to identify write operation.Subsequently; Main frame will distribute to equipment two address fields the base address (promptly; The start address of address field) write in the corresponding address space in equipment disposition space, as shown in Figure 2, in an embodiment of the present invention; Main frame will represent that the base address of the address field of read operation has write in the space, first base address of configuration space; All read commands that are handed down to this equipment all issue through this base address, and main frame will represent that the base address of the address field of write operation has write in the space, second base address of configuration space (Base Address 2), and all write orders that are handed down to this equipment all issue through this base address.
The particular location of base address in TLP packet header can be understood with reference to Fig. 3, Fig. 4, repeats no more at this.
Sending module 72 is used for through the processing layer packet wherein, carrying the base address in the space, high address of processing layer packet to the equipment transmitting order to lower levels, and this base address is used for the action type of marking command.
Pass through TLP behind the equipment transmitting order to lower levels at sending module 72, the high address in the packet header is used to route to the equipment that receives this order, and route is participated in as start address in this base address of carrying in the space, high address.Make the action type that can confirm order according to the base address in the TLP packet header that receives this order, and operate accordingly according to the action type of order.
Through above-mentioned processing; Main process equipment comes the marking command type through the mode of in TLP packet header, carrying the base address; Reduce the order length of main frame when the read write command of equipment sending data, thereby reduced the number of times that carries out the memory read write operation, and then improved the utilization factor of link.In addition, also increased the reservation position in the read write command, made order that more expansion can be arranged.
According to embodiments of the invention; A kind of command treatment system also is provided; Comprise equipment and main process equipment in the foregoing description with quick peripheral component interconnect standard interface; In the above-described embodiments, equipment and the main process equipment with quick peripheral component interconnect standard interface carried out detailed explanation, repeated no more at this.
The command treatment system of the embodiment of the invention has reduced the number of times that carries out the memory read write operation, and then improves the utilization factor of link.
Device embodiment described above only is schematic; Wherein said unit as the separating component explanation can or can not be physically to separate also; The parts that show as the unit can be or can not be physical locations also; Promptly can be positioned at a place, perhaps also can be distributed on a plurality of NEs.Can realize the purpose of present embodiment scheme according to the needs selection some or all of module wherein of reality.Those of ordinary skills promptly can understand and implement under the situation of not paying performing creative labour.
Through the description of above embodiment, those skilled in the art can be well understood to each embodiment and can realize by the mode that software adds essential general hardware platform, can certainly pass through hardware.Based on such understanding; The part that technique scheme contributes to prior art in essence in other words can be come out with the embodied of software product; This computer software product can be stored in the computer-readable recording medium, like ROM/RAM, magnetic disc, CD etc., comprises that some instructions are with so that a computer equipment (can be a personal computer; Server, perhaps network equipment etc.) carry out the described method of some part of each embodiment or embodiment.
What should explain at last is: above embodiment is only in order to explaining technical scheme of the present invention, but not to its restriction; Although with reference to previous embodiment the present invention has been carried out detailed explanation, those of ordinary skill in the art is to be understood that: it still can be made amendment to the technical scheme that aforementioned each embodiment put down in writing, and perhaps part technical characterictic wherein is equal to replacement; And these are revised or replacement, do not make the spirit and the scope of the essence disengaging various embodiments of the present invention technical scheme of relevant art scheme.
Claims (9)
1. command handling method is applied to have the communication between the equipment of quick peripheral component interconnect standard interface, it is characterized in that said method comprises:
Equipment passes through the configuration space of self to main frame application base address; Said configuration space comprises first sector address and second sector address; Wherein first sector address is used to send the read operation order; The base address of first sector address is used to identify the read operation order, and second sector address is used to send the write operation order, and the base address of second sector address is used to identify the write operation order;
Equipment receives the order that main frame issues through the processing layer packet;
Equipment obtains the base address of carrying in the space, high address in the said processing layer packet packet header, and route is participated in as start address in said base address of carrying, and directly is used to identify the action type of the said order that issues; The action type of the said order that issues comprises read operation, write operation and query manipulation;
Equipment is operated according to the action type of the said order that issues of said base address sign of carrying accordingly.
2. command handling method according to claim 1 is characterized in that: said base address of carrying is allocated in advance by said main frame.
3. command sending method is applied to have the communication between the equipment of quick peripheral component interconnect standard interface, it is characterized in that said method comprises:
Main frame issues the base address according to the application of equipment to equipment; Said configuration of devices space comprises first sector address and second sector address; Wherein first sector address is used to send the read operation order; The base address of first sector address is used to identify the read operation order, and second sector address is used to send the write operation order, and the base address of second sector address is used to identify the write operation order;
Main frame passes through the processing layer packet to the equipment transmitting order to lower levels; Carry the base address in the space, high address in the said processing layer packet packet header; Route is participated in as start address in said base address of carrying, and directly is used to identify the action type of the said order that issues; The action type of the said order that issues comprises read operation, write operation and query manipulation.
4. command sending method according to claim 3 is characterized in that: said base address of carrying is allocated in advance by main frame.
5. the equipment with quick peripheral component interconnect standard interface is characterized in that, comprising:
Receiver module is used to receive the order that main frame issues through the processing layer packet;
Acquisition module is used for obtaining the base address of carrying in the space, high address in said processing layer packet packet header, and route is participated in as start address in said base address of carrying, and directly is used to identify the action type of the said order that issues; The action type of the said order that issues comprises read operation, write operation and query manipulation;
Wherein, Said base address of carrying be said equipment before receiver module receives order, to the main frame application, said configuration space comprises first sector address and second sector address through self configuration space; Wherein first sector address is used to send the read operation order; The base address of first sector address is used to identify the read operation order, and second sector address is used to send the write operation order, and the base address of second sector address is used to identify the write operation order;
First processing module, the action type of the said order that issues of the base address sign that is used for carrying according to said is operated accordingly.
6. the equipment with quick peripheral component interconnect standard interface according to claim 5 is characterized in that: said base address of carrying is allocated in advance by said main frame.
7. a main process equipment is characterized in that, comprising:
Second processing module is used in the space, high address in processing layer packet packet header, carrying the base address, and route is participated in as start address in said base address of carrying, and directly is used for the action type of marking command; The action type of said order comprises read operation, write operation and query manipulation;
Wherein, Said base address of carrying is a equipment with quick peripheral component interconnect standard interface through self configuration space to said main process equipment application; Said configuration space comprises first sector address and second sector address, and wherein first sector address is used to send the read operation order, and the base address of first sector address is used to identify the read operation order; Second sector address is used to send the write operation order, and the base address of second sector address is used to identify the write operation order;
Sending module is used for through said processing layer packet to the equipment transmitting order to lower levels with quick peripheral component interconnect standard interface.
8. main process equipment according to claim 7 is characterized in that: said base address of carrying is allocated in advance by said main process equipment.
9. a command treatment system is characterized in that, comprises that each describedly has the equipment of quick peripheral component interconnect standard interface and like each described main process equipment of claim 7 to 8 like claim 5 to 6.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200910092007 CN101645058B (en) | 2009-09-04 | 2009-09-04 | Command processing method, command sending method, device and system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200910092007 CN101645058B (en) | 2009-09-04 | 2009-09-04 | Command processing method, command sending method, device and system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101645058A CN101645058A (en) | 2010-02-10 |
| CN101645058B true CN101645058B (en) | 2012-12-19 |
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| KR101279213B1 (en) * | 2010-07-21 | 2013-06-26 | 삼성에스디에스 주식회사 | Device and method for providing soc-based anti-malware service, and interface method |
| CN102075401B (en) * | 2011-01-28 | 2013-08-07 | 华为技术有限公司 | Method, equipment and system for transmitting message on peripheral component interface express (PCIE) bus |
| CN102694717B (en) * | 2011-03-23 | 2017-04-12 | 华为数字技术（成都）有限公司 | Method, device and system for transmitting messages on PCIE bus |
| CN102243617B (en) * | 2011-07-08 | 2014-01-01 | 福建星网锐捷网络有限公司 | Read/write processing method, read/write processing equipment and read/write processing system |
| CN110134629B (en) * | 2019-05-20 | 2021-12-10 | 哈尔滨工业大学 | NVMe SSD PCIe data packet analysis method based on FPGA |
| CN113297111B (en) * | 2021-06-11 | 2023-06-23 | 上海壁仞智能科技有限公司 | Artificial intelligence chip and operation method thereof |
| CN113835756A (en) * | 2021-09-28 | 2021-12-24 | 深圳大普微电子科技有限公司 | Host command analysis method and device, solid state disk controller and solid state disk |
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| CN101193118A (en) * | 2007-07-25 | 2008-06-04 | 中兴通讯股份有限公司 | A communication method between upper device and lower device |
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