CN101634971B - Method, device and computer system for extracting data in advance - Google Patents
Method, device and computer system for extracting data in advance Download PDFInfo
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- CN101634971B CN101634971B CN2009101712801A CN200910171280A CN101634971B CN 101634971 B CN101634971 B CN 101634971B CN 2009101712801 A CN2009101712801 A CN 2009101712801A CN 200910171280 A CN200910171280 A CN 200910171280A CN 101634971 B CN101634971 B CN 101634971B
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Abstract
The invention provides a method, a device and a computer system for extracting data in advance. The method for extracting data in advance comprises the following steps: when a reading command of a bus device to first data is received, extracting second data succeeding after the first data in advance and storing the second data in a bumper; simultaneously, adding up the storage time of the second data stored in the bumper, and judging whether the added-up storage time reaches or exceeds effective time or not; and when the storage time reaches or exceeds the effective time, revoking the second data which are extracted in advance, thereby avoiding a possible reading fault.
Description
Technical field
The present invention is relevant for a kind of data extraction method and device, and is particularly to a kind of extracting data in advance and device of guaranteeing data validity.
Background technology
When general bus unit will read data in the storer, can transmit a memory access requests by bus and give chipset.At this moment, chipset is except the meeting data that extraction element is asked in processor or storer, in order to guarantee reading speed, also can extract (Pre-fetch) a part of data in advance and deposit in one and extract in the impact damper in advance, so as to when bus unit proposes next memory access requests, can directly respond, and then shorten the time of bus unit reading of data with the data of extracting in advance.
With Peripheral Component Interconnect (Peripheral Component Interconnect, PCI) direct memory access (DMA) on the bus (Direct Memory Access, DMA) engine is an example, when it will read the data of 4 bytes (Byte) in the storer, if the address of data is the buffer[0 at storer], then chipset except meeting with buffer[0] data response give the DMA engine, also can extract in advance 64 bytes data (except buffer[0 is got in meeting], also may get buffer[1] in data), and with this data storing in extracting in the impact damper in advance.In view of the above, not only can provide the DMA engine required data, leave the data of extracting in advance in the impact damper in and also can when the DMA engine proposes next memory access requests, directly offer the DMA engine.
Yet, if before the DMA engine proposes next memory access requests, system update the data in the storer, originally extracting and leave in the data of extracting in advance in the impact damper in advance by chipset will lose efficacy.If this moment, chipset still used the fail data of extracting in advance in the impact damper to respond the DMA engine, will certainly cause the DMA engine to read wrong data.
Extract the situation that may there be mistake in data in advance for above-mentioned, known technology provides the solution of many correspondences.For instance, when system chipset receives processor for cycle of writing out (CPU to memory write cycle) of storer, or be when having detected interruption (Interrupt) generation, the data that are the deducibility storer are updated, this moment can be invalid by the data declaration that will extract in advance in the impact damper, thereby avoid reading wrong data.
Yet, even if known technology can be in response to the change of said system state, it is invalid to avoid read error in time will to extract data declaration in advance, but still having many situations is that chipset can't be detected or judge, for example during the memory cache (Cache) of the self of processor inside own, chipset can't learn that promptly the result still might cause data read errors.
Summary of the invention
The invention provides a kind of extracting data in advance,, set the effective time of extracting data in advance, can guarantee to extract in advance the validity of data at predictable data of update cycle.
The invention provides a kind of data in advance extraction element, the survival time of utilizing timer accumulative total to extract data in advance, and when its survival surpasses effective time, declare that immediately it lost efficacy, thereby avoid possible read error.
The present invention proposes a kind of extracting data in advance, is applicable to chipset.This extracting data in advance is included in when receiving bus unit for the reading command of first data, extract in advance second data that continue first data after also with this second data storing in impact damper.Also add up the survival time of this second deposit data in impact damper simultaneously, and judge whether the above-mentioned survival time of accumulative total meets or exceeds an effective time.And when the survival time meets or exceeds effective time, i.e. second data that declaration is extracted in advance are invalid.
The present invention proposes a kind of data in advance extraction element, and it comprises impact damper, timer and controller.Wherein, impact damper is in order to store the data of being extracted by the data in advance extraction element.Timer leaves survival time in the impact damper in order to cumulative data.Controller is coupled to impact damper and timer, in order to when receiving bus unit for the reading command of first data, extract in advance second data continue after first data with this second data storing in impact damper, and utilize timer to add up the survival time of second deposit data in impact damper, and when the survival time that timer added up met or exceeded effective time, it was invalid to be about to the second stored data declaration of impact damper.
The present invention also proposes a kind of computer system, and it comprises storer, chipset and bus unit.Wherein memory storage first data and second data after first data of continuing.Chipset is coupled to storer.Bus unit is coupled to chipset.Wherein chipset comprises impact damper, timer and controller.Wherein impact damper stores from the data that storer extracted.The timer cumulative data leaves the survival time in the impact damper in.Controller is coupled to impact damper and timer, when controller receives bus unit for the reading command of first data, extract in advance second data with this second data storing in impact damper, and utilize timer to add up the survival time of second deposit data in impact damper, and when the survival time of timer accumulative total meets or exceeds effective time, declare that the second stored data of impact damper are invalid.
Extracting data in advance of the present invention and device extract between the safe period of data survival in advance according to the update cycle setting chip group of data, and might make its inefficacy because of memory updating before making a mistake extracting data in advance, thereby avoid bus unit to read misdata.
Description of drawings
Fig. 1 is the data in advance extraction element calcspar that illustrates according to one embodiment of the invention.
Fig. 2 then is the calcspar of the computer system that illustrates according to one embodiment of the invention.
Fig. 3 is the process flow diagram of the extracting data in advance that illustrates according to one embodiment of the invention.
Fig. 4 is the process flow diagram of the extracting data in advance that illustrates according to one embodiment of the invention.
Embodiment
For above-mentioned feature and advantage of the present invention can be become apparent, embodiment cited below particularly, and cooperate appended graphic being described in detail below.
One of foreseeable data setting of update cycle the present invention is directed to during can guarantee that it effectively, and in chipset, be provided with a timer with accumulative total extract data in advance the survival time, and surpass effective time and might be updated the time when the survival time of extracting data in advance, at once make this extract data failure in advance, thereby avoid bus unit to read wrong data.
Fig. 1 is the data in advance extraction element calcspar that illustrates according to one embodiment of the invention, and Fig. 2 then is the calcspar of the computer system that illustrates according to one embodiment of the invention.Please be simultaneously with reference to Fig. 1 and Fig. 2, the data in advance extraction element 100 of present embodiment for example is to be configured in the chipset 220 of computer system 200, and be connected, and be connected with bus unit 240 by bus with memory cache 212 and system storage 230 in the processor 210 of computer system 200.
Wherein, described chipset for example is north bridge chips, South Bridge chip or in conjunction with the chipset of north and south bridge; Described bus for example is Peripheral Component Interconnect (PeripheralComponent Interconnect, PCI) bus; Described bus unit for example is that (Direct Memory Access, DMA) engine, present embodiment do not limit its scope in direct memory access (DMA).
When data in advance extraction element 100 proposes memory access requests at bus unit 240, in the memory cache 212 by processor 210, or, read for bus unit 240 by extracting data in the system storage 230 in advance.Data in advance extraction element 100 comprises working storage 110, impact damper 120, timer 130 and controller 140, and its function division is as follows:
Whether invalid working storage 110 stored in order to judgment data effective time.Particularly, at fixing data (for example video data or voice data) of update cycle, the effective time that can summarize data.Meaning promptly, each bus unit reads this section after these type of data can guarantee in effective time that computer system 200 can not upgrade data again, can guarantee that therefore 100 data of extracting in advance of data in advance extraction element are effective.This effective time, for example, can be when integrating computer system 200 by system manufacturer, video/audio driver (video/audio driver) (not illustrating) according to the audio/video devices in the computer system 200 (audio/video device) (not illustrating) can obtain a desired update cycle to video/audio data of this audio/video devices, general relative fixed of this update cycle, therefore in an embodiment of the present invention, can be directly with this update cycle as judgment data whether invalid effective time, and be stored in the working storage 110.In an embodiment of the present invention, when computer system 200 runnings, the Basic Input or Output System (BIOS) of computer system 200 (Basic input output system, BIOS) (do not illustrate) or operating system softwares such as (Operation system) according to the timer 130 of programming effective time stored in the working storage 110.
Impact damper 120 is in order to store the data of being extracted in advance by data in advance extraction element 100.These data for example are the memory access requests that is sent according to bus unit 240, and the data that obtain in the memory cache 212 by system storage 230 or processor 210.
In detail, Fig. 3 is the process flow diagram of the extracting data in advance that illustrates according to one embodiment of the invention.Please be simultaneously with reference to Fig. 1, Fig. 2 and Fig. 3, the extracting data in advance of present embodiment is applicable to above-mentioned data in advance extraction element 100, its step is as follows:
At first, receive the reading command (step S302) of bus unit 240 by controller 140 for first data.Wherein, controller 140 for example can be according to the data address that writes down in the reading command, looks for first data that bus unit 240 is asked in the memory cache 212 of processor 210 or system storage 230, gives bus unit 240 to respond.
In addition, in order to increase the speed of bus unit 240 reading of data, controller 140 also comprises in advance and to extract one second data continuing above-mentioned first data after being stored in the impact damper 120, and starts timer 130 simultaneously and begin the totally survival time (step S304) of this second deposit data in impact damper 120.In detail, the first above-mentioned data for example are the first areas that is stored in storer, and second data that controller 140 extracts in advance then are the data that continue in storer and store in the second area after this first area.
It should be noted that, above-mentioned controller 140 is when extracting data, for example in the memory cache 212 of inspection system storer 230 and processor 210 whether required data are arranged simultaneously, if the memory cache of system storage 230 and processor 210 212 all has required data among both, wherein up-to-date data of selective extraction then, and be stored in impact damper 120, extracted the validity of data to guarantee.
And the survival time of timer 130 accumulative totals second data, controller 140 can be compared this survival time with the effective time of record in the working storage 110, judges according to this whether this survival time meets or exceeds effective time (step S306).
Wherein, controller 140 for example can be judged the update time of second data according to the store access cycle of bus unit for data, and this update time is in order to as the effective time of judging that second data extracted in advance are whether invalid.And when the survival time of timer 130 accumulative totals meets or exceeds this effective time, promptly represent second data in the memory cache 212 that originally was stored in system storage 230 or processor 210 to be updated, therefore second data of being extracted in advance by controller 140 just might be wrong.Controller 140 must will be stored in second data declaration invalid (step S308) in the impact damper 120 this moment, to avoid possible read error.
In another embodiment of the present invention, timer 130 can adopt mode regularly, and timer 130 was programmed according to the effective time of record in the working storage 110.That is to say that in step S306 when 130 these survival times of accumulative total of timer reached this effective time, timer 130 can overflow by counting, then sends an interrupt control signal to controller 140.When controller 140 receives this interrupt control signal, promptly represent second data in the memory cache 212 that originally was stored in system storage 230 or processor 210 to be updated.Therefore at step S308, second data declaration that controller 140 will be stored in the impact damper 120 is invalid.
By said method, data in advance extraction element 100 can extract under the data conditions in advance, guarantees the validity of the data of extracting.And at bus unit 240 when chipset 220 proposes next memory access requests, 100 of data in advance extraction elements can directly be responded with the extraction data in advance that are stored in the impact damper 120, so as to increasing the speed of bus unit 240 reading of data, describe in detail for an embodiment again with next.
Fig. 4 is the process flow diagram of the extracting data in advance that illustrates according to one embodiment of the invention.Please be simultaneously with reference to Fig. 1, Fig. 2 and Fig. 4, the extracting data in advance of present embodiment is equally applicable to above-mentioned data in advance extraction element 100, and its step is as follows:
At first, receive the reading command (step S402) of bus unit 240 by controller 140 for first data.Wherein, controller 140 for example can be according to the data address that writes down in the reading command, in the memory cache 212 of processor 210 or system storage 230, look for first data that bus unit 240 is asked, to be stored in impact damper 120 (step S404), except extracting first data, controller 140 also comprises in advance and to extract one second data that continue after first data, to be stored in (step S406) in the impact damper 120, give bus unit 240 (step S408) with first data response in the impact damper 120 then.
Wherein, described as previous embodiment, controller 140 is after depositing second data in impact damper 120, promptly can start timer 130 and begin the accumulative total survival time of this second deposit data in impact damper 120, judge according to this whether these second data are still effective, and in good time that second data declaration is invalid, read wrong data to avoid bus unit.
It should be noted that, in the present embodiment, controller 140 can receive the reading command (step S410) of bus unit 240 for second data again after extracting in advance and storing second data, and selects to respond with second data that before were stored in the impact damper 120.
Yet, second data that are stored in the impact damper 120 might lose efficacy because its survival time surpasses effective time in controlled device 140 declarations, therefore controller 140 is before the request of responding bus unit 240, essentially judges second data that are stored in the impact damper 120 whether effective (step S412) earlier.
Wherein, if judge that second data are still effective, promptly can the second interior data of impact damper directly respond to bus unit (step S414).Yet, if judge that second data are invalid, then need again to look for second data that bus unit 240 is asked in the memory cache 212 of processor 210 or the system storage 230, and second data (step S416) in order to store in the update buffer 120, and can give bus unit 240 (step S418) with second data response after upgrading.
Pass through said method, data in advance extraction element 100 can be when extracting memory data, extract the data that continue in advance, so that respond the follow-up memory access requests of bus unit 240, and with the follow-up memory access requests of the data response that extracts in advance the time, meeting of the present invention judges earlier whether the data of extracting in advance are effective, thereby has improved the accuracy of bus unit 240 reading of data.And when it's effective time have been past the data of extracting in advance, still can respond by extracting data once more, and can possess the elasticity of extracting data.
In sum, extracting data in advance of the present invention and device according to bus unit for the store access cycle of data come that judgment data may be updated during, and by the sequencing timer, with when the survival time of extracting data in advance meets or exceeds its effective time, the data declaration that extracts in advance in the data buffer was lost efficacy, therefore can guarantee to extract in advance the validity of data, and avoid bus unit to read misdata extracting data in advance with when increasing reading speed.
The above only is preferred embodiment of the present invention; so it is not in order to limit scope of the present invention; any personnel that are familiar with this technology; without departing from the spirit and scope of the present invention; can do further improvement and variation on this basis, so the scope that claims were defined that protection scope of the present invention is worked as with the application is as the criterion.
Being simply described as follows of symbol in the accompanying drawing:
100: the data in advance extraction element
110: working storage
120: impact damper
130: timer
140: controller
200: computer system
210: processor
212: memory cache
220: chipset
230: system storage
240: bus unit
S302～S308: each step of extracting data in advance of the present invention
S402～S418: each step of extracting data in advance of the present invention.
Claims (14)
1. an extracting data in advance is characterized in that, is applicable to a chipset, and this extracting data in advance comprises the following steps:
Receive the reading command of a bus unit for one first data;
Extract in advance one second data continue these first data after with this second data storing in an impact damper, and the survival time of this second deposit data in this impact damper totally;
Judge whether this survival time that is added up meets or exceeds an effective time; And
When this survival time meets or exceeds this effective time, declare that these second data are invalid.
2. extracting data in advance according to claim 1 is characterized in that, after receiving the step of this bus unit for this reading command of these first data, also comprises:
Extract these first data with this first data storing in this impact damper; And
After extracting these second data that continue after these first data in advance, these first data of responding in this impact damper are given this bus unit.
3. extracting data in advance according to claim 1 is characterized in that, this first data storing is in a first area of a storer, the second area after this first area and this second data storing continues in this storer.
4. extracting data in advance according to claim 3 is characterized in that, this storer comprise the system storage that is connected with this chipset and the memory cache in the processor one of them.
5. extracting data in advance according to claim 4 is characterized in that, extracts these second data in advance so that this second data storing is comprised in the step of this impact damper:
Inspect in this memory cache of this system storage and this processor and whether comprise this second data; And
Extract in advance these up-to-date in this memory cache of this system storage and this processor second data with this second data storing in this impact damper.
6. extracting data in advance according to claim 1 is characterized in that, these data comprise video data and voice data one of them.
7. a data in advance extraction element is characterized in that, comprising:
One impact damper stores the data of being extracted;
One timer, the accumulative total survival time of this deposit data in this impact damper; And
One controller, be coupled to this impact damper and this timer, when receiving a bus unit for a reading command of one first data, extract in advance one second data continue after these first data with this second data storing in this impact damper, and utilize this timer to add up this second deposit data this survival time in this impact damper, and when this survival time of this timer accumulative total meets or exceeds an effective time, declare that these stored second data of this impact damper are invalid.
8. data in advance extraction element according to claim 7 is characterized in that, also comprises:
One working storage is coupled to this controller, this temporary memory stores this effective time in order to judge that these second data are whether invalid.
9. data in advance extraction element according to claim 7, it is characterized in that, this timer is according to being programmed this effective time, when this survival time of this timer accumulative total reaches this effective time, this timer sends an interrupt control signal to this controller, and this controller declares that according to this interrupt control signal these second data are invalid.
10. data in advance extraction element according to claim 7, it is characterized in that, this controller is when receiving this bus unit for this reading command of this first data, also extract these first data with this first data storing in this impact damper, and after extracting these second data in advance, these first data of responding in this impact damper are given this bus unit.
11. data in advance extraction element according to claim 7 is characterized in that, this controller also comprises:
According to the store access cycle of this bus unit for these data, judge a update time of these second data, this update time is in order to as this effective time of judging that these second data of extracting in advance are whether invalid.
12. data in advance extraction element according to claim 7 is characterized in that, this data in advance extraction element is disposed in the chipset.
13. data in advance extraction element according to claim 7 is characterized in that, this bus unit comprises a direct memory access engine.
14. a computer system is characterized in that, comprising:
One storer stores one first data and one second data after these first data of continuing;
One chipset is coupled to this storer; And
One bus unit is coupled to this chipset,
Wherein, this chipset comprises:
One impact damper stores from the data that this storer extracted;
One timer, the accumulative total survival time of this deposit data in this impact damper; And
One controller, be coupled to this impact damper and this timer, when this controller receives this bus unit for a reading command of these first data, extract in advance these second data with this second data storing in this impact damper, and utilize this timer to add up this second deposit data this survival time in this impact damper, and when this survival time of this timer accumulative total meets or exceeds an effective time, declare that these stored second data of this impact damper are invalid.
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| CN102156628B (en) * | 2010-04-27 | 2014-04-02 | 威盛电子股份有限公司 | Microprocessor and hierarchical memory method of prefetching data to cache memory of microprocessor |
| CN105068762B (en) * | 2015-08-06 | 2018-05-18 | 北京奇艺世纪科技有限公司 | A kind of method for reading data and device |
| CN109614146B (en) * | 2018-11-14 | 2021-03-23 | 西安翔腾微电子科技有限公司 | Local jump instruction fetch method and device |
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| CN1649131A (en) * | 2005-03-08 | 2005-08-03 | 北京中星微电子有限公司 | Graphic engine chip and its using method |
| CN1731374A (en) * | 2005-08-25 | 2006-02-08 | 北京中星微电子有限公司 | A cache prefetch module and method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1649131A (en) * | 2005-03-08 | 2005-08-03 | 北京中星微电子有限公司 | Graphic engine chip and its using method |
| CN1731374A (en) * | 2005-08-25 | 2006-02-08 | 北京中星微电子有限公司 | A cache prefetch module and method thereof |
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| JP特开2008-59577A 2008.03.13 |
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