CN101547053A - Clock-switching method and clock-generating device - Google Patents

Clock-switching method and clock-generating device Download PDF

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CN101547053A
CN101547053A CN200810102995A CN200810102995A CN101547053A CN 101547053 A CN101547053 A CN 101547053A CN 200810102995 A CN200810102995 A CN 200810102995A CN 200810102995 A CN200810102995 A CN 200810102995A CN 101547053 A CN101547053 A CN 101547053A
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clock signal
clock
state value
veneer
standby
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CN200810102995A
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杨辉
张楠
黄平
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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Abstract

The invention discloses a clock-switching method and a clock-generating device. The clock-switching method is applied to the clock-generating device. The clock-generating device comprises a main single board, a spare single board and a slave single board. The clock-switching method comprises the following steps: whether the state value of a clock signal output by the main single board departs from a preset state value or not is detected, the spare signal board generates and outputs a spare clock signal, and the slave single board is switched to quote the spare clock signal if the state value of the main clock signal departs from the preset state value. As for the embodiment, the clock can be switched quickly if the main clock signal goes wrong, therefore, a service line can be effectively maintained to normally work and the normal proceed of communication service can be ensured.

Description

Clock-switching method and clock-generating device
Technical field
The present invention relates to the communication technology, especially a kind of clock-switching method and clock-generating device.
Background technology
Along with computer technology and development of Communication Technique, by in computer system, increasing a subsidiary communications bus, computer technology can be combined with telecommunication technique, realize computer long distance communication.In the existing big capacity computer telecommunication equipment, all designed communication bus usually.Existing communication bus is independent of the I/O of computer usually, and (Input/Output hereinafter to be referred as I/O) bus and memory bus setting, is used to transmit and exchange the low time delay communication traffic of N*64K, realizes communicating by letter between veneer and the computer.
In existing various communication buss, the most frequently used a kind of communication bus be the computer telephony bus (Computer Telephony Bus, hereinafter to be referred as: the CT bus).The CT bus is a kind of independent bus line that is applicable to whole industrial circle of ECTF tissue definition, it can guarantee the co-ordination between each assembly in the computer long distance communication equipment, for equipment manufacturers, system integrator and common carrier provide great flexibility, reduced the computer long distance communication equipment cost simultaneously.
Peripheral component interconnect bus industrial computer manufacturing tissue (Peripheral ComponentInterconnect Industrial Computer Manufacturers Group, hereinafter to be referred as: PCIMG) adopted the CT bus standard in peripheral component interconnect bus (CompactPCI) standard of compactness of issue in 1994, and at this standard formulation the PICMG2.5 standard.According to the PICMG2.5 standard, the CT bus adopts time division multiplexing (Time Division Multiplex and Multiplexer, hereinafter to be referred as: TDM) mode, each module in the CompactPCI system can transmit data in the arbitrary time slot in 4096 TDM time slots.
The PICMG2.X normalized definition a kind of new integrated circuit board and CompactPCI system configuration, it has following characteristic: adopt the mechanical dimension of European card, electrical characteristic is identical with pci bus/CT bus with Data Transport Protocol; Support hot plug, can online replacing veneer; Extensibility is better, can be according to the quantity of the needs configuration veneer of using; Support the active and standby board switchover of using, improved the reliability of system; Can adopt the mass-produced chip of field of personal computers, reduce cost.
The CompactPCI system is front and back plate structures, and wherein, front card is used to the disposal ability that provides general, and back card/back board is generally used for providing the TDM function of exchange of external interface and CT bus, for example: E1/T1 Interface and corresponding TDM exchange.As shown in Figure 1, for prior art according to the PICMG2.X normalized definition, the distribution schematic diagram of CompactPCI system dorsulum bus.Referring to Fig. 1, the CT bus is a bus type topological structure, among Fig. 1 H.110Bus, the J4 connector position that it is positioned at the CompactPCI backboard, the veneer that is connected on the CT bus can utilize bus to carry out time gas exchange.
According to CT bus specification PICMG2.X, bus signal line can be divided into clock and synchronous signal line, data signal line, reach reservation (Reserved) holding wire.In order to guarantee data reliable transmission in the CT bus, normalized definition two groups of clock signal C T_C8_A and CT_C8_B that speed is 8M, and two groups of frame synchronizing signal CT_FRAME_A and CT_FRAME_B that speed is 8K, be used for clock active/standby and switch, one group of clock wherein is standby as another group clock.According to drive, the difference of reference clock, each plate can be defined as respectively: main veneer (Primary Master, hereinafter to be referred as: PM), standby board (SecondaryMaster, hereinafter to be referred as: SM) with the subordinate veneer (Slave, hereinafter to be referred as: SL).Wherein, the input reference clock that main veneer, standby board are respectively applied for according to the outside produces A, B group clock group, wherein, the clock group that main veneer produces is the active clock group, the clock group that standby board produces is the standby clock group, the subordinate veneer does not produce the CT bus clock, only quotes A group or B group clock.Polylith subordinate veneer can be arranged on the CT bus.As shown in Figure 2, be a structural representation of this CT bus clock.Wherein, CLK_A represents A group clock signal, and FRAME_A represents A framing synchronizing signal; CLK_B represents B group clock signal, and FRAME_B represents B framing synchronizing signal; CT_D[0:3] represent in this CT bus that each group clock always has 4 circuits; REFCLK represents input reference clock signal.
In order to improve the reliability of CompactPCI system, the employing of CT bus is active and standby to provide the method for clock to guarantee the backup of clock on the bus respectively with veneer.In the prior art one, main veneer is judged clock status by detecting input reference clock signal, when main veneer when input reference clock signal is lost or is irregular, think that the clock group that produces breaks down, so close the output of A group clock; Standby board and subordinate veneer detect less than after the A group clock signal, think to report A group clock failure information to board software by A group clock failure; Board software control standby board is upgraded to main veneer immediately, and the subordinate veneer carries out corresponding clock and switch, and switches to and quote B group clock.
In prior art one, because main veneer is judged clock status by detecting input reference clock signal, and the detection of input reference clock signal needs the time of about 125us, standby board and subordinate veneer carry out clock and switch when detecting A road loss of clock, and this needs the time of about 600us, therefore in switching during this period of time to clock from the detection input reference clock signal, to there be sampling clock in the CT bus, tdm data between veneer can be lost, this just causes link unusual, make the voice link chain rupture that is based upon in the CT bus, call drop occurs, a series of traffic failures such as can't call out, influence the service feature of CompactPCI system.
The link that causes in the clock handoff procedure in the prior art one is unusual, in the prior art two, when main veneer detects the input reference clock fault, elder generation's reporting system board software, is main veneer by system single board software by management channels upgrading standby board, being about to the CT bus clock of standby board and subordinate veneer earlier switches to the standby clock that standby board drives, and then close the CT bus clock that main veneer drives, avoid clock signal to lose to a certain extent, realized taking over seamlessly the purpose of clock.
In realizing process of the present invention, the inventor finds to exist at least in the above-mentioned prior art two following problem:
In the prior art two, system single board software is based on the startup that reports of main veneer, this just requires main veneer self energy operate as normal, if the management channels of main veneer is cisco unity malfunction, then can't the reporting system board software, thereby can't realize that clock switches, therefore can cause service link thoroughly to interrupt, thereby normally the carrying out of interrupt communication business.
Summary of the invention
Embodiment of the invention technical problem to be solved is: no matter be that the active clock of CT bus breaks down or main veneer breaks down, all can carry out the quick switching of clock immediately, guarantee normally carrying out of communication service.
According to one embodiment of present invention, a kind of clock-switching method that provides is used for clock-generating device, and described clock-generating device comprises main veneer, standby board, reaches the subordinate veneer, and described clock-switching method comprises:
Whether the state value that detects the master clock signal of main veneer output departs from the preset state value;
When the state value of described master clock signal departed from the preset state value, described standby board produced and the output standby clock signal, and described subordinate veneer switches to quotes described standby clock signal.
Among the clock-switching method embodiment of the present invention, whether the state value that can detect the master clock signal of main veneer output departs from the preset state value, and judge in view of the above whether master clock signal is normal, when the master clock signal fault, carry out clock by standby board switches in advance, the subordinate veneer switches the standby clock signal of quoting standby board output, no matter can main veneer self operate as normal, can realize that clock switches, thereby can effectively keep the operate as normal of service link, guarantee normally carrying out of communication service.
According to another embodiment of the invention, a kind of clock-generating device that provides comprises main veneer, standby board and subordinate veneer, and described clock-generating device also comprises switching device shifter;
Described main veneer is used to export master clock signal;
Described switching device shifter is used to detect the state value of described master clock signal, and whether the state value of more described master clock signal depart from the preset state value, and the output comparative result;
Described standby board is used for according to described comparative result, when the state value of described master clock signal departs from described preset state value, produces also output standby clock signal;
Described subordinate veneer is used for according to described comparative result, when the state value of described master clock signal departs from described preset state value, switches to and quotes described standby clock signal.
In the clock-generating device that the embodiment of the invention provides, switching device shifter can be more main the state value of master clock signal of veneer output whether depart from the preset state value and export comparative result, standby board according to comparative result when the state value of master clock signal departs from the preset state value, think master clock signal fault or be about to fault, in time produce and the output standby clock signal, the subordinate veneer is according to comparative result, in time switch to the standby clock signal of quoting standby board output, thereby realize the quick switching of clock, no matter can main veneer self operate as normal, can effectively keep the operate as normal of service link, guarantee normally carrying out of communication service.
Below by drawings and Examples, technical scheme of the present invention is described in further detail.
Description of drawings
Fig. 1 is the distribution schematic diagram of prior art CompactPCI system dorsulum bus.
Fig. 2 is a structural representation of prior art CT bus clock.
Fig. 3 is the flow chart of clock-switching method embodiment one of the present invention.
Fig. 4 is the flow chart of clock-switching method embodiment two of the present invention.
Fig. 5 is the structural representation of clock-generating device embodiment one of the present invention.
Fig. 6 is the structural representation of clock-generating device embodiment two of the present invention.
Fig. 7 is the structural representation of clock-generating device embodiment three of the present invention.
Fig. 8 is the structural representation of clock-generating device Application Example of the present invention.
Embodiment
In the embodiment of the invention, main veneer and standby board produce master clock signal and standby clock signal respectively according to the input reference clock signal of different external reference clock generating.When setting in advance outside input reference clock and main veneer just often, the state value of the master clock signal of being exported by main veneer in the CT bus is the preset state value, in communication process, whether the state value that standby board and subordinate veneer detect the master clock signal of main veneer output departs from the preset state value; When the state value of this master clock signal departed from the preset state value, standby board produced and the output standby clock signal, and the subordinate veneer switches the standby clock signal of quoting standby board output.When standby board produced and export standby clock signal, standby board was upgraded to main veneer.
As shown in Figure 3, be the flow chart of clock-switching method embodiment one of the present invention, it may further comprise the steps:
Step 101 when main veneer detects the input reference clock fault, believes that with the master clock of output the state value that loses changes to non-preset state value.At the input reference clock of main veneer just often, the state value of the master clock signal of its output is a preset state value.The state of master clock signal specifically can represent with its level, and at the input reference clock of main veneer just often, the master clock signal of main veneer output maintains a fixed level.
What easily full of beard reached is that when main veneer itself broke down, the master clock signal of its output also can depart from the preset state value.
Step 102 detects the state value of the master clock signal of main veneer output.
Wherein, the master clock signal of the main veneer output of described detection can be undertaken by a switching device shifter, and described switching device shifter can independently be arranged at standby board and subordinate veneer outside, also can be arranged on standby board and the subordinate veneer.
Step 103 judges whether the state value of the master clock signal of main veneer output departs from the preset state value, if depart from execution in step 104; Otherwise, return execution in step 102.
Step 104, standby board produce and the output standby clock signal, and the subordinate veneer switches the standby clock signal of quoting standby board output.
In the embodiment of the invention, detect the state value of the master clock signal of main veneer output by switching device shifter and also judge in view of the above whether main veneer is normal, when master clock signal departs from preset value, carry out clock by standby board switches in advance, the subordinate veneer switches the standby clock signal quotes standby board output, no matter can main veneer self operate as normal, can realize that clock switches, thereby can effectively keep the operate as normal of service link, guarantee normally carrying out of communication service.
Show that as Fig. 4 be clock-switching method embodiment two flow charts of the present invention, it may further comprise the steps:
Step 201, externally reference clock sends to main veneer simultaneously and is used to identify the whether input reference clock status indicator of operate as normal of this input reference clock when main veneer sends input reference clock signal.
Particularly, at backboard is that bus-type connects in the CT bus of holding wire, 2 holding wires have been defined in the stick signal line, be respectively the D row of J4 and 22 pins of E row, can transmit this input reference clock status indicator to the main veneer that receives input reference clock signal by one in these two holding wires, transmit this another input reference clock status indicator by another root to the standby board that receives another input reference clock signal, to indicate the input reference clock operating state of main veneer, standby board, that is: its operate as normal whether.Utilize existing stick signal to transmit the input reference clock status indicator, need not to carry out hardware modification and upgrading, it is convenient to realize, and cost is lower.
Step 202, main veneer is judged whether fault of input reference clock according to the input reference clock status indicator that receives, and is that then execution in step 204; Otherwise, execution in step 203.
Step 203, main veneer produces master clock signal and output according to input reference clock signal, simultaneously, keeps the fixed level of the level of master clock signal in this master clock signal operate as normal of the sign that sets in advance, redirect execution in step then 205.
Step 204, main veneer produces master clock signal and output according to input reference clock signal, and in the Preset Time section, keep the phase place and the frequency of this master clock signal, simultaneously, the level of master clock signal is adjusted into the fault value that departs from described fixed level, this fault value can be on-fixed level arbitrarily, is used to identify the input reference clock fault.Preset Time section wherein can be determined according to the empirical value of finishing the switching of master clock signal and standby clock in the CT bus, in this Preset Time section, should be able to finish the switching of master clock signal and standby clock, for example: millisecond (ms) level, thereby avoid because the precision problem of main veneer internal clocking holding device, cause phase place and frequency drift that the clock handoff procedure occurs, reduce the error rate that causes thus.
Because main veneer can keep the phase place and the frequency of master clock signal in the Preset Time section that input reference clock breaks down, thereby guarantee to finish the switching of master clock signal and standby clock, realize taking over seamlessly of master clock signal and standby clock, improve externally availability and the reliability during the reference clock fault of veneer, further effectively kept the operate as normal of TDM link.
In addition, in this step 204, also can by the clock holding device outside the main veneer in described Preset Time section, keep the phase place and the frequency of master clock signal.
Step 205, standby board and subordinate veneer receive the master clock signal of main veneer output, and simultaneously, switching device shifter detects the level of this master clock signal in real time.
Step 206, switching device shifter judge whether the level of master clock signal is fixed level, if not fixed level, execution in step 207; If fixed level otherwise, return execution in step 205.
Step 207, switching device shifter notice standby board produces and the output standby clock signal, and switching device shifter notice subordinate veneer switches to the standby clock signal of quoting standby board output by the master clock signal of quoting main veneer output.When standby board produced standby clock signal, standby board was upgraded to main veneer.
After step 208, subordinate veneer switched to the standby clock signal of quoting standby board output by the master clock signal of quoting main veneer output, notice upper strata veneer management devices has finished master clock signal and standby clock signal switches.
When step 209, main veneer finish in the Preset Time section of phase place that keeps master clock signal and frequency, close and produce master clock signal and advice note board management device.
Step 210, the veneer management devices is reduced to standby board with main veneer.
Further, according to step 206, when switching device shifter is the fault value of on-fixed level at the level of master clock signal, know that this master clock signal breaks down maybe will break down, if because clock switches, two groups of clock signals are arranged in current C T bus, and then in step 207, the subordinate veneer can judge whether the clock when prior fault is the clock signal of main usefulness on the CT bus, if, then switch to and quote another group clock signal, otherwise, handover operation do not carried out.Particularly, the subordinate veneer can be by judging whether the clock when prior fault is the clock signal of main usefulness on the CT bus with the veneer management devices alternately or according to the clock switching record of oneself.
The clock-generating device that the embodiment of the invention provides comprises main veneer, standby board and more than one subordinate veneer, also comprises switching device shifter.As shown in Figure 5, be the structural representation of clock-generating device embodiment one of the present invention, comprise two subordinate veneers among this embodiment.
Wherein, main veneer is used in working order just often, with preset state value output master clock signal; Switching device shifter is used to detect the state value of the master clock signal of main veneer output, and relatively whether the state value of master clock signal departs from the preset state value, and exports comparative result to standby board and each subordinate veneer; Standby board is used for according to this comparative result, when the state value of master clock signal departs from the preset state value, thinks master clock signal fault or be about to fault to produce also output standby clock signal; The subordinate veneer is used for according to this comparative result, when the state value of master clock signal departs from the preset state value, thinks to switch to master clock signal fault or be about to fault and quote standby clock signal.
Please together with reference to Fig. 6, main veneer can also comprise the first clock driver element, first detecting unit and first control unit.Wherein, the first clock driver element is used for according to input reference clock signal, produces master clock signal with the preset state value; First detecting unit is used to detect whether fault of input reference clock; First control unit is used for the testing result according to detecting unit, when the input reference clock fault, control the first clock driver element and in preset period of time, produce master clock signal with non-preset state value, and when preset period of time finishes, control the first clock driver element and stop to produce master clock signal.As shown in Figure 6, be the structural representation of clock-generating device embodiment two of the present invention.
The standby board of the clock-generating device of present embodiment can comprise second clock driver element, second detecting unit and second control unit, wherein, the second clock driver element is used for according to input reference clock signal, produces standby clock signal with the preset state value; Second detecting unit is used to detect whether fault of input reference clock; Second control unit is used for the testing result according to detecting unit, when the input reference clock fault, control second clock driver element produces standby clock signal with non-preset state value in preset period of time, and when preset period of time finished, control second clock driver element stopped to produce standby clock signal.
In addition, in each clock-generating device of the above embodiment of the present invention, switching device shifter can comprise detection module and comparison module.Wherein, detection module is used to detect the state value of the master clock signal of reception; Whether the state value that comparison module is used for the comparison master clock signal departs from the preset state value, and the output of second control unit in standby board comparative result; Second control unit is also according to comparative result, and when the state value of master clock signal departed from the preset state value, control second clock driver element produced and the output standby clock signal.
In the switching device shifter of the foregoing description, detection module and comparison module can be a plurality of, are separately positioned in main veneer, standby board and each the subordinate veneer.As shown in Figure 7, be the structural representation of clock-generating device embodiment three of the present invention.
In addition,, can also comprise the clock holding device in the clock-generating device of the embodiment of the invention, be used for testing result, when the input reference clock fault, in preset period of time, keep the phase place and the frequency of master clock signal according to detecting unit again referring to Fig. 7.What easily full of beard reached is that main veneer and standby board also can keep the phase place and the frequency of clock signal by same clock holding device.
As shown in Figure 8, be the structural representation of clock-generating device one Application Example of the present invention.It comprises main veneer, standby board and two subordinate veneers, by programmable logic device (programmablelogic device, hereinafter to be referred as: PLD) realize.Wherein, CLK_A represents A group clock signal, that is: the master clock signal that main veneer produces; FRAME_A represents A framing synchronizing signal; CLK_B represents B group clock signal, that is: standby clock signal, and FRAME_B represents B framing synchronizing signal; CT_D[0:3] represent in this CT bus that each group clock always has 4 circuits; CLK_STSA represents the master clock signal state value; CLK_STSB represents the standby clock signal state value.
In the embodiment of the invention, whether the state value that is detected the master clock signal of main veneer output by the detection module of the switching device shifter on standby board and the subordinate veneer departs from the preset state value and judges in view of the above whether master clock signal is normal, when the master clock signal fault, carry out clock by standby board in advance and switch, the subordinate veneer switches the standby clock signal of quoting standby board output.Because what detect is the clock signal of main veneer output, no matter therefore can main veneer self operate as normal, can realize detecting timely and clock switches, thereby can effectively keep the operate as normal of service link, guarantee normally carrying out of communication service;
It should be noted last that: above embodiment is only in order to illustrating technical scheme of the present invention, but not the present invention is made restrictive sense.Although the present invention is had been described in detail with reference to above-mentioned preferred embodiment, those of ordinary skill in the art is to be understood that: it still can make amendment or be equal to replacement technical scheme of the present invention, and this modification or be equal to the spirit and scope that replacement does not break away from technical solution of the present invention.

Claims (11)

1, a kind of clock-switching method is used for clock-generating device, and described clock-generating device comprises main veneer, standby board, reaches the subordinate veneer, it is characterized in that described clock-switching method comprises:
Whether the state value that detects the master clock signal of main veneer output departs from the preset state value;
When the state value of described master clock signal departed from the preset state value, described standby board produced and the output standby clock signal, and described subordinate veneer switches to quotes described standby clock signal.
2, clock-switching method according to claim 1 is characterized in that, also comprises:
Described main veneer detects input reference clock signal;
When described input reference clock signal fault, described main veneer changes to non-preset state value with the state value of master clock signal.
3, clock-switching method according to claim 2 is characterized in that, also comprises:
When the input reference clock fault, in preset period of time, keep the phase place and the frequency of described master clock signal.
4, clock-switching method according to claim 3 is characterized in that, also comprises:
When described main veneer finishes in described preset period of time, stop to export master clock signal.
5, clock-switching method according to claim 1 is characterized in that, also comprises:
Described main veneer is reduced to standby board.
6, a kind of clock-generating device comprises main veneer, standby board and subordinate veneer, it is characterized in that described clock-generating device also comprises switching device shifter;
Described main veneer is used to export master clock signal;
Described switching device shifter is used to detect the state value of described master clock signal, and whether the state value of more described master clock signal depart from the preset state value, and the output comparative result;
Described standby board is used for according to described comparative result, when the state value of described master clock signal departs from described preset state value, produces also output standby clock signal;
Described subordinate veneer is used for according to described comparative result, when the state value of described master clock signal departs from described preset state value, switches to and quotes described standby clock signal.
7, clock-generating device according to claim 6 is characterized in that, described main veneer comprises:
The first clock driver element is used for according to input reference clock signal, produces master clock signal;
First detecting unit is used to detect whether fault of input reference clock;
First control unit, be used for testing result according to described detecting unit, when described input reference clock fault, control the described first clock driver element and in preset period of time, produce master clock signal with non-preset state value, and when described preset period of time finishes, control the described first clock driver element and stop to produce master clock signal.
8, clock-generating device according to claim 7 is characterized in that, described standby board comprises:
The second clock driver element is used for according to input reference clock signal, produces standby clock signal;
Second detecting unit is used to detect whether fault of input reference clock;
Second control unit, be used for testing result according to described detecting unit, when described input reference clock fault, control described second clock driver element and in preset period of time, produce standby clock signal with non-preset state value, and when described preset period of time finishes, control described second clock driver element and stop to produce standby clock signal.
9, clock-generating device according to claim 8 is characterized in that, described switching device shifter comprises:
Detection module is used to detect the state value of the master clock signal of reception;
Comparison module, whether the state value that is used for more described master clock signal departs from the preset state value, and the output of second control unit in described standby board comparative result;
Second control unit, is controlled described second clock driver element and is produced and export standby clock signal when the state value of described master clock signal departs from the preset state value also according to described comparative result.
10, clock-generating device according to claim 9 is characterized in that, described detection module and described comparison module are a plurality of, is separately positioned in described main veneer, standby board and each the subordinate veneer.
11, according to any described clock-generating device of claim 7 to 10, it is characterized in that, also comprise:
The clock holding device is used for the testing result according to described first detecting unit, when described input reference clock fault, keeps the phase place and the frequency of described master clock signal in preset period of time.
CN200810102995A 2008-03-28 2008-03-28 Clock-switching method and clock-generating device Pending CN101547053A (en)

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US9973601B2 (en) 2013-03-15 2018-05-15 Avago Technologies General Ip (Singapore) Pte. Ltd. Fault tolerant clock network
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