CN101452849B

CN101452849B - Production method for high voltage transistor

Info

Publication number: CN101452849B
Application number: CN2007100943814A
Authority: CN
Inventors: 钱文生; 胡君
Original assignee: Shanghai Hua Hong NEC Electronics Co Ltd
Current assignee: Shanghai Huahong Grace Semiconductor Manufacturing Corp
Priority date: 2007-12-06
Filing date: 2007-12-06
Publication date: 2012-06-20
Anticipated expiration: 2027-12-06
Also published as: CN101452849A

Abstract

The invention discloses a method for manufacturing a high-pressure transistor. After lightly-doped source-drain ion injection is selectively extended in the position of a well region on a silicon substrate, one path of ion injection close to the surface is added to one side of a transistor channel close to the source end, thereby effectively reducing the channel length of the surface of the transistor and further increasing the saturated current of the transistor; moreover, the method does not influence the junction breakdown voltage, leakage current and other properties of the source end of the transistor and thus does not cause the safety problems of source-drain punching of the transistor and the like.

Description

Production method for high voltage transistor

Technical field

The present invention relates to transistor and make the field, relate in particular to a kind of production method for high voltage transistor that can improve transistor saturation current.

Background technology

In one embodiment, as shown in Figure 1, in the prior art, high voltage transistor generally can be made through following method:

The first step is carried out ion and is injected on silicon substrate, form well region, then silicon chip is carried out well region annealing; Wherein, for nmos pass transistor, the ion that is injected can be boron ion etc.; And for the PMOS transistor, the ion that is injected can be phosphonium ion etc.; At this moment section is shown in Fig. 2 a.

In second step, the position of well region is carried out selectivity and is extended the injection of lightly-doped source leakage ion on said silicon substrate, thereby forms transistorized source and drain areas, then silicon chip is carried out the extension source and leaks annealing; In this step, for nmos pass transistor, the ion that is injected can be phosphonium ion or arsenic ion etc.; And for the PMOS transistor, the ion that is injected can be boron ion or boron difluoride etc.; At this moment section is shown in Fig. 2 b.

The 3rd step is at grown on top one deck gate oxide of silicon substrate.

In the 4th step, deposit one deck polysilicon gate again on said gate oxide uses known photoetching technique then, and said polysilicon gate is carried out etching, forms grid, and cross-section structure at this moment is shown in Fig. 2 c.

In the 5th step, form transistorized oxide side wall in said grid both sides.

In the 6th step, carry out the high concentration source and leak the ion injection, thereby finally form the high voltage transistor shown in Fig. 2 d.

In this manufacture process, if want to increase transistorized saturation current, generally can realize: 1, subtract light raceway groove implantation concentration, reduce the transistor cut-in voltage through following method; 2, increase extension light dope drain terminal implantation concentration; 3, reduce channel length.But said method all exists following shortcoming, cause easily that promptly source transistor leaks break-through, so the increasable scope of saturation current is less, and dangerous.

Summary of the invention

The technical problem that the present invention will solve provides a kind of production method for high voltage transistor, can increase transistorized saturation current, can not have influence on transistorized other characteristics simultaneously.

For solving the problems of the technologies described above; The invention provides a kind of production method for high voltage transistor; Comprise: after the injection of selectivity extension lightly-doped source leakage ion is carried out in the position of silicon substrate well region; Increase together transistor channel is carried out the operation that ion injects near a side in source region, and then silicon chip is carried out the leakage annealing of extension source.

The present invention is owing to adopted technique scheme; Has such beneficial effect; Promptly, near source end one side, increase by one ion injection near the surface at transistor channel through carry out the injection of selectivity extension lightly-doped source leakage ion in the position of well region on the said silicon substrate after; Thereby effectively reduced the channel length on transistor surface, and then increased transistorized saturation current; And the method for the invention can not influence characteristics such as junction breakdown voltage and the leakage current of source transistor end yet, can not cause that therefore source transistor leaks safety problems such as break-through.

Description of drawings

Below in conjunction with accompanying drawing and embodiment the present invention is done further detailed explanation:

Fig. 1 is for making the flow chart of an embodiment of high voltage transistor in the existing technology;

Fig. 2 a-2d makes the sectional structure chart in the high voltage transistor process according to the said method of Fig. 1;

Fig. 3 is the flow chart according to an embodiment of production method for high voltage transistor according to the invention;

Fig. 4 a-4c makes the sectional structure chart in the high voltage transistor process according to the said method of Fig. 3;

The distribution map of depletion region when Fig. 5 a punctures for the high voltage transistor in the existing technology;

Fig. 5 b is the distribution map to depletion region when reducing saturation current through the reducing high voltage transistor that channel dimensions makes merely and puncture of routine;

Fig. 5 c is the distribution map of depletion region when high voltage transistor constructed in accordance is punctured.

Embodiment

The present invention is through changing the transistor doped structure; In transistor channel one side, increase together ion near the surface near the source end and inject the increase that realizes saturation current, the process of therefore injecting through ion; Based on (Vgs-Vth) ^2 of following formula Ids=0.5* μ * Cox* (W/L); It is equivalent to reduce the transistor length of effective channel, therefore can on the basis that does not influence other performances of transistor, increase transistor saturation current effectively.

In one embodiment, as shown in Figure 3, the manufacture process of high voltage transistor according to the invention is following:

The 3rd step shown in Fig. 4 a, increased by a light shield at raceway groove near the side in drain region, then transistor channel was carried out low-energy ion near a side in source region and injected.In this step, for nmos pass transistor, the ion that is injected can be phosphonium ion or arsenic ion etc.; And for the PMOS transistor, the ion that is injected can be boron ion or boron difluoride etc.; At this moment section is shown in Fig. 4 b.According to formula I _Ds=0.5* μ * C _Ox* (W/L) (V _Gs-V _Th) ^2 (wherein, I _DsRepresent transistorized saturation current, μ represents mobility, C _OxRepresent oxide layer electric capacity, W represents transistor active area width, and L represents channel length, V _GsBe grid voltage, V _ThBe the transistor threshold voltage) can know that the ion injection through step is equivalent to reduce transistorized length of effective channel, therefore on the basis that does not influence other performances of transistor, has effectively increased transistor saturation current.

In the 4th step, silicon chip is carried out the extension source leak annealing.

The 5th step is at grown on top one deck gate oxide of silicon substrate.

In the 6th step, deposit one deck polysilicon gate again on said gate oxide uses known photoetching technique then, and said polysilicon gate is carried out etching, forms grid.

In the 7th step, form transistorized oxide side wall in said grid both sides.

In the 8th step, carry out the high concentration source and leak the ion injection, thereby finally form the high voltage transistor shown in Fig. 4 c.

Certainly; One of ordinary skill in the art should be understood that said transistorized manufacturing approach of the present invention is not limited in the foregoing description, carries out after selectivity extends lightly-doped source and leak ion and inject based on above-mentioned position at well region on the said silicon substrate; At transistor channel near source end one side; Increase the principle near the ion injection on surface one, persons skilled in the art should know how to combine other conventional manufacturing high voltage transistor steps, therefore do not describe in detail at this.

As Fig. 5 a-5c be respectively to according to the nmos pass transistor of existing technology manufacturing, when reducing nmos pass transistor that channel dimensions makes and nmos pass transistor constructed in accordance merely and carry out resulting these the three kinds of device breakdown of TCAD emulation the depletion region distribution schematic diagram; Associative list 1 can be found out; Not only increased the saturation current of device to a certain extent through the transistor of manufacturing of the present invention, and not as through reducing to have influence on puncture voltage the transistor that channel dimensions makes merely.

Table 1

	Fig. 5 a	Fig. 5 b	Fig. 5 c
				Cut-in voltage Vt (V)	0.7668	0.6746	0.6773
Saturation current Ion (uA/um)	491	737	713
				Puncture voltage (BVDS)	25.9	18.9	24.3

Claims

1. production method for high voltage transistor; It is characterized in that; Comprise: after the injection of selectivity extension lightly-doped source leakage ion is carried out in the position of silicon substrate well region; Increase together transistor channel is carried out the operation that ion injects near the well region surface of source region one side, and then silicon chip is carried out the leakage annealing of extension source; Said transistor channel is carried out the operation that ion injects near the well region surface of source region one side: for nmos pass transistor, the ion that is injected is phosphonium ion or arsenic ion; And for the PMOS transistor, the ion that is injected is boron ion or boron difluoride.