CN101414970B - Method for distributing IOC module and IO exchanger - Google Patents

Method for distributing IOC module and IO exchanger Download PDF

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CN101414970B
CN101414970B CN2008101774856A CN200810177485A CN101414970B CN 101414970 B CN101414970 B CN 101414970B CN 2008101774856 A CN2008101774856 A CN 2008101774856A CN 200810177485 A CN200810177485 A CN 200810177485A CN 101414970 B CN101414970 B CN 101414970B
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main frame
ioc
module
ioc module
interchanger
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CN101414970A (en
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王晋涛
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ZTE Corp
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ZTE Corp
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Abstract

The invention discloses an IOC module distribution method and an IO exchanger; wherein, the method comprises that each host machine out of the host machines of a plurality of memory controllers is related to each IOC module in a plurality of memory controllers; the related results are memorized in the IO exchanger; the IO exchanger reflects the access of the host machines on the IOC module to the corresponding IOC module according to the related results. The method can improve the utilization ratio of the system IO resource.

Description

IOC module assignment method and IO interchanger
Technical field
The present invention relates to the communications field, in particular to a kind of IOC module assignment method and IO interchanger.
Background technology
Fig. 1 is the hardware architecture schematic diagram of double storage controllers in the correlation technique.As shown in Figure 1, two storage controls have disposed IOC (the Input Output Controller of own special use respectively separately, abbreviate IOC as) module, the main frame of storage control is connected to corresponding IOC module by Peripheral Component Interconnect standard (Peripheral Component Interconnect abbreviates PCI as) Express bus.The IOC module has input and output (Input Output abbreviates IO as) address and the memory address space of self as a peripheral hardware of main frame, and main frame carries out IOC modules configured and transfer of data by the mode of IO, internal storage access.Because the structure of two storage control veneers is in full accord, so the program of moving on the main frame is also identical, the IO address and the memory address space of IOC module are also in full accord.
As shown in Figure 1, the IOC resource of two storage controls can't realize resource-sharing, two main frames are connected with the exchange chip of a plurality of IOC modules by PCI Express, because the IO address of IOC and memory address space are on all four for each main frame, so the addressing system of host A visit IOC_1 and host B visit IOC_3 is in full accord, will inevitably cause host A visit IOC_1 and host B visit IOC_3 to produce address conflict, this just PCI Express exchange chip can't support the reason of two/a plurality of main process equipments.
Therefore, the IOC module between the different storage controls can't be shared, and a main frame can not be visited the IOC module of other storage controls, in case a controller lost efficacy the also corresponding inefficacy of the IOC of this controller so.At present, can't sharing problem at the IOC module between the different storage controls, effective solution is not proposed as yet.
Summary of the invention
The present invention aims to provide a kind of IOC module assignment method and IO interchanger, can't realize the problem shared to solve IOC module between the different storage controls.
According to an aspect of the present invention, provide a kind of IOC module assignment method.
IOC module assignment method according to the present invention comprises: with each main frame in the main frame of a plurality of storage controls respectively with a plurality of storage controls in each IOC module carry out relatedly, and the result of association is kept in the IO interchanger; The IO interchanger will arrive corresponding IOC module from the access map to the IOC module of main frame according to the result of association.
Preferably, exist under the situation of identical reference address in the reference address of main frame to the visit of IOC module, the IO interchanger specifically comprises the processing to corresponding IOC module of the access map of main frame according to the result of association: the IO interchanger converts identical reference address to different reference address according to the result of association; The IO interchanger according to different reference address with the access map of main frame to corresponding IOC module.
Preferably, visit comprise following one of at least: IO visit, memory address visit.
Preferably, the IO interchanger comprises the registers group corresponding with host number, and registers group is preserved related result.
Preferably, under the situation of the IOC module free time that is associated with main frame, the IOC module of main frame releasing idling.
Preferably, under the situation that main frame breaks down, main frame discharges the IOC module that is associated with it.
According to a further aspect in the invention, also provide a kind of IO interchanger.
IO interchanger according to the present invention comprises: registers group, be used for preserving a plurality of storage controls main frame each main frame respectively with a plurality of storage controls in the result of each IOC module relation; Mapping block is used for will arriving corresponding IOC module from the access map to the IOC module of main frame according to the result of association.
Preferably, mapping block specifically comprises: the address spaces device is used for the identical reference address of the reference address of the visit of IOC module being converted main frame to different reference address according to the result of association; Mapping submodule is used for according to different reference address the access map of main frame to corresponding IOC module.
Preferably, visit comprise following one of at least: IO visit, memory address visit.
By means of technique scheme of the present invention, by carrying out related with the IOC module main frame, can guarantee main frame and IOC module corresponding relation, the address conflict of having avoided main frame when visit IOC module, to take place, realized that a main frame can visit the IOC module of other storage controls, improved the utilization rate of system IO resource.
Description of drawings
Accompanying drawing described herein is used to provide further understanding of the present invention, constitutes the application's a part, and illustrative examples of the present invention and explanation thereof are used to explain the present invention, do not constitute improper qualification of the present invention.In the accompanying drawings:
Fig. 1 is the framework map according to the storage dual controller of prior art;
Fig. 2 is the flow chart according to the IOC module assignment method of the embodiment of the invention;
Fig. 3 is the flow chart according to the preferred process scheme of the IOC module assignment method of the embodiment of the invention;
Fig. 4 is the block diagram according to the IO interchanger of the embodiment of the invention;
Fig. 5 is the block diagram according to the storage system of many storage controls of the use IO interchanger of the embodiment of the invention.
Embodiment
Functional overview
Main thought of the present invention is: in a storage system of using many storage controls, for the IOC module of the dynamic distribution system of main frame of each storage control.When certain controller main frame breaks down, can be transferred to the IOC module that this main frame uses other normal main frames and use.
Below in conjunction with accompanying drawing the preferred embodiments of the present invention are described, should be appreciated that preferred embodiment described herein only is used for description and interpretation the present invention, and be not used in qualification the present invention.
Method embodiment
According to the embodiment of the invention, provide a kind of IOC module assignment method.
The present invention is applied to exist the storage system of many storage controls, and wherein, each storage control mainly comprises: main frame, IO interchanger and IOC module etc.The quantity of storage control in the system and IOC module is not limit, and can adopt traditional storage hardware chip.The IO interchanger is used to realize the IO of a plurality of storage control main frames, the conversion of memory address space, the function that provides the IOC module to switch to different main frames.
Fig. 2 is the flow chart according to the IOC module assignment method of the embodiment of the invention, need to prove, the step of describing in following method can be carried out in the computer system such as a set of computer-executable instructions, and, though figure 2 illustrates logical order, but in some cases, can carry out step shown or that describe with the order that is different from herein.As shown in Figure 2, this method comprises following processing:
Step S202, with each main frame in the main frame of a plurality of storage controls respectively with a plurality of storage controls in each IOC module carry out relatedly, and the result of association is kept in the IO interchanger;
Step S204, the IO interchanger will arrive corresponding IOC module from the access map to the IOC module of main frame according to the result of association.
Describe above-mentioned each details of handling below in detail.
On the IO interchanger, many group registers group are arranged at each IOC modular design, make a plurality of controller main frames can carry out different initialization for same IOC module, all main frame initialization all are written in the registers group of IO interchanger, and the IO interchanger is responsible for IOC is carried out initialization then.The IO Switching Module carries out the related of IOC module and main frame according to certain rule.Back IO Switching Module can switch to the IOC module of this host computer control on other normal main frames rapidly in case certain main frame breaks down, and finish relevant initial work, because do not need main frame to participate in initialization once more, so the speed of switching can be very fast, and can evade dynamic load IOC module and may damage the host software environment, because host software may not support dynamically to upgrade the IO peripheral hardware.When the IOC module free time of certain main frame, this main frame can discharge the IOC module so in addition, and other main frame can use this idle IOC module, and process is similar to the switching that hostdown causes.
The IO interchanger has address translator at each host interface design, by address translator identical IO, memory address visit from different host interface are converted to the reference address that differs from one another, again different address spaces is mapped on the different IOC modules, avoid main frame location, spot conflict under the identical software of operation of a plurality of storage controls, thereby can realize a plurality of host accesss IOC module arbitrarily.
Fig. 3 is that this flow process is described with reference to figure 5 according to the flow chart of the preferred process scheme of the IOC module assignment method of the inventive method embodiment.
Step S302-S316 is the initial configuration process.
Step S302: the host number of IO interchanger detection of stored controller and the IOC quantity of system after the system start-up, set up inner connection main frame and the bus of IOC.
Step S304:IO interchanger is opened the IOC access bus of host A, host B and host C correspondence successively, guarantees that each initial configuration has only main frame to participate in, and access conflict can not take place.In real time monitoring host computer is for the configuration of each IOC, and is recorded in the register simulator group of IO interchanger inside.
Step S306: judge whether that all main frames have all finished initialization:, otherwise enter step S304 if finish then the step S308 that gets the hang of.
Step S308: each main frame is according to the demand application IOC of self.
Step S310:IO interchanger has been finished being connected of inner main frame and IOC interconnection, and the controller host A has used IOC_1, and the controller host B has used IOC_2, IOC_3, IOC_4, and the controller host C has used IOC_5, IOC_6.
Step S312:IO interchanger marks off 3 windows according to the space of the internal memory and the IO of each IOC needs.Window_1, Window_2, Window_3 be respective hosts A, B, C respectively.Space size, the Window_2 that Window_1 equals IOC_1 equals IOC_2,3,4 space size, Window_3 and equals IOC_5,6 space size (above-mentioned steps S302-S312 is corresponding to the step S102 among Fig. 2).
Step S314: finish the host address translation function.Be transformed into respectively in the different window of Window_1, Window_2, Window_3 for the same address visit in the software memory of host A, B, C or IO space, realize the separation of reference address.
Step S316: system can normally move (above-mentioned steps S314-S316 is corresponding to the step S104 among Fig. 2) according to software separately.
Step S318-S324 is the process of abnormality processing:
Step S318: if the host A fault, the address translator of IO interchanger Shutdown Hosts A discharges the IOC_1 that host A uses.
Step S320: judged whether that host B or C application uses IOC_1: if execution in step S322 then, otherwise execution in step S316.
Step S322: for example: host B application IOC_1, host B was updated in the register of IOC_1 for the deploy content of IOC_1 when the IO interchanger was system start-up so.
Step S324: adjust the window space size of the address translator of host B, guarantees new internal memory, IO visit can be correct be transformed on the IOC_1.
Pass through the foregoing description, can avoid the address conflict that main frame produces and cause to visit the problem of IOC module when the different IOC module of visit, thereby realized that a main frame can visit the IOC module of other storage controls, improved the utilization rate of system IO resource.
Device embodiment
According to the embodiment of the invention, also provide a kind of IO interchanger.This IO interchanger can be used to the IOC module assignment method that realizes that said method embodiment is provided.
Fig. 4 is the block diagram according to the IO interchanger of the embodiment of the invention, and as shown in Figure 4, this IO interchanger comprises:
Registers group 10, be used for preserving a plurality of storage controls main frame each main frame respectively with a plurality of storage controls in the result of each IOC module relation;
Mapping block 20 is connected to registers group 10, is used for will arriving corresponding IOC module from the access map to the IOC module of main frame according to the result of association, and wherein, above-mentioned visit comprises IO visit, memory address visit.
According to the present invention, mapping block can also comprise: address spaces device (not shown) is used for the identical reference address of the reference address of the visit of IOC module being converted main frame to different reference address according to the result of association; The mapping submodule (not shown) is used for according to different reference address the access map of main frame to corresponding IOC module.
Fig. 5 is the block diagram according to the storage system of many storage controls of the use IO interchanger of the embodiment of the invention.The quantity of storage control, main frame, address translator, IOC register simulator group is used for the exemplary explanation among Fig. 5, also can be other quantity in specific implementation process.
As shown in Figure 5, the controller host A has used IOC_1, and the controller host B has used IOC_2, IOC_3, IOC_4, and the controller host C has used IOC_5, IOC_6.
At each IOC modular design many group registers group (register simulator group) are arranged, be used to preserve the incidence relation of IOC and main frame.The IO Switching Module can switch to the IOC module of this host computer control on other normal main frames rapidly after certain main frame breaks down; For example: the controller host A controller host B that breaks down so can be taken over IOC_1.In addition, when the IOC of certain main frame module free time, this main frame can discharge the IOC module so, and other main frame can use this idle IOC module.
The IO interchanger has address translator at each host interface design, by address translator identical IO, memory address visit from different host interface are converted to the reference address that differs from one another, again different address spaces is mapped on the different IOC modules, avoid main frame location, spot conflict under the identical software of operation of a plurality of storage controls, thereby can realize a plurality of host accesss IOC module arbitrarily.
In specific implementation process, the processing shown in Fig. 2 and Fig. 3 can be finished equally according to the IO interchanger that the embodiment of the invention provides, thereby the utilization rate of the IO of system resource can be improved, concrete processing procedure no longer is repeated in this description herein.
In sum, by technique scheme of the present invention, by carrying out related with the IOC module main frame, can guarantee main frame and IOC module corresponding relation, the address conflict of having avoided main frame when visit IOC module, to take place, realized that a main frame can visit the IOC module of other storage controls, improved utilization rate and the reliability of system operation of system IO resource.
Obviously, those skilled in the art should be understood that, above-mentioned each module of the present invention or each step can realize with the general calculation device, they can concentrate on the single calculation element, perhaps be distributed on the network that a plurality of calculation element forms, alternatively, they can be realized with the executable program code of calculation element, thereby, they can be stored in the storage device and carry out by calculation element, perhaps they are made into each integrated circuit modules respectively, perhaps a plurality of modules in them or step are made into the single integrated circuit module and realize.Like this, the present invention is not restricted to any specific hardware and software combination.
The above is the preferred embodiments of the present invention only, is not limited to the present invention, and for a person skilled in the art, the present invention can have various changes and variation.Within the spirit and principles in the present invention all, any modification of being done, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.

Claims (9)

1. an input and output control is IOC module assignment method, it is characterized in that, comprising:
Each main frame in the main frame of a plurality of storage controls and all the IOC modules in described a plurality of storage controls are carried out related, and the result of described association is kept at input and output is in the IO interchanger;
Described IO interchanger will arrive corresponding described IOC module from the access map to described IOC module of described main frame according to the result of described association.
2. method according to claim 1, it is characterized in that, exist under the situation of identical reference address in the reference address of described main frame to the visit of described IOC module, described IO interchanger specifically comprises the processing to corresponding described IOC module of the access map of described main frame according to the result of described association:
Described IO interchanger converts described identical reference address to different reference address according to the result of described association, comprise: described IO interchanger is according to the internal memory of each IOC module needs and the space of IO, for each main frame marks off corresponding window, the size of the window of each main frame equals the IO space sum of the IOC module of this main frame, when there is identical reference address in different main frames, same reference address is transformed into respectively in the different windows corresponding with main frame;
Described IO interchanger according to described different reference address with the access map of described main frame to corresponding described IOC module.
3. method according to claim 1 is characterized in that, described visit comprise following one of at least: IO visit, memory address visit.
4. method according to claim 1 is characterized in that, described IO interchanger comprises the registers group that equates with described host number, and described registers group is preserved the result of described association.
5. according to each described method in the claim 1 to 4, it is characterized in that, under the situation of the described IOC module free time that is associated with described main frame, the described IOC module of described main frame releasing idling.
6. according to each described method in the claim 1 to 4, it is characterized in that under the situation that described main frame breaks down, described main frame discharges the described IOC module that is associated with it.
7. an IO interchanger is characterized in that, comprising:
Registers group is used for preserving each main frame of main frame of a plurality of storage controls and the result of all the IOC module relations in described a plurality of storage control;
Mapping block is used for will arriving corresponding described IOC module from the access map to described IOC module of described main frame according to the result of described association.
8. IO interchanger according to claim 7 is characterized in that, described mapping block specifically comprises:
The address spaces device, be used for the identical reference address of the reference address of the visit of described IOC module being converted described main frame to different reference address according to the result of described association, comprise: according to the internal memory of each IOC module needs and the space of IO, for each main frame marks off corresponding window, the size of the window of each main frame equals the IO space sum of the IOC module of this main frame, when there is identical reference address in different main frames, same reference address is transformed into respectively in the different windows corresponding with main frame;
Mapping submodule is used for according to described different reference address the access map of described main frame to corresponding described IOC module.
9. according to claim 7 or 8 described IO interchangers, it is characterized in that, described visit comprise following one of at least: IO visit, memory address visit.
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CN110990318B (en) * 2019-11-11 2021-05-07 福州瑞芯微电子股份有限公司 PCIe bus address expansion method, device, equipment and medium

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1382277A (en) * 1999-08-30 2002-11-27 英特尔公司 Input/output (I/O) address translation in bridge proximate to local (I/O) bus
CN1627265A (en) * 2003-12-10 2005-06-15 国际商业机器公司 Method, system, and product for utilizing a power subsystem to diagnose and recover from errors
CN1790284A (en) * 2004-12-16 2006-06-21 日本电气株式会社 Fault tolerant computer system

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1382277A (en) * 1999-08-30 2002-11-27 英特尔公司 Input/output (I/O) address translation in bridge proximate to local (I/O) bus
CN1627265A (en) * 2003-12-10 2005-06-15 国际商业机器公司 Method, system, and product for utilizing a power subsystem to diagnose and recover from errors
CN1790284A (en) * 2004-12-16 2006-06-21 日本电气株式会社 Fault tolerant computer system

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