CN101388817B

CN101388817B - Hundred megabyte Ethernet extra information transmission method and transmission implementing system

Info

Publication number: CN101388817B
Application number: CN2008102019967A
Authority: CN
Inventors: 张俊杰; 韩盛杰; 陈健; 宋英雄; 洪亮
Original assignee: University of Shanghai for Science and Technology
Current assignee: University of Shanghai for Science and Technology
Priority date: 2008-10-30
Filing date: 2008-10-30
Publication date: 2011-03-30
Anticipated expiration: 2028-10-30
Also published as: CN101388817A

Abstract

The invention relates to method for transmitting additional information in a 100 m Ethernet and a system of the method. The transmission method mainly utilizes fixed frame gaps between 100 m Ethernet data frames to transmit the additional data, such as time synchronization information and control information. The communication system based on the idea mainly comprises a mobile terminal, an Ethernet protocol physical layer module and an MII interrupt processing module, and the Ethernet protocol physical layer module switches information of terminals hierarchically, which is convenient for the MII interrupt processing module to insert data and to extract and analyze the data. The method utilizes the fixed frame gaps between the 100 m Ethernet data frames to transmit the additional data, which no longer occupies the in-band bandwidth of the Ethernet package, and the method is a novel data transmission method which has on interference to the normal Ethernet packet transmission and greatlyimproves the utilization of the bandwidth.

Description

A kind of 100 m ethernet extraneous information transmission method and transmission realization system thereof

Technical field

This invention relates to a kind of excessive data transmission system that is applied in 100 m ethernet.A kind of method and system that can be applicable to transmitting additional information in the 100 m ethernet have been proposed.

Background technology

Since the ethernet technology invention, transmission medium is from the thick copper lines to optical fiber, and to several hundred kilometers, its speed also develops into present 10Gbit/s from 10Mbit/s to distance by hundreds of rice, and ethernet technology has obtained widespread usage at local area network (LAN) in metropolitan area network and the wide area network.Although the speed of Ethernet constantly rapidly promotes, but does not catch up with the geometric growth requirement of people for the network bandwidth.Therefore improving the network bandwidth resources utilance can make network be people's service better.

Initial Ethernet is end-to-end link, each user has disposed an actual physical and has connected, this network link allocation plan is extremely low to utilization rate of network resource, in case certain user is in the free time, then link just is in the waste state, after this allocation plan of network changes shared one or several physical link for a plurality of users, occurred being the algorithm of different user dynamic bandwidth allocation subsequently again, improvement technology that these are a series of and software deployment algorithm have improved the resource utilization of peer network widely.But in the face of the network bandwidth requirements of the continuous upgrading of user and growing P2P traffic carrying capacity, the network resource anxiety that but seems day by day, the maximum methods that solve this contradiction now are exactly ceaselessly to be to improve network upgrade transmission rate and build more network link.

The Fast Ethernet and the Gigabit Ethernet technology of extensive use now adopt full duplex point-to-point working method on physical layer, with the half-duplex broadcast mode of traditional ethernet very big change has been arranged, but the data link layer aspect changes little, still continued to use initial ethernet mac agreement, frame period (the IPG that has kept original Ethernet between the ether grouping, Inter-PacketGap), because the transmission rate of physical layer is more and more higher, the bandwidth of this part frame period has been subjected to more attention, makes full use of the extra data of this part bandwidth for transmission and has caused everybody attention.So far, also really do not utilize the technology of this bandwidth to occur.

Summary of the invention

The simple speed-raising by network that the objective of the invention is to break the normal procedure solved the situation of Internet resources anxiety, be provided at the method and system of transmitting additional information in the 100 m ethernet, it is a kind of practicable technical method that improves bandwidth availability ratio for the ad eundem network, and technical costs is lower relatively, be mainly used in some extraneous informations of transmission, as time synchronizing signal, control signal etc.

For achieving the above object, design of the present invention is: in the 100 m ethernet between the Frame minimum interval be 12 bytes, in any two data interframe one section intrinsic gap is arranged all, short and small information that can some are extra, be inserted in these gaps as clock synchronization information or control signal and transmit, improve bandwidth availability ratio.Communication system based on above-mentioned message transmission thought comprises information terminal, ether agreement physical layer block, and MII inserts processing module.

Ether agreement physical layer block is inserted processing module with information terminal with MII and is connected, ether agreement physical layer block connects the ether agreement physical layer block of communication the opposing party system simultaneously, ether agreement physical layer block and MII insert processing module and link to each other with communication terminal, and either party system configuration of communicating by letter is essentially identical;

According to the foregoing invention design, the present invention adopts following technical proposals:

A kind of in 100 m ethernet the method for transmitting additional information, it is characterized in that utilizing intrinsic gap between the front and back Frame of 100 m ethernet to insert data and transmit extraneous information.

Above-mentioned extraneous information is clock synchronization information or control signal.

A kind of in 100 m ethernet the system of transmitting additional information, be used to realize said method, comprise that first communication terminal (1) connects the first ether agreement physical layer block (2), the first ether agreement physical layer block (2) connects the second ether agreement physical layer block (10) of the opposing party system by Ethernet, the second ether agreement physical layer block (10) connects second communication terminal (18), it is characterized in that the described first ether agreement physical layer block (2) and the second ether agreement physical layer block (10) are connected one the one MII respectively and insert processing module (3) and one the 2nd MII insertion processing module (11); The described first ether agreement physical layer block (2) and the second ether agreement physical layer block (10) are carried out the information of information terminal (1) and communication terminal (18) the level conversion respectively, carry out the insertion of data and extract parsing so that insert processing module (11) by MII insertion processing module (3) and the 2nd MII respectively; It is identical with the 2nd MII insertion processing module (11) structure that the one MII inserts processing module (3), but system's two-way operation.

In the system of transmitting additional information, the described first and second ether agreement physical layer block realize by the KS8995 chip in above-mentioned 100 m ethernet; Described first and second MII insert processing module and realize by EP1C3T144C8 type field programmable gate array.

The present invention has following conspicuous outstanding substantive distinguishing features and remarkable advantage:

1. can utilize the frame period transmission data of 100 m ethernet, improve bandwidth availability ratio;

2. can not cause interference, not influence synchronously yet the data of normal transmission; 3 implementation costs are cheaper, and the technical sophistication degree is also lower.

Description of drawings

Fig. 1 is a system global structure block diagram of the present invention.

Fig. 2 is an example connection layout of the present invention.

Fig. 3 is used to realize that MII inserts the EP1C3T144C8 type on-site programmable gate array internal module connection diagram of processing module

Embodiment

The present invention is a kind of, and details are as follows based on the communication system embodiment that utilizes 100 m ethernet frame period transmission excessive data:

This method of transmitting additional information in 100 m ethernet is to utilize intrinsic gap between the front and back Frame of 100 m ethernet to insert data to transmit extraneous information.

The extraneous information that transmits is clock synchronization information or control signal.

Referring to Fig. 1, be used to realize said method, the system of this transmitting additional information in 100 m ethernet, comprise that first communication terminal (1) connects the first ether agreement physical layer block (2), the first ether agreement physical layer block (2) connects the second ether agreement physical layer block (10) of the opposing party system by Ethernet, the second ether agreement physical layer block (10) connects second communication terminal (18), it is characterized in that the described first ether agreement physical layer block (2) and the second ether agreement physical layer block (10) are connected one the one MII respectively and insert processing module (3) and one the 2nd MII insertion processing module (11); The described first ether agreement physical layer block (2) and the second ether agreement physical layer block (10) are carried out the information of information terminal (1) and communication terminal (18) the level conversion respectively, carry out the insertion of data and extract parsing so that insert processing module (11) by MII insertion processing module (3) and the 2nd MII respectively; It is identical with the 2nd MII insertion processing module (11) structure that the one MII inserts processing module (3), but system's two-way operation.

Referring to Fig. 2, select for use the KS8995 chip to realize the effect of the first and second ether agreement physical layer block (2,10), select for use EP1C3T144C8 type field programmable gate array to realize that first and second MII insert the effect of processing module (3,11).

The KS8995 chip is connected with EP1C3T144C8 type field programmable gate array with communication terminal (1), and the KS8995 chip is connected with the KS8995 chip of another communication system by the RJ45 network interface simultaneously, and the system of communication parties constitutes identical.

If communication terminal (1,18) be in the transmission information state, then KS8995 chip received communication terminal (1,18) data to be sent, then it is passed to EP1C3T144C8 type field programmable gate array, again ginseng is had the generated data of excessive data to pass to the KS8995 chip and be sent to communication the opposing party after EP1C3T144C8 type field programmable gate array is handled data to be sent.

If communication terminal (1,18) be in the reception information state, then the KS8995 chip will send Data Receiving to be received from far end system by the RJ45 network interface, sending EP1C3T144C8 type field programmable gate array then to handles, EP1C3T144C8 type field programmable gate array has the signal of excessive data to filter parsing to ginseng and sends original routine data signal to the KS8995 chip, pass to communication terminal (1,18) by the KS8995 chip.

Fig. 3 is used to realize that MII inserts the EP1C3T144C8 type on-site programmable gate array internal module connection diagram of processing module.EP1C3T144C8 type field programmable gate array is for data to be sent and wait to receive data and designed a data receiver module and data transmission blocks separately, does not conflict mutually.Data to be sent are used data reception module (4,15) import EP1C3T144C8 type field programmable gate array into, the inner data insert module (5 of EP1C3T144C8 type field programmable gate array, 16) signal flow is analyzed and sought the extra data of the intrinsic frame gap insertion of ether and form new generated data stream, this data flow is exported from EP1C3T144C8 type field programmable gate array by data transmission blocks (6,17) as new data to be sent; Wait to receive data and use data reception module (7,14) import EP1C3T144C8 type field programmable gate array into, the inner data filter module (8 of EP1C3T144C8 type field programmable gate array, 13) extraneous information that will insert in intrinsic frame period is extracted and is resolved, and being sent into data transmission blocks (9,12), exports normal Ethernet data from EP1C3T144C8 type field programmable gate array.

Here by the reference specific embodiment the present invention is described in detail, but this only is an applicating example, should knows that those of ordinary skill in the art can make various modifications and variations under situation about not departing from the scope and spirit of the present invention.

Claims

1. the system of a transmitting additional information in 100 m ethernet, comprise that first communication terminal (1) connects the first ether agreement physical layer block (2), the first ether agreement physical layer block (2) connects the second ether agreement physical layer block (10) of the opposing party system by Ethernet, the second ether agreement physical layer block (10) connects second communication terminal (18), it is characterized in that the described first ether agreement physical layer block (2) and the second ether agreement physical layer block (10) are connected one the one MII respectively and insert processing module (3) and one the 2nd MII insertion processing module (11); The described first ether agreement physical layer block (2) and the second ether agreement physical layer block (10) are carried out the information of first communication terminal (1) and second communication terminal (18) the level conversion respectively, carry out the insertion of data and extract parsing so that insert processing module (11) by MII insertion processing module (3) and the 2nd MII respectively; It is identical with the 2nd MII insertion processing module (11) structure that the one MII inserts processing module (3), but system's two-way operation; The described first ether agreement physical layer block (2) and the second ether agreement physical layer block (10) all select for use the KS8995 chip to realize its effect; A described MII inserts processing module (3) and the 2nd MII insertion processing module (11) all selects for use EP1C3T144C8 type field programmable gate array to realize its effect.