CN101262240A - An easy-to-realize method and device for full digital frequency conversion - Google Patents
An easy-to-realize method and device for full digital frequency conversion Download PDFInfo
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- CN101262240A CN101262240A CNA2008100605009A CN200810060500A CN101262240A CN 101262240 A CN101262240 A CN 101262240A CN A2008100605009 A CNA2008100605009 A CN A2008100605009A CN 200810060500 A CN200810060500 A CN 200810060500A CN 101262240 A CN101262240 A CN 101262240A
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Abstract
The invention discloses an all digital frequency converting method and a device thereof, being easily realized for hardware. The method and the device are essentially used for sample rate convertion of rational number-times of baseband signals and the convertion of the baseband signals and the intermediate frequency signals in digital communication. Under the coordination of control signals and enabling signals, the convertion of signal sample rate can be finished and the convertion of the baseband signals and the intermediate signals can be finished through the reasonable matching of variable integral number-times wave filtering and fraction-times interpolation. The system of the invention essentially comprises a frequency mixer, a cascade connection integral comb filter, a fraction-time interpolating device, a half-band filter, a signal shaping filter, a power detection module and a control interface. The configurable hardware implemented structure of the invention is applicable to a plurality of modulation methods, has the advantages of low resource consumption and good portability, and is used for various wireless communication systems such as multilevel phase shift keying (MPSK), orthogonal frequency division multiplex (OFDM), direct sequence spread spectrum (DSSS) and continuous phase modulation (CPM), etc.
Description
Technical field
The present invention relates to wireless communication field, relate in particular to the frequency translation of signal.
Background technology
Frequency translation is a requisite part in the communication system, has significant application value at mobile communication, digital broadcasting, TV domain.
Along with mobile communication and Personal Communication Technology develop rapidly, various communication systems have obtained using widely, and are among the continuous update.And the communication system that the different communication service the is adopted communication equipment of various criterion in other words, the multiband that needs, many speed, multi-mode, scalable and have an intelligent communication system of open structure.Software and radio technique has very strong flexibility and open new, can guarantee versatility, compatibility and the upgradability of communication equipment, adapts to the development trend of communication.The basic conception of software radio is on general hardware platform, realizes the function of plurality of communication systems by the mode of software loading.The key idea of software radio is with A/D and the as close as possible radio frequency part of D/A, reduce radio circuit to handle and realize the processing such as last down-conversion, demodulation of wireless signal with the high-speed digital signal treatment technology, and finish radio function as much as possible with software.
Low-converter is numerical portion and a simulation interface partly in the digital communication system on the numeral, and configurable upward low-converter is the key technology of software radio system.It is higher that numeral goes up the down-conversion operating frequency simultaneously, and the digital processing operand is big, also is the difficult point that software radio is realized, needs rational algorithm is realized on high-speed dsp or configurable hardware platform by the hardware configuration of optimizing.
Chinese patent CN200710027581.8 discloses a kind of digital down converter, this digital down converter comprises A/D conversion and AGC control module, open interface A module, special number local oscillator module, the Frequency mixing processing module, multiple variable extraction filtration module, gain adjustment module, the direct current local oscillator suppresses module, the time delay adjusting module, the carrier power statistical module, open interface B module, the output of described A/D conversion and AGC control module is successively by open interface A module, the Frequency mixing processing module, multiple variable extraction filtration module, gain adjustment module, the time delay adjusting module, the direct current local oscillator suppresses module and is connected with the input of open interface B module, the output of described special number local oscillator module is connected with the input of Frequency mixing processing module, and the output that described direct current local oscillator suppresses module is connected with the input of carrier power statistical module.
There is the following deficiency in this down conversion system:
1. this down conversion system can only be realized the integral multiple sampling rate conversion, can not realize the conversion of rational sampling rate.Do not provide general rational sampling rate mapped structure, the versatility deficiency can not need the down conversion system of reasonable several times sampling rate conversion.
2. this down conversion system does not provide the general implementation of multiple variable extraction filtration module, meets difficulty when satisfying multiple sampling rate conversion.
3. this down conversion system does not provide general configuration interface, can't on a hardware platform, finish the conversion of multiple sample rate fully by the mode of register configuration, need to recompilate and download, be not suitable for realizing universal frequency conversion platform by application-specific integrated circuit (ASIC).
4. this down conversion system does not provide the phase place and the frequency compensation interface of digital controlled oscillator, can not finish carrier Control flexibly.Can not realize the frequency sweep interface, can't realize frequency deviation control by the frequency sweep mode.
Summary of the invention
The purpose of this invention is to provide a kind of method and device thereof that is easy to hard-wired full digital frequency conversion.The conversion of baseband signal and intermediate-freuqncy signal provides the conversion of flexible configurable rational sampling rate in this method and the device realization communication system thereof.
A kind of method of full digital frequency conversion comprises that digital signal sends the up-sampling frequency conversion and digital signal receives the down-sampling conversion method.
It is as follows that digital signal sends up-sampling conversion method concrete steps:
(1) Shu Ru I, Q two-way baseband signal rise sample baseband signal through rising sampling square root raised cosine shaping filter generation shaping integral multiple respectively;
(2) the shaping integral multiple rises sample baseband signal and finishes 2 by semi-band filtering behind the first zero insertion repeatedly
nIntegral multiple rises unscented transformation, finishes the conversion of fraction time sampling rate by multinomial branch several times interpolation, produces to rise the sample rate baseband signal;
(3) rise the sample rate baseband signal and finish integral multiple by multistage integration comb filtering and rise sampling rate conversion, produce high power sample rate baseband signal;
(4) utilize the local quadrature single-tone carrier wave that produces phase place and frequency controlled 2 road phase differences, 90 degree to multiply each other and finish the signal uppermixing, produce and export intermediate-freuqncy signal with high power sample rate baseband signal.
It is as follows that digital signal receives down-sampling conversion method concrete steps:
Described digital signal receives the down-sampling conversion method and comprises the steps:
(1) the input intermediate-freuqncy signal produces the AGC control signal by power detection, is used for external radio frequency and adjusts input signal amplitude;
(2) the quadrature single-tone carrier multiplication of input intermediate-freuqncy signal and local phase place and frequency controlled 2 road phase differences, 90 degree is descended mixing generation I, Q two paths of signals;
(3) I, Q two paths of signals produce I, Q two-way high power sample rate baseband signal by low-pass filtering filtering high order harmonic component;
(4) I, Q two-way high power sample rate baseband signal are finished the down-sampled rate conversion of integral multiple through multistage integration comb filtering, produce the down-sampled rate baseband signal of integral multiple;
(5) the down-sampled rate baseband signal of integral multiple finishes 2 by extracting behind the first semi-band filtering repeatedly
nThe down-sampled conversion of integral multiple is finished the conversion of fraction time sampling rate by the multinomial score interpolation, produces low power sample rate baseband signal;
(6) low power sample rate baseband signal produces the output baseband signal through the square root raised cosine matched filtering.
Single-tone in the method for described full digital frequency conversion is realized by the high speed cordic algorithm of traditional ROM lookup table mode or vector rotation.The interpolating function that adopts comprises four three rank Lagrange's interpolations, 2 linear interpolation, 4 piecewise fitting differences.The method of following mixing comprises in conjunction with analog to digital converter by owing sample mode, if centre frequency is f
c, bandwidth is B, with sample rate f
s=4f
c/ (2m-1) to radio frequency/intermediate-freuqncy signal digitlization, wherein f
s〉=2B, m are positive integer.
The present invention realizes by following full digital frequency conversion device, comprises digital up converter, intermediate-frequency channel and digital down converter.Digital up converter is finished the reasonable several times of baseband signal and is risen the conversion to intermediate-freuqncy signal of unscented transformation and base band; Intermediate-frequency channel is finished the transmission that sends between upconverter and the reception lower side frequency intermediate-freuqncy signal.Digital down converter is finished conversion and the baseband signal reasonable several times down-sampled conversion of intermediate-freuqncy signal to baseband signal.Digital up converter and digital lower side frequency device constitute integral baseband signal and intermediate-freuqncy signal translated channel.
Digital up converter comprises first control module, forming filter, the first half-band filter group, first minute several times interpolater, the second half-band filter group, first integral comb filter, first frequency converter, first digital controlled oscillator and the first configuration interface module.Its inner annexation is: forming filter, the first half-band filter group, first minute several times interpolater, the second half-band filter group, first integral comb filter connect successively; First frequency converter is connected with first integral comb filter, first digital controlled oscillator; First control module is connected with first digital controlled oscillator with the frequency compensation interface by phase place; First control module is connected with forming filter, the first half-band filter group, first minute several times interpolater, the second half-band filter group, first integral comb filter by sample rate multiple control interface; The first configuration interface module is connected with first control module.Wherein forming filter is but that integral multiple promotes sample rate and the configurable FIR filter of coefficient; The first half-band filter group and the second half-band filter group realize 2 by what a plurality of half-band filter HBF formed
nDoubly rise the bank of filters of sampling rate conversion; Half-band filter in the numeral upper side frequency device adopts the mode of first zero insertion filtering to finish 2 times liter sampling.
Digital down converter comprises second control module, power detection module, second digital controlled oscillator, second frequency converter, low pass filter, second integral comb filter, the 3rd half-band filter group, second minute several times interpolater, the 4th half-band filter group, matched filter and the second configuration interface module; Its inner annexation is: low pass filter, second integral comb filter, the 3rd half-band filter group, second minute several times interpolater, the 4th half-band filter group, matched filter connect successively; Second frequency converter is connected with low pass filter, second digital controlled oscillator; Power detection module is connected with second frequency converter, AGC power control interface; Second control module is connected with second digital controlled oscillator with the frequency compensation interface by phase place; Second control module is connected with second integral comb filter, the 3rd half-band filter group, second minute several times interpolater, the 4th half-band filter group, matched filter by sample rate multiple control interface; The second configuration interface module is connected with second control module.Wherein the 3rd half-band filter group and the 4th half-band filter group realize 2 by what a plurality of half-band filter HBF formed
nThe bank of filters that extracts doubly; Half-band filter group in the numeral lower side frequency device adopts the mode that extracts behind the first semi-band filtering to finish 2 times down-sampled.
Forming filter and half-band filter HBF adopt the direct type implementation structure of FIR, utilize the characteristics of FIR filter coefficient symmetry, and directly the type structure as shown in Figure 4.Adopt direct type structure the convolution algorithm of filtering can be converted into the multiply accumulating computing of N iteration.For the FIR filter that N tap arranged, because the coefficient symmetry, multiplying can be multiplexing.N is an even number, needs multiplication N/2 time; N is an odd number, needs (N+1)/2 time multiplication.If clock can adopt complete time-multiplexed structure than the multiple of the sample frequency number of times greater than multiplying, utilize twice a plurality of clock in the counting period to finish the FIR convolution algorithm.Each FIR only needs an adder like this, an accumulator and a multiplier, and the multiplication unit that needs can significantly reduce, and saves great amount of hardware resources.When realizing HBF, it is zero that N has (N-3)/2 coefficient during for odd number, can further reduce multiplexing number like this.
Half-band filter group HBF in the first half-band filter group, the second half-band filter group, the 3rd half-band filter group and the 4th half-band filter group adopts coefficient doubling recited above and flowing water time division multiplexing multiply accumulating structure.Fig. 5 has provided the FIR of 11 taps hardware optimization implementation structure.Form by shift register, selector, counter, adder, multiplier, accumulator.Inner annexation is: shift register, selector, adder, multiplier, accumulator join successively, and counter is connected with selector.The input data enter shift register successively, calculate (x (0)+x (10)) * h (0), (x (1)+x (9)) * h (1), (x (2)+x (8)) * h (2), (x (3)+x (7)) * h (3), (x (4)+x (6)) * h (4), x (5) * h (5) at the 1st, 2,3,4,5 clock respectively, finish to add up at accumulator and finish filtering operation.
First fen several times interpolater and second fen several times interpolater adopt the method for interpolation calculation to realize the conversion of fraction time sampling rate.Thinking is waveform to be regarded as the analytic curve of certain form in the part, by known sampled point numerical value curve is fitted, and obtains the analytical expression of curve, then with ask a little coordinate substitution, obtain the numerical value of this point.The interpolating function that polynomial interopolation adopts comprises four three rank Lagrange's interpolations, 2 linear interpolation, 4 piecewise fitting differences.
Adopt the Farrow structure of Fig. 6 to realize polynomial interpolation.This structure needn't be calculated tap coefficient in real time, by current time inclined to one side μ
kT
s, just can obtain the interpolation result through a spot of multiplying, be that a kind of ten minutes is realized the polynomial interpolation functional based method efficiently.KT wherein
i=(m
s+ μ
s) T
s, m
sBe integer part, μ
sIt is fractional part.
If interpolating function is:
Then the interpolation formula of Farrow structure is
Wherein
b
l(i) be fixed coefficient, with the time inclined to one side μ
kIrrelevant, only by interpolating function h
I(t) decision.Constitute interpolation Control Parameter matrix:
First digital controlled oscillator and second digital controlled oscillator adopt the high speed CORDIC structure of traditional ROM lookup table mode or vector rotation to realize.As shown in Figure 7, digital controlled oscillator is joined and is formed by phase accumulator, phase register, phase calculation circuit, quadrant selector.Inner annexation is: phase accumulator, phase register, phase calculation circuit, quadrant selector join successively, and phase register is connected with the quadrant selector.For the ROM lookup table mode, it is that address lookup table is finished with the phase place that the phase calculation circuit adopts two ROM that store sinusoidal and cosine respectively; For CORDIC, the phase calculation circuit adopts the limited number of time iterative algorithm of CORDIC to finish.
First digital controlled oscillator and second digital controlled oscillator have frequency and phase compensation interface, can adopt the mode of frequency sweep to finish frequency offset correction.
Configurability is realized by control module and outside configuration interface, parameter below in system, needing to dispose, the change sampling multiple of cic filter, the number of HBF in the HBF group, the branch several times interpolation multiple of fractional interpolator, change sampling multiple, the coefficient of low pass filter, the frequency word of digital controlled oscillator and the phase place word of forming filter.
The beneficial effect that the present invention has comprises:
(1) the frequency translation system among the present invention has not only provided the lower side frequency system, but the solution of the conversion of the complete rational sampling rate conversion that has provided baseband signal in a kind of digital communication and baseband signal and intermediate-freuqncy signal.Be the different platform under the software radio framework, the interface between low power sample rate baseband signal and the high sampling intermediate-freuqncy signal is provided.
(2) frequency conversion system among the present invention, provided general any rational sampling rate mapped structure, good versatility is arranged, can be used in the modulating system of multi-system phase shift keying MPSK, OFDM Modulation OFDM, multiple modes such as direct spreading sequence modulation DSSS, Continuous Phase Modulation CPM.
(3) frequency conversion system among the present invention is optimized at different modules, has provided configurable hardware implementation structure, is suitable for realizing at high speed hardware such as FPGA.By configurable interface, can under the prerequisite that hardware solidifies, finish the frequency transform function of multi-mode, many speed.Can realize whole any rational frequency conversion system by ASIC like this, system power dissipation and volume are littler, and operating frequency is higher.
Description of drawings
Fig. 1 is the effect block diagram of the present invention in communication system;
Fig. 2 is the implementation framework figure of upconverter among the present invention;
Fig. 3 is the implementation framework figure of low-converter among the present invention;
Fig. 4 is the direct type structure chart of linear phase filter;
Fig. 5 is the realization circuit diagram of FIR filter hardware multiplex optimization structure among the present invention;
Fig. 6 is the realization circuit diagram of the Farrow structure that digital interpolator adopts among the present invention;
Fig. 7 is the implementation framework figure of digital controlled oscillator among the present invention;
Fig. 8 is the hardware platform block diagram of the embodiment of the invention.
Embodiment
Below several the present invention is described in further detail in conjunction with specific embodiments.Described embodiment through describing in detail makes those skilled in the art can implement the present invention, and should be understood that, can utilize other embodiment, and not deviate from the change of making under the situation of the present invention on logic, the circuit.Therefore, the following specifically describes connotation with restriction.
Embodiments of the invention are the frequency translation systems that use on multi-mode radio communications device, and it carries platform is programmable logic device FPGA or the application-specific integrated circuit ASIC that configuration interface is arranged.
Fig. 1 is the effect block diagram of the present invention in whole communication system, and the full digital frequency conversion system is made up of digital up converter, intermediate-frequency channel and digital down converter.Digital up converter is finished the reasonable several times of baseband signal and is risen the conversion to intermediate-freuqncy signal of unscented transformation and base band; Intermediate-frequency channel is finished the transmission that sends between upconverter and the reception lower side frequency intermediate-freuqncy signal.Digital down converter is finished conversion and the baseband signal reasonable several times down-sampled conversion of intermediate-freuqncy signal to baseband signal.Digital up converter and digital lower side frequency device constitute integral baseband signal and intermediate-freuqncy signal translated channel.
Fig. 2 is the implementation framework figure of upconverter, comprises first control module 201, forming filter 202, the first half-band filter group 203, first minute several times interpolater 204, the second half-band filter group 205, first integral comb filter 206, first frequency converter 207, first digital controlled oscillator 208 and the first configuration interface module 209; Its inner annexation is: forming filter 202, the first half-band filter group 203, first minute several times interpolater 204, the second half-band filter group 205, first integral comb filter 206 connect successively; First frequency converter 207 is connected with first integral comb filter 206, first digital controlled oscillator 208; First control module 201 is connected with first digital controlled oscillator 208 with the frequency compensation interface by phase place; First control module 201 is connected by sample rate multiple control interface and forming filter 202, the first half-band filter group 203, first minute several times interpolater 204, the second half-band filter group 205, first integral comb filter 206; The first configuration interface module 209 is connected with first control module 208.
Fig. 3 is the implementation framework figure of low-converter, comprises second control module 301, power detection module 302, second digital controlled oscillator 303, second frequency converter 304, low pass filter 305, second integral comb filter 306, the 3rd half-band filter group 307, second minute several times interpolater 308, the 4th half-band filter group 309, matched filter 310 and the second configuration interface module 311; Its inner annexation is: low pass filter 305, second integral comb filter 306, the 3rd half-band filter group 307, second minute several times interpolater 308, the 4th half-band filter group 309, matched filter 310 connect successively; Second frequency converter 304 is connected with low pass filter 305, second digital controlled oscillator 303; Power detection module 302 is connected with second frequency converter 304, AGC power control interface; Second control module 301 is connected with second digital controlled oscillator 303 with the frequency compensation interface by phase place; Second control module 301 is connected by sample rate multiple control interface and second integral comb filter 306, the 3rd half-band filter group 307, second minute several times interpolater 308, the 4th half-band filter group 309, matched filter 310; The second configuration interface module 311 is connected with second control module 301.
So owing to of the present inventionly adopted the block diagram in the general configuration structure practical embodiments identical, the following describes the parameter that disposes among the requirement of variable sampling rate system and the embodiment with block diagram in the summary of the invention.
Means of upconversion need realize that 40kHz, 25kHz, 12.8kHz distinguish 128 times, 204.8 times, 400 times sampling rate conversion to 5.12MHz.Wherein the first half-band filter group 203 and the second half-band filter group 205 are made up of 3 HBF respectively.Below table 1 provided the configuration of each module samples rate transformation parameter in the upconverter, parameter value be 1 the expression this module by bypass.
Table 1 means of upconversion configuration parameter
Down-conversion device need realize that 5.12MHz arrives (40 * 4) kHz, (25 * 4) kHz, (12.8 * 4) kHz arrives 32 times, 51.2 times, 100 times sampling rate conversion respectively.Wherein the 3rd half-band filter group 307 and the 4th half-band filter group 309 are made up of 3 HBF respectively.Below table 2 provided the configuration of each module samples rate transformation parameter in the low-converter, parameter value be 1 the expression this module by bypass.
Table 2 down-conversion device configuration parameter
Sample mode is owed in the employing of the following mixing of using in this example, gets sample rate f
s=4f
c/ (2m-1) signal digitalized to intermediate frequency, wherein centre frequency is f
c, bandwidth is B, m is for satisfying f
sThe maximum positive integer of 〉=2B.
Interpolater implementation structure in the present embodiment as shown in Figure 6.Employing is the sectional parabola type, and getting its parameter is a=0.5, and when interpolated point was between n-2 and n-1 sampled point, interpolation formula was:
First digital controlled oscillator 208 and second digital controlled oscillator 303 adopt traditional ROM lookup table mode to realize.As shown in Figure 7, digital controlled oscillator is joined and is formed by phase accumulator 701, phase register 702, phase calculation circuit 703, quadrant selector 704.Inner annexation is: phase accumulator 701, phase register 702, phase calculation circuit 703, quadrant selector 704 join successively, and phase register 702 is connected with quadrant selector 704.Wherein two ROM that store sinusoidal and cosine respectively of phase calculation circuit employing are that address lookup table is finished with the phase place.
Present embodiment is realized in the FPGA of the EP2C60F672C5ES of altera corp model, system sampling clock 25.6MHz.Fig. 8 has provided the hardware platform block diagram of the embodiment of the invention.Whole platform is by programmable gate array 801, ADI company model is the digital to analog converter 802 of AD9764, send analog filter 803, send analogue amplifier 804, transmission interface, receiving interface receives analog filter 805, receive analogue amplifier 806, ADI company model is that the analog to digital converter 807 of AD9245 is formed.Wherein digital to analog converter 802, send analog filter 803, send analogue amplifier 804, the transmission interface composition transmission path that joins successively; Receiving interface receives analog filter 805, receives analogue amplifier 806, and digital to analog converter 807 is formed the composition that joins successively and received path.
The foregoing description explanation the present invention can realize that any rational is sampled the rate conversion, finishes other rational multiple mapping functions if desired and can pass through the parameter configuration structural arrangements.In the process that reality is implemented, can carry out corresponding order exchange and cutting to the structure of invention as required.If only need the integral multiple sampling rate conversion, minute several times interpolater can be omitted to save resource.
True spirit of the present invention and scope are not limited to this embodiment, and any those of ordinary skill in the art can revise the concrete grammar of structure or module, realize the frequency translation system of different application occasion.The application contains any modification of the present invention and change, and the present invention is limited by claims and equivalence techniques scheme thereof.
Claims (10)
1. the method for a full digital frequency conversion is characterized in that, comprises that digital signal sends the up-sampling conversion method and digital signal receives the down-sampling conversion method,
Described digital signal sends the up-sampling conversion method and comprises the steps:
1) Shu Ru I, Q two-way baseband signal rise sample baseband signal through rising sampling square root raised cosine shaping filter generation shaping integral multiple respectively;
2) the shaping integral multiple rises sample baseband signal and finishes 2 by semi-band filtering behind the first zero insertion repeatedly
nIntegral multiple rises unscented transformation, finishes the conversion of fraction time sampling rate by multinomial branch several times interpolation, produces to rise the sample rate baseband signal;
3) rise the sample rate baseband signal and finish integral multiple by multistage integration comb filtering and rise sampling rate conversion, produce high power sample rate baseband signal;
4) utilize the local quadrature single-tone carrier wave that produces phase place and frequency controlled 2 road phase differences, 90 degree to multiply each other and finish the signal uppermixing, produce and export intermediate-freuqncy signal with high power sample rate baseband signal;
Described digital signal receives the down-sampling conversion method and comprises the steps:
1) the input intermediate-freuqncy signal produces the AGC control signal by power detection, is used for external radio frequency and adjusts input signal amplitude;
2) the quadrature single-tone carrier multiplication of input intermediate-freuqncy signal and local phase place and frequency controlled 2 road phase differences, 90 degree is descended mixing generation I, Q two paths of signals;
3) I, Q two paths of signals produce I, Q two-way high power sample rate baseband signal by low-pass filtering filtering high order harmonic component;
4) I, Q two-way high power sample rate baseband signal are finished the down-sampled rate conversion of integral multiple through multistage integration comb filtering, produce the down-sampled rate baseband signal of integral multiple;
5) the down-sampled rate baseband signal of integral multiple finishes 2 by extracting behind the first semi-band filtering repeatedly
nThe down-sampled conversion of integral multiple is finished the conversion of fraction time sampling rate by the multinomial score interpolation, produces low power sample rate baseband signal;
6) low power sample rate baseband signal produces the output baseband signal through the square root raised cosine matched filtering.
2. the method for a kind of full digital frequency conversion according to claim 1 is characterized in that the interpolating function that described multinomial score interpolation adopts comprises four three rank Lagrange's interpolations, 2 linear interpolation, 4 piecewise fitting differences.
3. the method for a kind of full digital frequency conversion according to claim 1 is characterized in that the described wherein said method of mixing down comprises in conjunction with analog to digital converter by owing sample mode, if centre frequency is f
c, bandwidth is B, with sample rate f
s=4f
c/ (2m-1) to radio frequency/intermediate-freuqncy signal digitlization, wherein f
s〉=2B, m are positive integer.
4. the full digital frequency conversion device by the described method design of claim 1 is characterized in that, comprises the digital up converter and the digital down converter that are connected by intermediate-frequency channel; Described digital up converter comprises first control module (201), forming filter (202), the first half-band filter group (203), first minute several times interpolater (204), the second half-band filter group (205), first integral comb filter (206), first frequency converter (207), first digital controlled oscillator (208) and the first configuration interface module (209); Its inner annexation is: forming filter (202), the first half-band filter group (203), first minute several times interpolater (204), the second half-band filter group (205), first integral comb filter (206) connect successively; First frequency converter (207) is connected with first integral comb filter (206), first digital controlled oscillator (208); First control module (201) is connected with first digital controlled oscillator (208) with the frequency compensation interface by phase place; First control module (201) is connected with forming filter (202), the first half-band filter group (203), first minute several times interpolater (204), the second half-band filter group (205), first integral comb filter (206) by sample rate multiple control interface; The first configuration interface module (209) is connected with first control module (208); Described digital down converter comprises second control module (301), power detection module (302), second digital controlled oscillator (303), second frequency converter (304), low pass filter (305), second integral comb filter (306), the 3rd half-band filter group (307), second minute several times interpolater (308), the 4th half-band filter group (309), matched filter (310) and the second configuration interface module (311); Its inner annexation is: low pass filter (305), second integral comb filter (306), the 3rd half-band filter group (307), second minute several times interpolater (308), the 4th half-band filter group (309), matched filter (310) connect successively; Second frequency converter (304) is connected with low pass filter (305), second digital controlled oscillator (303); Power detection module (302) is connected with second frequency converter (304), AGC power control interface; Second control module (301) is connected with second digital controlled oscillator (303) with the frequency compensation interface by phase place; Second control module (301) is connected with second integral comb filter (306), the 3rd half-band filter group (307), second minute several times interpolater (308), the 4th half-band filter group (309), matched filter (310) by sample rate multiple control interface; The second configuration interface module (311) is connected with second control module (301).
5. a kind of full digital frequency conversion device according to claim 4 is characterized in that the described first half-band filter group (203) and the second half-band filter group (205) realize 2 by what a plurality of half-band filter HBF formed
nDoubly rise the bank of filters of sampling rate conversion.
6. a kind of full digital frequency conversion device according to claim 4 is characterized in that described the 3rd half-band filter group (307) and the 4th half-band filter group (309) realize 2 by what a plurality of half-band filter HBF formed
nThe bank of filters that extracts doubly.
7. a kind of full digital frequency conversion device according to claim 4, it is characterized in that the half-band filter group HBF in the described first half-band filter group (203), the second half-band filter group (205), the 3rd half-band filter group (307) and the 4th half-band filter group (309) adopts coefficient doubling and flowing water time division multiplexing multiply accumulating structure, inner annexation is: shift register (501), selector (502), adder (504), multiplier (505), accumulator (506) join successively, and counter (503) is connected with selector (502).
8. a kind of full digital frequency conversion device according to claim 4, it is characterized in that described first minute several times interpolater (204) and second minute the several times interpolater (308) adopt Farrow polynomial interopolation structure efficiently.
9. a kind of full digital frequency conversion device according to claim 4, it is characterized in that described first digital controlled oscillator (208) and second digital controlled oscillator (303) adopt the high speed CORDIC structure of traditional ROM lookup table mode or vector rotation, inner annexation is: phase accumulator (701), phase register (702), phase calculation circuit (703), quadrant selector (704) join successively, and phase register (702) is connected with quadrant selector (704).
10. a kind of full digital frequency conversion device according to claim 4 is characterized in that described first digital controlled oscillator (208) and second digital controlled oscillator (303) have frequency and phase compensation interface, can adopt the mode of frequency sweep to finish frequency offset correction.
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| CN101867537A (en) * | 2010-04-23 | 2010-10-20 | 深圳国微技术有限公司 | Two-stage variable order digital filtering method and device |
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